sch56xx-common.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /***************************************************************************
  3. * Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. ***************************************************************************/
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/module.h>
  8. #include <linux/init.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/err.h>
  11. #include <linux/io.h>
  12. #include <linux/acpi.h>
  13. #include <linux/delay.h>
  14. #include <linux/fs.h>
  15. #include <linux/watchdog.h>
  16. #include <linux/uaccess.h>
  17. #include <linux/slab.h>
  18. #include "sch56xx-common.h"
  19. /* Insmod parameters */
  20. static int nowayout = WATCHDOG_NOWAYOUT;
  21. module_param(nowayout, int, 0);
  22. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  23. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  24. #define SIO_SCH56XX_LD_EM 0x0C /* Embedded uController Logical Dev */
  25. #define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */
  26. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  27. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  28. #define SIO_REG_DEVID 0x20 /* Device ID */
  29. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  30. #define SIO_REG_ADDR 0x66 /* Logical device address (2 bytes) */
  31. #define SIO_SCH5627_ID 0xC6 /* Chipset ID */
  32. #define SIO_SCH5636_ID 0xC7 /* Chipset ID */
  33. #define REGION_LENGTH 10
  34. #define SCH56XX_CMD_READ 0x02
  35. #define SCH56XX_CMD_WRITE 0x03
  36. /* Watchdog registers */
  37. #define SCH56XX_REG_WDOG_PRESET 0x58B
  38. #define SCH56XX_REG_WDOG_CONTROL 0x58C
  39. #define SCH56XX_WDOG_TIME_BASE_SEC 0x01
  40. #define SCH56XX_REG_WDOG_OUTPUT_ENABLE 0x58E
  41. #define SCH56XX_WDOG_OUTPUT_ENABLE 0x02
  42. struct sch56xx_watchdog_data {
  43. u16 addr;
  44. struct mutex *io_lock;
  45. struct watchdog_info wdinfo;
  46. struct watchdog_device wddev;
  47. u8 watchdog_preset;
  48. u8 watchdog_control;
  49. u8 watchdog_output_enable;
  50. };
  51. static struct platform_device *sch56xx_pdev;
  52. /* Super I/O functions */
  53. static inline int superio_inb(int base, int reg)
  54. {
  55. outb(reg, base);
  56. return inb(base + 1);
  57. }
  58. static inline int superio_enter(int base)
  59. {
  60. /* Don't step on other drivers' I/O space by accident */
  61. if (!request_muxed_region(base, 2, "sch56xx")) {
  62. pr_err("I/O address 0x%04x already in use\n", base);
  63. return -EBUSY;
  64. }
  65. outb(SIO_UNLOCK_KEY, base);
  66. return 0;
  67. }
  68. static inline void superio_select(int base, int ld)
  69. {
  70. outb(SIO_REG_LDSEL, base);
  71. outb(ld, base + 1);
  72. }
  73. static inline void superio_exit(int base)
  74. {
  75. outb(SIO_LOCK_KEY, base);
  76. release_region(base, 2);
  77. }
  78. static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v)
  79. {
  80. u8 val;
  81. int i;
  82. /*
  83. * According to SMSC for the commands we use the maximum time for
  84. * the EM to respond is 15 ms, but testing shows in practice it
  85. * responds within 15-32 reads, so we first busy poll, and if
  86. * that fails sleep a bit and try again until we are way past
  87. * the 15 ms maximum response time.
  88. */
  89. const int max_busy_polls = 64;
  90. const int max_lazy_polls = 32;
  91. /* (Optional) Write-Clear the EC to Host Mailbox Register */
  92. val = inb(addr + 1);
  93. outb(val, addr + 1);
  94. /* Set Mailbox Address Pointer to first location in Region 1 */
  95. outb(0x00, addr + 2);
  96. outb(0x80, addr + 3);
  97. /* Write Request Packet Header */
  98. outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
  99. outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
  100. outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */
  101. /* Write Value field */
  102. if (cmd == SCH56XX_CMD_WRITE)
  103. outb(v, addr + 4);
  104. /* Write Address field */
  105. outb(reg & 0xff, addr + 6);
  106. outb(reg >> 8, addr + 7);
  107. /* Execute the Random Access Command */
  108. outb(0x01, addr); /* Write 01h to the Host-to-EC register */
  109. /* EM Interface Polling "Algorithm" */
  110. for (i = 0; i < max_busy_polls + max_lazy_polls; i++) {
  111. if (i >= max_busy_polls)
  112. msleep(1);
  113. /* Read Interrupt source Register */
  114. val = inb(addr + 8);
  115. /* Write Clear the interrupt source bits */
  116. if (val)
  117. outb(val, addr + 8);
  118. /* Command Completed ? */
  119. if (val & 0x01)
  120. break;
  121. }
  122. if (i == max_busy_polls + max_lazy_polls) {
  123. pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
  124. reg, 1);
  125. return -EIO;
  126. }
  127. /*
  128. * According to SMSC we may need to retry this, but sofar I've always
  129. * seen this succeed in 1 try.
  130. */
  131. for (i = 0; i < max_busy_polls; i++) {
  132. /* Read EC-to-Host Register */
  133. val = inb(addr + 1);
  134. /* Command Completed ? */
  135. if (val == 0x01)
  136. break;
  137. if (i == 0)
  138. pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n",
  139. (unsigned int)val, reg);
  140. }
  141. if (i == max_busy_polls) {
  142. pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
  143. reg, 2);
  144. return -EIO;
  145. }
  146. /*
  147. * According to the SMSC app note we should now do:
  148. *
  149. * Set Mailbox Address Pointer to first location in Region 1 *
  150. * outb(0x00, addr + 2);
  151. * outb(0x80, addr + 3);
  152. *
  153. * But if we do that things don't work, so let's not.
  154. */
  155. /* Read Value field */
  156. if (cmd == SCH56XX_CMD_READ)
  157. return inb(addr + 4);
  158. return 0;
  159. }
  160. int sch56xx_read_virtual_reg(u16 addr, u16 reg)
  161. {
  162. return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0);
  163. }
  164. EXPORT_SYMBOL(sch56xx_read_virtual_reg);
  165. int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val)
  166. {
  167. return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val);
  168. }
  169. EXPORT_SYMBOL(sch56xx_write_virtual_reg);
  170. int sch56xx_read_virtual_reg16(u16 addr, u16 reg)
  171. {
  172. int lsb, msb;
  173. /* Read LSB first, this will cause the matching MSB to be latched */
  174. lsb = sch56xx_read_virtual_reg(addr, reg);
  175. if (lsb < 0)
  176. return lsb;
  177. msb = sch56xx_read_virtual_reg(addr, reg + 1);
  178. if (msb < 0)
  179. return msb;
  180. return lsb | (msb << 8);
  181. }
  182. EXPORT_SYMBOL(sch56xx_read_virtual_reg16);
  183. int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
  184. int high_nibble)
  185. {
  186. int msb, lsn;
  187. /* Read MSB first, this will cause the matching LSN to be latched */
  188. msb = sch56xx_read_virtual_reg(addr, msb_reg);
  189. if (msb < 0)
  190. return msb;
  191. lsn = sch56xx_read_virtual_reg(addr, lsn_reg);
  192. if (lsn < 0)
  193. return lsn;
  194. if (high_nibble)
  195. return (msb << 4) | (lsn >> 4);
  196. else
  197. return (msb << 4) | (lsn & 0x0f);
  198. }
  199. EXPORT_SYMBOL(sch56xx_read_virtual_reg12);
  200. /*
  201. * Watchdog routines
  202. */
  203. static int watchdog_set_timeout(struct watchdog_device *wddev,
  204. unsigned int timeout)
  205. {
  206. struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
  207. unsigned int resolution;
  208. u8 control;
  209. int ret;
  210. /* 1 second or 60 second resolution? */
  211. if (timeout <= 255)
  212. resolution = 1;
  213. else
  214. resolution = 60;
  215. if (timeout < resolution || timeout > (resolution * 255))
  216. return -EINVAL;
  217. if (resolution == 1)
  218. control = data->watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC;
  219. else
  220. control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC;
  221. if (data->watchdog_control != control) {
  222. mutex_lock(data->io_lock);
  223. ret = sch56xx_write_virtual_reg(data->addr,
  224. SCH56XX_REG_WDOG_CONTROL,
  225. control);
  226. mutex_unlock(data->io_lock);
  227. if (ret)
  228. return ret;
  229. data->watchdog_control = control;
  230. }
  231. /*
  232. * Remember new timeout value, but do not write as that (re)starts
  233. * the watchdog countdown.
  234. */
  235. data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
  236. wddev->timeout = data->watchdog_preset * resolution;
  237. return 0;
  238. }
  239. static int watchdog_start(struct watchdog_device *wddev)
  240. {
  241. struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
  242. int ret;
  243. u8 val;
  244. /*
  245. * The sch56xx's watchdog cannot really be started / stopped
  246. * it is always running, but we can avoid the timer expiring
  247. * from causing a system reset by clearing the output enable bit.
  248. *
  249. * The sch56xx's watchdog will set the watchdog event bit, bit 0
  250. * of the second interrupt source register (at base-address + 9),
  251. * when the timer expires.
  252. *
  253. * This will only cause a system reset if the 0-1 flank happens when
  254. * output enable is true. Setting output enable after the flank will
  255. * not cause a reset, nor will the timer expiring a second time.
  256. * This means we must clear the watchdog event bit in case it is set.
  257. *
  258. * The timer may still be running (after a recent watchdog_stop) and
  259. * mere milliseconds away from expiring, so the timer must be reset
  260. * first!
  261. */
  262. mutex_lock(data->io_lock);
  263. /* 1. Reset the watchdog countdown counter */
  264. ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
  265. data->watchdog_preset);
  266. if (ret)
  267. goto leave;
  268. /* 2. Enable output */
  269. val = data->watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE;
  270. ret = sch56xx_write_virtual_reg(data->addr,
  271. SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
  272. if (ret)
  273. goto leave;
  274. data->watchdog_output_enable = val;
  275. /* 3. Clear the watchdog event bit if set */
  276. val = inb(data->addr + 9);
  277. if (val & 0x01)
  278. outb(0x01, data->addr + 9);
  279. leave:
  280. mutex_unlock(data->io_lock);
  281. return ret;
  282. }
  283. static int watchdog_trigger(struct watchdog_device *wddev)
  284. {
  285. struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
  286. int ret;
  287. /* Reset the watchdog countdown counter */
  288. mutex_lock(data->io_lock);
  289. ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
  290. data->watchdog_preset);
  291. mutex_unlock(data->io_lock);
  292. return ret;
  293. }
  294. static int watchdog_stop(struct watchdog_device *wddev)
  295. {
  296. struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
  297. int ret = 0;
  298. u8 val;
  299. val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE;
  300. mutex_lock(data->io_lock);
  301. ret = sch56xx_write_virtual_reg(data->addr,
  302. SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
  303. mutex_unlock(data->io_lock);
  304. if (ret)
  305. return ret;
  306. data->watchdog_output_enable = val;
  307. return 0;
  308. }
  309. static const struct watchdog_ops watchdog_ops = {
  310. .owner = THIS_MODULE,
  311. .start = watchdog_start,
  312. .stop = watchdog_stop,
  313. .ping = watchdog_trigger,
  314. .set_timeout = watchdog_set_timeout,
  315. };
  316. struct sch56xx_watchdog_data *sch56xx_watchdog_register(struct device *parent,
  317. u16 addr, u32 revision, struct mutex *io_lock, int check_enabled)
  318. {
  319. struct sch56xx_watchdog_data *data;
  320. int err, control, output_enable;
  321. /* Cache the watchdog registers */
  322. mutex_lock(io_lock);
  323. control =
  324. sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL);
  325. output_enable =
  326. sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE);
  327. mutex_unlock(io_lock);
  328. if (control < 0)
  329. return NULL;
  330. if (output_enable < 0)
  331. return NULL;
  332. if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) {
  333. pr_warn("Watchdog not enabled by BIOS, not registering\n");
  334. return NULL;
  335. }
  336. data = kzalloc(sizeof(struct sch56xx_watchdog_data), GFP_KERNEL);
  337. if (!data)
  338. return NULL;
  339. data->addr = addr;
  340. data->io_lock = io_lock;
  341. strlcpy(data->wdinfo.identity, "sch56xx watchdog",
  342. sizeof(data->wdinfo.identity));
  343. data->wdinfo.firmware_version = revision;
  344. data->wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT;
  345. if (!nowayout)
  346. data->wdinfo.options |= WDIOF_MAGICCLOSE;
  347. data->wddev.info = &data->wdinfo;
  348. data->wddev.ops = &watchdog_ops;
  349. data->wddev.parent = parent;
  350. data->wddev.timeout = 60;
  351. data->wddev.min_timeout = 1;
  352. data->wddev.max_timeout = 255 * 60;
  353. if (nowayout)
  354. set_bit(WDOG_NO_WAY_OUT, &data->wddev.status);
  355. if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)
  356. set_bit(WDOG_HW_RUNNING, &data->wddev.status);
  357. /* Since the watchdog uses a downcounter there is no register to read
  358. the BIOS set timeout from (if any was set at all) ->
  359. Choose a preset which will give us a 1 minute timeout */
  360. if (control & SCH56XX_WDOG_TIME_BASE_SEC)
  361. data->watchdog_preset = 60; /* seconds */
  362. else
  363. data->watchdog_preset = 1; /* minute */
  364. data->watchdog_control = control;
  365. data->watchdog_output_enable = output_enable;
  366. watchdog_set_drvdata(&data->wddev, data);
  367. err = watchdog_register_device(&data->wddev);
  368. if (err) {
  369. pr_err("Registering watchdog chardev: %d\n", err);
  370. kfree(data);
  371. return NULL;
  372. }
  373. return data;
  374. }
  375. EXPORT_SYMBOL(sch56xx_watchdog_register);
  376. void sch56xx_watchdog_unregister(struct sch56xx_watchdog_data *data)
  377. {
  378. watchdog_unregister_device(&data->wddev);
  379. kfree(data);
  380. }
  381. EXPORT_SYMBOL(sch56xx_watchdog_unregister);
  382. /*
  383. * platform dev find, add and remove functions
  384. */
  385. static int __init sch56xx_find(int sioaddr, const char **name)
  386. {
  387. u8 devid;
  388. unsigned short address;
  389. int err;
  390. err = superio_enter(sioaddr);
  391. if (err)
  392. return err;
  393. devid = superio_inb(sioaddr, SIO_REG_DEVID);
  394. switch (devid) {
  395. case SIO_SCH5627_ID:
  396. *name = "sch5627";
  397. break;
  398. case SIO_SCH5636_ID:
  399. *name = "sch5636";
  400. break;
  401. default:
  402. pr_debug("Unsupported device id: 0x%02x\n",
  403. (unsigned int)devid);
  404. err = -ENODEV;
  405. goto exit;
  406. }
  407. superio_select(sioaddr, SIO_SCH56XX_LD_EM);
  408. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  409. pr_warn("Device not activated\n");
  410. err = -ENODEV;
  411. goto exit;
  412. }
  413. /*
  414. * Warning the order of the low / high byte is the other way around
  415. * as on most other superio devices!!
  416. */
  417. address = superio_inb(sioaddr, SIO_REG_ADDR) |
  418. superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8;
  419. if (address == 0) {
  420. pr_warn("Base address not set\n");
  421. err = -ENODEV;
  422. goto exit;
  423. }
  424. err = address;
  425. exit:
  426. superio_exit(sioaddr);
  427. return err;
  428. }
  429. static int __init sch56xx_device_add(int address, const char *name)
  430. {
  431. struct resource res = {
  432. .start = address,
  433. .end = address + REGION_LENGTH - 1,
  434. .flags = IORESOURCE_IO,
  435. };
  436. int err;
  437. sch56xx_pdev = platform_device_alloc(name, address);
  438. if (!sch56xx_pdev)
  439. return -ENOMEM;
  440. res.name = sch56xx_pdev->name;
  441. err = acpi_check_resource_conflict(&res);
  442. if (err)
  443. goto exit_device_put;
  444. err = platform_device_add_resources(sch56xx_pdev, &res, 1);
  445. if (err) {
  446. pr_err("Device resource addition failed\n");
  447. goto exit_device_put;
  448. }
  449. err = platform_device_add(sch56xx_pdev);
  450. if (err) {
  451. pr_err("Device addition failed\n");
  452. goto exit_device_put;
  453. }
  454. return 0;
  455. exit_device_put:
  456. platform_device_put(sch56xx_pdev);
  457. return err;
  458. }
  459. static int __init sch56xx_init(void)
  460. {
  461. int address;
  462. const char *name = NULL;
  463. address = sch56xx_find(0x4e, &name);
  464. if (address < 0)
  465. address = sch56xx_find(0x2e, &name);
  466. if (address < 0)
  467. return address;
  468. return sch56xx_device_add(address, name);
  469. }
  470. static void __exit sch56xx_exit(void)
  471. {
  472. platform_device_unregister(sch56xx_pdev);
  473. }
  474. MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code");
  475. MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
  476. MODULE_LICENSE("GPL");
  477. module_init(sch56xx_init);
  478. module_exit(sch56xx_exit);