max31790.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
  4. * monitoring.
  5. *
  6. * (C) 2015 by Il Han <corone.il.han@gmail.com>
  7. */
  8. #include <linux/err.h>
  9. #include <linux/hwmon.h>
  10. #include <linux/i2c.h>
  11. #include <linux/init.h>
  12. #include <linux/jiffies.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. /* MAX31790 registers */
  16. #define MAX31790_REG_GLOBAL_CONFIG 0x00
  17. #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
  18. #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
  19. #define MAX31790_REG_FAN_FAULT_STATUS2 0x10
  20. #define MAX31790_REG_FAN_FAULT_STATUS1 0x11
  21. #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
  22. #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
  23. #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
  24. #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
  25. /* Fan Config register bits */
  26. #define MAX31790_FAN_CFG_RPM_MODE 0x80
  27. #define MAX31790_FAN_CFG_CTRL_MON 0x10
  28. #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
  29. #define MAX31790_FAN_CFG_TACH_INPUT 0x01
  30. /* Fan Dynamics register bits */
  31. #define MAX31790_FAN_DYN_SR_SHIFT 5
  32. #define MAX31790_FAN_DYN_SR_MASK 0xE0
  33. #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
  34. >> MAX31790_FAN_DYN_SR_SHIFT)
  35. #define FAN_RPM_MIN 120
  36. #define FAN_RPM_MAX 7864320
  37. #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
  38. ((60 * (sr) * 8192) / ((reg) >> 4)) : \
  39. FAN_RPM_MAX)
  40. #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
  41. #define NR_CHANNEL 6
  42. /*
  43. * Client data (each client gets its own)
  44. */
  45. struct max31790_data {
  46. struct i2c_client *client;
  47. struct mutex update_lock;
  48. bool valid; /* zero until following fields are valid */
  49. unsigned long last_updated; /* in jiffies */
  50. /* register values */
  51. u8 fan_config[NR_CHANNEL];
  52. u8 fan_dynamics[NR_CHANNEL];
  53. u16 fault_status;
  54. u16 tach[NR_CHANNEL * 2];
  55. u16 pwm[NR_CHANNEL];
  56. u16 target_count[NR_CHANNEL];
  57. };
  58. static struct max31790_data *max31790_update_device(struct device *dev)
  59. {
  60. struct max31790_data *data = dev_get_drvdata(dev);
  61. struct i2c_client *client = data->client;
  62. struct max31790_data *ret = data;
  63. int i;
  64. int rv;
  65. mutex_lock(&data->update_lock);
  66. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  67. rv = i2c_smbus_read_byte_data(client,
  68. MAX31790_REG_FAN_FAULT_STATUS1);
  69. if (rv < 0)
  70. goto abort;
  71. data->fault_status = rv & 0x3F;
  72. rv = i2c_smbus_read_byte_data(client,
  73. MAX31790_REG_FAN_FAULT_STATUS2);
  74. if (rv < 0)
  75. goto abort;
  76. data->fault_status |= (rv & 0x3F) << 6;
  77. for (i = 0; i < NR_CHANNEL; i++) {
  78. rv = i2c_smbus_read_word_swapped(client,
  79. MAX31790_REG_TACH_COUNT(i));
  80. if (rv < 0)
  81. goto abort;
  82. data->tach[i] = rv;
  83. if (data->fan_config[i]
  84. & MAX31790_FAN_CFG_TACH_INPUT) {
  85. rv = i2c_smbus_read_word_swapped(client,
  86. MAX31790_REG_TACH_COUNT(NR_CHANNEL
  87. + i));
  88. if (rv < 0)
  89. goto abort;
  90. data->tach[NR_CHANNEL + i] = rv;
  91. } else {
  92. rv = i2c_smbus_read_word_swapped(client,
  93. MAX31790_REG_PWM_DUTY_CYCLE(i));
  94. if (rv < 0)
  95. goto abort;
  96. data->pwm[i] = rv;
  97. rv = i2c_smbus_read_word_swapped(client,
  98. MAX31790_REG_TARGET_COUNT(i));
  99. if (rv < 0)
  100. goto abort;
  101. data->target_count[i] = rv;
  102. }
  103. }
  104. data->last_updated = jiffies;
  105. data->valid = true;
  106. }
  107. goto done;
  108. abort:
  109. data->valid = false;
  110. ret = ERR_PTR(rv);
  111. done:
  112. mutex_unlock(&data->update_lock);
  113. return ret;
  114. }
  115. static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
  116. static u8 get_tach_period(u8 fan_dynamics)
  117. {
  118. return tach_period[SR_FROM_REG(fan_dynamics)];
  119. }
  120. static u8 bits_for_tach_period(int rpm)
  121. {
  122. u8 bits;
  123. if (rpm < 500)
  124. bits = 0x0;
  125. else if (rpm < 1000)
  126. bits = 0x1;
  127. else if (rpm < 2000)
  128. bits = 0x2;
  129. else if (rpm < 4000)
  130. bits = 0x3;
  131. else if (rpm < 8000)
  132. bits = 0x4;
  133. else
  134. bits = 0x5;
  135. return bits;
  136. }
  137. static int max31790_read_fan(struct device *dev, u32 attr, int channel,
  138. long *val)
  139. {
  140. struct max31790_data *data = max31790_update_device(dev);
  141. int sr, rpm;
  142. if (IS_ERR(data))
  143. return PTR_ERR(data);
  144. switch (attr) {
  145. case hwmon_fan_input:
  146. sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]);
  147. rpm = RPM_FROM_REG(data->tach[channel], sr);
  148. *val = rpm;
  149. return 0;
  150. case hwmon_fan_target:
  151. sr = get_tach_period(data->fan_dynamics[channel]);
  152. rpm = RPM_FROM_REG(data->target_count[channel], sr);
  153. *val = rpm;
  154. return 0;
  155. case hwmon_fan_fault:
  156. *val = !!(data->fault_status & (1 << channel));
  157. return 0;
  158. default:
  159. return -EOPNOTSUPP;
  160. }
  161. }
  162. static int max31790_write_fan(struct device *dev, u32 attr, int channel,
  163. long val)
  164. {
  165. struct max31790_data *data = dev_get_drvdata(dev);
  166. struct i2c_client *client = data->client;
  167. int target_count;
  168. int err = 0;
  169. u8 bits;
  170. int sr;
  171. mutex_lock(&data->update_lock);
  172. switch (attr) {
  173. case hwmon_fan_target:
  174. val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
  175. bits = bits_for_tach_period(val);
  176. data->fan_dynamics[channel] =
  177. ((data->fan_dynamics[channel] &
  178. ~MAX31790_FAN_DYN_SR_MASK) |
  179. (bits << MAX31790_FAN_DYN_SR_SHIFT));
  180. err = i2c_smbus_write_byte_data(client,
  181. MAX31790_REG_FAN_DYNAMICS(channel),
  182. data->fan_dynamics[channel]);
  183. if (err < 0)
  184. break;
  185. sr = get_tach_period(data->fan_dynamics[channel]);
  186. target_count = RPM_TO_REG(val, sr);
  187. target_count = clamp_val(target_count, 0x1, 0x7FF);
  188. data->target_count[channel] = target_count << 5;
  189. err = i2c_smbus_write_word_swapped(client,
  190. MAX31790_REG_TARGET_COUNT(channel),
  191. data->target_count[channel]);
  192. break;
  193. default:
  194. err = -EOPNOTSUPP;
  195. break;
  196. }
  197. mutex_unlock(&data->update_lock);
  198. return err;
  199. }
  200. static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
  201. {
  202. const struct max31790_data *data = _data;
  203. u8 fan_config = data->fan_config[channel % NR_CHANNEL];
  204. switch (attr) {
  205. case hwmon_fan_input:
  206. case hwmon_fan_fault:
  207. if (channel < NR_CHANNEL ||
  208. (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  209. return 0444;
  210. return 0;
  211. case hwmon_fan_target:
  212. if (channel < NR_CHANNEL &&
  213. !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  214. return 0644;
  215. return 0;
  216. default:
  217. return 0;
  218. }
  219. }
  220. static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
  221. long *val)
  222. {
  223. struct max31790_data *data = max31790_update_device(dev);
  224. u8 fan_config;
  225. if (IS_ERR(data))
  226. return PTR_ERR(data);
  227. fan_config = data->fan_config[channel];
  228. switch (attr) {
  229. case hwmon_pwm_input:
  230. *val = data->pwm[channel] >> 8;
  231. return 0;
  232. case hwmon_pwm_enable:
  233. if (fan_config & MAX31790_FAN_CFG_CTRL_MON)
  234. *val = 0;
  235. else if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
  236. *val = 2;
  237. else
  238. *val = 1;
  239. return 0;
  240. default:
  241. return -EOPNOTSUPP;
  242. }
  243. }
  244. static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
  245. long val)
  246. {
  247. struct max31790_data *data = dev_get_drvdata(dev);
  248. struct i2c_client *client = data->client;
  249. u8 fan_config;
  250. int err = 0;
  251. mutex_lock(&data->update_lock);
  252. switch (attr) {
  253. case hwmon_pwm_input:
  254. if (val < 0 || val > 255) {
  255. err = -EINVAL;
  256. break;
  257. }
  258. data->valid = false;
  259. err = i2c_smbus_write_word_swapped(client,
  260. MAX31790_REG_PWMOUT(channel),
  261. val << 8);
  262. break;
  263. case hwmon_pwm_enable:
  264. fan_config = data->fan_config[channel];
  265. if (val == 0) {
  266. fan_config |= MAX31790_FAN_CFG_CTRL_MON;
  267. /*
  268. * Disable RPM mode; otherwise disabling fan speed
  269. * monitoring is not possible.
  270. */
  271. fan_config &= ~MAX31790_FAN_CFG_RPM_MODE;
  272. } else if (val == 1) {
  273. fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE);
  274. } else if (val == 2) {
  275. fan_config &= ~MAX31790_FAN_CFG_CTRL_MON;
  276. /*
  277. * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its
  278. * own if MAX31790_FAN_CFG_RPM_MODE is set.
  279. * Do it here as well to reflect the actual register
  280. * value in the cache.
  281. */
  282. fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN);
  283. } else {
  284. err = -EINVAL;
  285. break;
  286. }
  287. if (fan_config != data->fan_config[channel]) {
  288. err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel),
  289. fan_config);
  290. if (!err)
  291. data->fan_config[channel] = fan_config;
  292. }
  293. break;
  294. default:
  295. err = -EOPNOTSUPP;
  296. break;
  297. }
  298. mutex_unlock(&data->update_lock);
  299. return err;
  300. }
  301. static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
  302. {
  303. const struct max31790_data *data = _data;
  304. u8 fan_config = data->fan_config[channel];
  305. switch (attr) {
  306. case hwmon_pwm_input:
  307. case hwmon_pwm_enable:
  308. if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  309. return 0644;
  310. return 0;
  311. default:
  312. return 0;
  313. }
  314. }
  315. static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
  316. u32 attr, int channel, long *val)
  317. {
  318. switch (type) {
  319. case hwmon_fan:
  320. return max31790_read_fan(dev, attr, channel, val);
  321. case hwmon_pwm:
  322. return max31790_read_pwm(dev, attr, channel, val);
  323. default:
  324. return -EOPNOTSUPP;
  325. }
  326. }
  327. static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
  328. u32 attr, int channel, long val)
  329. {
  330. switch (type) {
  331. case hwmon_fan:
  332. return max31790_write_fan(dev, attr, channel, val);
  333. case hwmon_pwm:
  334. return max31790_write_pwm(dev, attr, channel, val);
  335. default:
  336. return -EOPNOTSUPP;
  337. }
  338. }
  339. static umode_t max31790_is_visible(const void *data,
  340. enum hwmon_sensor_types type,
  341. u32 attr, int channel)
  342. {
  343. switch (type) {
  344. case hwmon_fan:
  345. return max31790_fan_is_visible(data, attr, channel);
  346. case hwmon_pwm:
  347. return max31790_pwm_is_visible(data, attr, channel);
  348. default:
  349. return 0;
  350. }
  351. }
  352. static const struct hwmon_channel_info *max31790_info[] = {
  353. HWMON_CHANNEL_INFO(fan,
  354. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  355. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  356. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  357. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  358. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  359. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  360. HWMON_F_INPUT | HWMON_F_FAULT,
  361. HWMON_F_INPUT | HWMON_F_FAULT,
  362. HWMON_F_INPUT | HWMON_F_FAULT,
  363. HWMON_F_INPUT | HWMON_F_FAULT,
  364. HWMON_F_INPUT | HWMON_F_FAULT,
  365. HWMON_F_INPUT | HWMON_F_FAULT),
  366. HWMON_CHANNEL_INFO(pwm,
  367. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  368. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  369. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  370. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  371. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  372. HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
  373. NULL
  374. };
  375. static const struct hwmon_ops max31790_hwmon_ops = {
  376. .is_visible = max31790_is_visible,
  377. .read = max31790_read,
  378. .write = max31790_write,
  379. };
  380. static const struct hwmon_chip_info max31790_chip_info = {
  381. .ops = &max31790_hwmon_ops,
  382. .info = max31790_info,
  383. };
  384. static int max31790_init_client(struct i2c_client *client,
  385. struct max31790_data *data)
  386. {
  387. int i, rv;
  388. for (i = 0; i < NR_CHANNEL; i++) {
  389. rv = i2c_smbus_read_byte_data(client,
  390. MAX31790_REG_FAN_CONFIG(i));
  391. if (rv < 0)
  392. return rv;
  393. data->fan_config[i] = rv;
  394. rv = i2c_smbus_read_byte_data(client,
  395. MAX31790_REG_FAN_DYNAMICS(i));
  396. if (rv < 0)
  397. return rv;
  398. data->fan_dynamics[i] = rv;
  399. }
  400. return 0;
  401. }
  402. static int max31790_probe(struct i2c_client *client)
  403. {
  404. struct i2c_adapter *adapter = client->adapter;
  405. struct device *dev = &client->dev;
  406. struct max31790_data *data;
  407. struct device *hwmon_dev;
  408. int err;
  409. if (!i2c_check_functionality(adapter,
  410. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
  411. return -ENODEV;
  412. data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
  413. if (!data)
  414. return -ENOMEM;
  415. data->client = client;
  416. mutex_init(&data->update_lock);
  417. /*
  418. * Initialize the max31790 chip
  419. */
  420. err = max31790_init_client(client, data);
  421. if (err)
  422. return err;
  423. hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
  424. data,
  425. &max31790_chip_info,
  426. NULL);
  427. return PTR_ERR_OR_ZERO(hwmon_dev);
  428. }
  429. static const struct i2c_device_id max31790_id[] = {
  430. { "max31790", 0 },
  431. { }
  432. };
  433. MODULE_DEVICE_TABLE(i2c, max31790_id);
  434. static struct i2c_driver max31790_driver = {
  435. .class = I2C_CLASS_HWMON,
  436. .probe_new = max31790_probe,
  437. .driver = {
  438. .name = "max31790",
  439. },
  440. .id_table = max31790_id,
  441. };
  442. module_i2c_driver(max31790_driver);
  443. MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
  444. MODULE_DESCRIPTION("MAX31790 sensor driver");
  445. MODULE_LICENSE("GPL");