ipu-vdi.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2012-2016 Mentor Graphics Inc.
  4. * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
  5. */
  6. #include <linux/io.h>
  7. #include "ipu-prv.h"
  8. struct ipu_vdi {
  9. void __iomem *base;
  10. u32 module;
  11. spinlock_t lock;
  12. int use_count;
  13. struct ipu_soc *ipu;
  14. };
  15. /* VDI Register Offsets */
  16. #define VDI_FSIZE 0x0000
  17. #define VDI_C 0x0004
  18. /* VDI Register Fields */
  19. #define VDI_C_CH_420 (0 << 1)
  20. #define VDI_C_CH_422 (1 << 1)
  21. #define VDI_C_MOT_SEL_MASK (0x3 << 2)
  22. #define VDI_C_MOT_SEL_FULL (2 << 2)
  23. #define VDI_C_MOT_SEL_LOW (1 << 2)
  24. #define VDI_C_MOT_SEL_MED (0 << 2)
  25. #define VDI_C_BURST_SIZE1_4 (3 << 4)
  26. #define VDI_C_BURST_SIZE2_4 (3 << 8)
  27. #define VDI_C_BURST_SIZE3_4 (3 << 12)
  28. #define VDI_C_BURST_SIZE_MASK 0xF
  29. #define VDI_C_BURST_SIZE1_OFFSET 4
  30. #define VDI_C_BURST_SIZE2_OFFSET 8
  31. #define VDI_C_BURST_SIZE3_OFFSET 12
  32. #define VDI_C_VWM1_SET_1 (0 << 16)
  33. #define VDI_C_VWM1_SET_2 (1 << 16)
  34. #define VDI_C_VWM1_CLR_2 (1 << 19)
  35. #define VDI_C_VWM3_SET_1 (0 << 22)
  36. #define VDI_C_VWM3_SET_2 (1 << 22)
  37. #define VDI_C_VWM3_CLR_2 (1 << 25)
  38. #define VDI_C_TOP_FIELD_MAN_1 (1 << 30)
  39. #define VDI_C_TOP_FIELD_AUTO_1 (1 << 31)
  40. static inline u32 ipu_vdi_read(struct ipu_vdi *vdi, unsigned int offset)
  41. {
  42. return readl(vdi->base + offset);
  43. }
  44. static inline void ipu_vdi_write(struct ipu_vdi *vdi, u32 value,
  45. unsigned int offset)
  46. {
  47. writel(value, vdi->base + offset);
  48. }
  49. void ipu_vdi_set_field_order(struct ipu_vdi *vdi, v4l2_std_id std, u32 field)
  50. {
  51. bool top_field_0 = false;
  52. unsigned long flags;
  53. u32 reg;
  54. switch (field) {
  55. case V4L2_FIELD_INTERLACED_TB:
  56. case V4L2_FIELD_SEQ_TB:
  57. case V4L2_FIELD_TOP:
  58. top_field_0 = true;
  59. break;
  60. case V4L2_FIELD_INTERLACED_BT:
  61. case V4L2_FIELD_SEQ_BT:
  62. case V4L2_FIELD_BOTTOM:
  63. top_field_0 = false;
  64. break;
  65. default:
  66. top_field_0 = (std & V4L2_STD_525_60) ? true : false;
  67. break;
  68. }
  69. spin_lock_irqsave(&vdi->lock, flags);
  70. reg = ipu_vdi_read(vdi, VDI_C);
  71. if (top_field_0)
  72. reg &= ~(VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1);
  73. else
  74. reg |= VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1;
  75. ipu_vdi_write(vdi, reg, VDI_C);
  76. spin_unlock_irqrestore(&vdi->lock, flags);
  77. }
  78. EXPORT_SYMBOL_GPL(ipu_vdi_set_field_order);
  79. void ipu_vdi_set_motion(struct ipu_vdi *vdi, enum ipu_motion_sel motion_sel)
  80. {
  81. unsigned long flags;
  82. u32 reg;
  83. spin_lock_irqsave(&vdi->lock, flags);
  84. reg = ipu_vdi_read(vdi, VDI_C);
  85. reg &= ~VDI_C_MOT_SEL_MASK;
  86. switch (motion_sel) {
  87. case MED_MOTION:
  88. reg |= VDI_C_MOT_SEL_MED;
  89. break;
  90. case HIGH_MOTION:
  91. reg |= VDI_C_MOT_SEL_FULL;
  92. break;
  93. default:
  94. reg |= VDI_C_MOT_SEL_LOW;
  95. break;
  96. }
  97. ipu_vdi_write(vdi, reg, VDI_C);
  98. spin_unlock_irqrestore(&vdi->lock, flags);
  99. }
  100. EXPORT_SYMBOL_GPL(ipu_vdi_set_motion);
  101. void ipu_vdi_setup(struct ipu_vdi *vdi, u32 code, int xres, int yres)
  102. {
  103. unsigned long flags;
  104. u32 pixel_fmt, reg;
  105. spin_lock_irqsave(&vdi->lock, flags);
  106. reg = ((yres - 1) << 16) | (xres - 1);
  107. ipu_vdi_write(vdi, reg, VDI_FSIZE);
  108. /*
  109. * Full motion, only vertical filter is used.
  110. * Burst size is 4 accesses
  111. */
  112. if (code == MEDIA_BUS_FMT_UYVY8_2X8 ||
  113. code == MEDIA_BUS_FMT_UYVY8_1X16 ||
  114. code == MEDIA_BUS_FMT_YUYV8_2X8 ||
  115. code == MEDIA_BUS_FMT_YUYV8_1X16)
  116. pixel_fmt = VDI_C_CH_422;
  117. else
  118. pixel_fmt = VDI_C_CH_420;
  119. reg = ipu_vdi_read(vdi, VDI_C);
  120. reg |= pixel_fmt;
  121. reg |= VDI_C_BURST_SIZE2_4;
  122. reg |= VDI_C_BURST_SIZE1_4 | VDI_C_VWM1_CLR_2;
  123. reg |= VDI_C_BURST_SIZE3_4 | VDI_C_VWM3_CLR_2;
  124. ipu_vdi_write(vdi, reg, VDI_C);
  125. spin_unlock_irqrestore(&vdi->lock, flags);
  126. }
  127. EXPORT_SYMBOL_GPL(ipu_vdi_setup);
  128. void ipu_vdi_unsetup(struct ipu_vdi *vdi)
  129. {
  130. unsigned long flags;
  131. spin_lock_irqsave(&vdi->lock, flags);
  132. ipu_vdi_write(vdi, 0, VDI_FSIZE);
  133. ipu_vdi_write(vdi, 0, VDI_C);
  134. spin_unlock_irqrestore(&vdi->lock, flags);
  135. }
  136. EXPORT_SYMBOL_GPL(ipu_vdi_unsetup);
  137. int ipu_vdi_enable(struct ipu_vdi *vdi)
  138. {
  139. unsigned long flags;
  140. spin_lock_irqsave(&vdi->lock, flags);
  141. if (!vdi->use_count)
  142. ipu_module_enable(vdi->ipu, vdi->module);
  143. vdi->use_count++;
  144. spin_unlock_irqrestore(&vdi->lock, flags);
  145. return 0;
  146. }
  147. EXPORT_SYMBOL_GPL(ipu_vdi_enable);
  148. int ipu_vdi_disable(struct ipu_vdi *vdi)
  149. {
  150. unsigned long flags;
  151. spin_lock_irqsave(&vdi->lock, flags);
  152. if (vdi->use_count) {
  153. if (!--vdi->use_count)
  154. ipu_module_disable(vdi->ipu, vdi->module);
  155. }
  156. spin_unlock_irqrestore(&vdi->lock, flags);
  157. return 0;
  158. }
  159. EXPORT_SYMBOL_GPL(ipu_vdi_disable);
  160. struct ipu_vdi *ipu_vdi_get(struct ipu_soc *ipu)
  161. {
  162. return ipu->vdi_priv;
  163. }
  164. EXPORT_SYMBOL_GPL(ipu_vdi_get);
  165. void ipu_vdi_put(struct ipu_vdi *vdi)
  166. {
  167. }
  168. EXPORT_SYMBOL_GPL(ipu_vdi_put);
  169. int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev,
  170. unsigned long base, u32 module)
  171. {
  172. struct ipu_vdi *vdi;
  173. vdi = devm_kzalloc(dev, sizeof(*vdi), GFP_KERNEL);
  174. if (!vdi)
  175. return -ENOMEM;
  176. ipu->vdi_priv = vdi;
  177. spin_lock_init(&vdi->lock);
  178. vdi->module = module;
  179. vdi->base = devm_ioremap(dev, base, PAGE_SIZE);
  180. if (!vdi->base)
  181. return -ENOMEM;
  182. dev_dbg(dev, "VDI base: 0x%08lx remapped to %p\n", base, vdi->base);
  183. vdi->ipu = ipu;
  184. return 0;
  185. }
  186. void ipu_vdi_exit(struct ipu_soc *ipu)
  187. {
  188. }