gpio-xtensa.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2013 TangoTec Ltd.
  4. * Author: Baruch Siach <baruch@tkos.co.il>
  5. *
  6. * Driver for the Xtensa LX4 GPIO32 Option
  7. *
  8. * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
  9. *
  10. * GPIO32 is a standard optional extension to the Xtensa architecture core that
  11. * provides preconfigured output and input ports for intra SoC signaling. The
  12. * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE)
  13. * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This
  14. * driver treats input and output states as two distinct devices.
  15. *
  16. * Access to GPIO32 specific instructions is controlled by the CPENABLE
  17. * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
  18. * disables access to all coprocessors. This driver sets the CPENABLE bit
  19. * corresponding to GPIO32 before any GPIO32 specific instruction, and restores
  20. * CPENABLE state after that.
  21. *
  22. * This driver is currently incompatible with SMP. The GPIO32 extension is not
  23. * guaranteed to be available in all cores. Moreover, each core controls a
  24. * different set of IO wires. A theoretical SMP aware version of this driver
  25. * would need to have a per core workqueue to do the actual GPIO manipulation.
  26. */
  27. #include <linux/err.h>
  28. #include <linux/module.h>
  29. #include <linux/gpio/driver.h>
  30. #include <linux/bitops.h>
  31. #include <linux/platform_device.h>
  32. #include <asm/coprocessor.h> /* CPENABLE read/write macros */
  33. #ifndef XCHAL_CP_ID_XTIOP
  34. #error GPIO32 option is not enabled for your xtensa core variant
  35. #endif
  36. #if XCHAL_HAVE_CP
  37. static inline unsigned long enable_cp(unsigned long *cpenable)
  38. {
  39. unsigned long flags;
  40. local_irq_save(flags);
  41. *cpenable = xtensa_get_sr(cpenable);
  42. xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable);
  43. return flags;
  44. }
  45. static inline void disable_cp(unsigned long flags, unsigned long cpenable)
  46. {
  47. xtensa_set_sr(cpenable, cpenable);
  48. local_irq_restore(flags);
  49. }
  50. #else
  51. static inline unsigned long enable_cp(unsigned long *cpenable)
  52. {
  53. *cpenable = 0; /* avoid uninitialized value warning */
  54. return 0;
  55. }
  56. static inline void disable_cp(unsigned long flags, unsigned long cpenable)
  57. {
  58. }
  59. #endif /* XCHAL_HAVE_CP */
  60. static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
  61. {
  62. return GPIO_LINE_DIRECTION_IN; /* input only */
  63. }
  64. static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset)
  65. {
  66. unsigned long flags, saved_cpenable;
  67. u32 impwire;
  68. flags = enable_cp(&saved_cpenable);
  69. __asm__ __volatile__("read_impwire %0" : "=a" (impwire));
  70. disable_cp(flags, saved_cpenable);
  71. return !!(impwire & BIT(offset));
  72. }
  73. static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset,
  74. int value)
  75. {
  76. BUG(); /* output only; should never be called */
  77. }
  78. static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset)
  79. {
  80. return GPIO_LINE_DIRECTION_OUT; /* output only */
  81. }
  82. static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset)
  83. {
  84. unsigned long flags, saved_cpenable;
  85. u32 expstate;
  86. flags = enable_cp(&saved_cpenable);
  87. __asm__ __volatile__("rur.expstate %0" : "=a" (expstate));
  88. disable_cp(flags, saved_cpenable);
  89. return !!(expstate & BIT(offset));
  90. }
  91. static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset,
  92. int value)
  93. {
  94. unsigned long flags, saved_cpenable;
  95. u32 mask = BIT(offset);
  96. u32 val = value ? BIT(offset) : 0;
  97. flags = enable_cp(&saved_cpenable);
  98. __asm__ __volatile__("wrmsk_expstate %0, %1"
  99. :: "a" (val), "a" (mask));
  100. disable_cp(flags, saved_cpenable);
  101. }
  102. static struct gpio_chip impwire_chip = {
  103. .label = "impwire",
  104. .base = -1,
  105. .ngpio = 32,
  106. .get_direction = xtensa_impwire_get_direction,
  107. .get = xtensa_impwire_get_value,
  108. .set = xtensa_impwire_set_value,
  109. };
  110. static struct gpio_chip expstate_chip = {
  111. .label = "expstate",
  112. .base = -1,
  113. .ngpio = 32,
  114. .get_direction = xtensa_expstate_get_direction,
  115. .get = xtensa_expstate_get_value,
  116. .set = xtensa_expstate_set_value,
  117. };
  118. static int xtensa_gpio_probe(struct platform_device *pdev)
  119. {
  120. int ret;
  121. ret = gpiochip_add_data(&impwire_chip, NULL);
  122. if (ret)
  123. return ret;
  124. return gpiochip_add_data(&expstate_chip, NULL);
  125. }
  126. static struct platform_driver xtensa_gpio_driver = {
  127. .driver = {
  128. .name = "xtensa-gpio",
  129. },
  130. .probe = xtensa_gpio_probe,
  131. };
  132. static int __init xtensa_gpio_init(void)
  133. {
  134. struct platform_device *pdev;
  135. pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0);
  136. if (IS_ERR(pdev))
  137. return PTR_ERR(pdev);
  138. return platform_driver_register(&xtensa_gpio_driver);
  139. }
  140. device_initcall(xtensa_gpio_init);
  141. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  142. MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
  143. MODULE_LICENSE("GPL");