gpio-ts5500.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Digital I/O driver for Technologic Systems TS-5500
  4. *
  5. * Copyright (c) 2012 Savoir-faire Linux Inc.
  6. * Vivien Didelot <vivien.didelot@savoirfairelinux.com>
  7. *
  8. * Technologic Systems platforms have pin blocks, exposing several Digital
  9. * Input/Output lines (DIO). This driver aims to support single pin blocks.
  10. * In that sense, the support is not limited to the TS-5500 blocks.
  11. * Actually, the following platforms have DIO support:
  12. *
  13. * TS-5500:
  14. * Documentation: http://wiki.embeddedarm.com/wiki/TS-5500
  15. * Blocks: DIO1, DIO2 and LCD port.
  16. *
  17. * TS-5600:
  18. * Documentation: http://wiki.embeddedarm.com/wiki/TS-5600
  19. * Blocks: LCD port (identical to TS-5500 LCD).
  20. */
  21. #include <linux/bitops.h>
  22. #include <linux/gpio/driver.h>
  23. #include <linux/io.h>
  24. #include <linux/module.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/slab.h>
  27. /* List of supported Technologic Systems platforms DIO blocks */
  28. enum ts5500_blocks { TS5500_DIO1, TS5500_DIO2, TS5500_LCD, TS5600_LCD };
  29. struct ts5500_priv {
  30. const struct ts5500_dio *pinout;
  31. struct gpio_chip gpio_chip;
  32. spinlock_t lock;
  33. bool strap;
  34. u8 hwirq;
  35. };
  36. /*
  37. * Hex 7D is used to control several blocks (e.g. DIO2 and LCD port).
  38. * This flag ensures that the region has been requested by this driver.
  39. */
  40. static bool hex7d_reserved;
  41. /*
  42. * This structure is used to describe capabilities of DIO lines,
  43. * such as available directions and connected interrupt (if any).
  44. */
  45. struct ts5500_dio {
  46. const u8 value_addr;
  47. const u8 value_mask;
  48. const u8 control_addr;
  49. const u8 control_mask;
  50. const bool no_input;
  51. const bool no_output;
  52. const u8 irq;
  53. };
  54. #define TS5500_DIO_IN_OUT(vaddr, vbit, caddr, cbit) \
  55. { \
  56. .value_addr = vaddr, \
  57. .value_mask = BIT(vbit), \
  58. .control_addr = caddr, \
  59. .control_mask = BIT(cbit), \
  60. }
  61. #define TS5500_DIO_IN(addr, bit) \
  62. { \
  63. .value_addr = addr, \
  64. .value_mask = BIT(bit), \
  65. .no_output = true, \
  66. }
  67. #define TS5500_DIO_IN_IRQ(addr, bit, _irq) \
  68. { \
  69. .value_addr = addr, \
  70. .value_mask = BIT(bit), \
  71. .no_output = true, \
  72. .irq = _irq, \
  73. }
  74. #define TS5500_DIO_OUT(addr, bit) \
  75. { \
  76. .value_addr = addr, \
  77. .value_mask = BIT(bit), \
  78. .no_input = true, \
  79. }
  80. /*
  81. * Input/Output DIO lines are programmed in groups of 4. Their values are
  82. * available through 4 consecutive bits in a value port, whereas the direction
  83. * of these 4 lines is driven by only 1 bit in a control port.
  84. */
  85. #define TS5500_DIO_GROUP(vaddr, vbitfrom, caddr, cbit) \
  86. TS5500_DIO_IN_OUT(vaddr, vbitfrom + 0, caddr, cbit), \
  87. TS5500_DIO_IN_OUT(vaddr, vbitfrom + 1, caddr, cbit), \
  88. TS5500_DIO_IN_OUT(vaddr, vbitfrom + 2, caddr, cbit), \
  89. TS5500_DIO_IN_OUT(vaddr, vbitfrom + 3, caddr, cbit)
  90. /*
  91. * TS-5500 DIO1 block
  92. *
  93. * value control dir hw
  94. * addr bit addr bit in out irq name pin offset
  95. *
  96. * 0x7b 0 0x7a 0 x x DIO1_0 1 0
  97. * 0x7b 1 0x7a 0 x x DIO1_1 3 1
  98. * 0x7b 2 0x7a 0 x x DIO1_2 5 2
  99. * 0x7b 3 0x7a 0 x x DIO1_3 7 3
  100. * 0x7b 4 0x7a 1 x x DIO1_4 9 4
  101. * 0x7b 5 0x7a 1 x x DIO1_5 11 5
  102. * 0x7b 6 0x7a 1 x x DIO1_6 13 6
  103. * 0x7b 7 0x7a 1 x x DIO1_7 15 7
  104. * 0x7c 0 0x7a 5 x x DIO1_8 4 8
  105. * 0x7c 1 0x7a 5 x x DIO1_9 6 9
  106. * 0x7c 2 0x7a 5 x x DIO1_10 8 10
  107. * 0x7c 3 0x7a 5 x x DIO1_11 10 11
  108. * 0x7c 4 x DIO1_12 12 12
  109. * 0x7c 5 x 7 DIO1_13 14 13
  110. */
  111. static const struct ts5500_dio ts5500_dio1[] = {
  112. TS5500_DIO_GROUP(0x7b, 0, 0x7a, 0),
  113. TS5500_DIO_GROUP(0x7b, 4, 0x7a, 1),
  114. TS5500_DIO_GROUP(0x7c, 0, 0x7a, 5),
  115. TS5500_DIO_IN(0x7c, 4),
  116. TS5500_DIO_IN_IRQ(0x7c, 5, 7),
  117. };
  118. /*
  119. * TS-5500 DIO2 block
  120. *
  121. * value control dir hw
  122. * addr bit addr bit in out irq name pin offset
  123. *
  124. * 0x7e 0 0x7d 0 x x DIO2_0 1 0
  125. * 0x7e 1 0x7d 0 x x DIO2_1 3 1
  126. * 0x7e 2 0x7d 0 x x DIO2_2 5 2
  127. * 0x7e 3 0x7d 0 x x DIO2_3 7 3
  128. * 0x7e 4 0x7d 1 x x DIO2_4 9 4
  129. * 0x7e 5 0x7d 1 x x DIO2_5 11 5
  130. * 0x7e 6 0x7d 1 x x DIO2_6 13 6
  131. * 0x7e 7 0x7d 1 x x DIO2_7 15 7
  132. * 0x7f 0 0x7d 5 x x DIO2_8 4 8
  133. * 0x7f 1 0x7d 5 x x DIO2_9 6 9
  134. * 0x7f 2 0x7d 5 x x DIO2_10 8 10
  135. * 0x7f 3 0x7d 5 x x DIO2_11 10 11
  136. * 0x7f 4 x 6 DIO2_13 14 12
  137. */
  138. static const struct ts5500_dio ts5500_dio2[] = {
  139. TS5500_DIO_GROUP(0x7e, 0, 0x7d, 0),
  140. TS5500_DIO_GROUP(0x7e, 4, 0x7d, 1),
  141. TS5500_DIO_GROUP(0x7f, 0, 0x7d, 5),
  142. TS5500_DIO_IN_IRQ(0x7f, 4, 6),
  143. };
  144. /*
  145. * TS-5500 LCD port used as DIO block
  146. * TS-5600 LCD port is identical
  147. *
  148. * value control dir hw
  149. * addr bit addr bit in out irq name pin offset
  150. *
  151. * 0x72 0 0x7d 2 x x LCD_0 8 0
  152. * 0x72 1 0x7d 2 x x LCD_1 7 1
  153. * 0x72 2 0x7d 2 x x LCD_2 10 2
  154. * 0x72 3 0x7d 2 x x LCD_3 9 3
  155. * 0x72 4 0x7d 3 x x LCD_4 12 4
  156. * 0x72 5 0x7d 3 x x LCD_5 11 5
  157. * 0x72 6 0x7d 3 x x LCD_6 14 6
  158. * 0x72 7 0x7d 3 x x LCD_7 13 7
  159. * 0x73 0 x LCD_EN 5 8
  160. * 0x73 6 x LCD_WR 6 9
  161. * 0x73 7 x 1 LCD_RS 3 10
  162. */
  163. static const struct ts5500_dio ts5500_lcd[] = {
  164. TS5500_DIO_GROUP(0x72, 0, 0x7d, 2),
  165. TS5500_DIO_GROUP(0x72, 4, 0x7d, 3),
  166. TS5500_DIO_OUT(0x73, 0),
  167. TS5500_DIO_IN(0x73, 6),
  168. TS5500_DIO_IN_IRQ(0x73, 7, 1),
  169. };
  170. static inline void ts5500_set_mask(u8 mask, u8 addr)
  171. {
  172. u8 val = inb(addr);
  173. val |= mask;
  174. outb(val, addr);
  175. }
  176. static inline void ts5500_clear_mask(u8 mask, u8 addr)
  177. {
  178. u8 val = inb(addr);
  179. val &= ~mask;
  180. outb(val, addr);
  181. }
  182. static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset)
  183. {
  184. struct ts5500_priv *priv = gpiochip_get_data(chip);
  185. const struct ts5500_dio line = priv->pinout[offset];
  186. unsigned long flags;
  187. if (line.no_input)
  188. return -ENXIO;
  189. if (line.no_output)
  190. return 0;
  191. spin_lock_irqsave(&priv->lock, flags);
  192. ts5500_clear_mask(line.control_mask, line.control_addr);
  193. spin_unlock_irqrestore(&priv->lock, flags);
  194. return 0;
  195. }
  196. static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset)
  197. {
  198. struct ts5500_priv *priv = gpiochip_get_data(chip);
  199. const struct ts5500_dio line = priv->pinout[offset];
  200. return !!(inb(line.value_addr) & line.value_mask);
  201. }
  202. static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val)
  203. {
  204. struct ts5500_priv *priv = gpiochip_get_data(chip);
  205. const struct ts5500_dio line = priv->pinout[offset];
  206. unsigned long flags;
  207. if (line.no_output)
  208. return -ENXIO;
  209. spin_lock_irqsave(&priv->lock, flags);
  210. if (!line.no_input)
  211. ts5500_set_mask(line.control_mask, line.control_addr);
  212. if (val)
  213. ts5500_set_mask(line.value_mask, line.value_addr);
  214. else
  215. ts5500_clear_mask(line.value_mask, line.value_addr);
  216. spin_unlock_irqrestore(&priv->lock, flags);
  217. return 0;
  218. }
  219. static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  220. {
  221. struct ts5500_priv *priv = gpiochip_get_data(chip);
  222. const struct ts5500_dio line = priv->pinout[offset];
  223. unsigned long flags;
  224. spin_lock_irqsave(&priv->lock, flags);
  225. if (val)
  226. ts5500_set_mask(line.value_mask, line.value_addr);
  227. else
  228. ts5500_clear_mask(line.value_mask, line.value_addr);
  229. spin_unlock_irqrestore(&priv->lock, flags);
  230. }
  231. static int ts5500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  232. {
  233. struct ts5500_priv *priv = gpiochip_get_data(chip);
  234. const struct ts5500_dio *block = priv->pinout;
  235. const struct ts5500_dio line = block[offset];
  236. /* Only one pin is connected to an interrupt */
  237. if (line.irq)
  238. return line.irq;
  239. /* As this pin is input-only, we may strap it to another in/out pin */
  240. if (priv->strap)
  241. return priv->hwirq;
  242. return -ENXIO;
  243. }
  244. static int ts5500_enable_irq(struct ts5500_priv *priv)
  245. {
  246. int ret = 0;
  247. unsigned long flags;
  248. spin_lock_irqsave(&priv->lock, flags);
  249. if (priv->hwirq == 7)
  250. ts5500_set_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */
  251. else if (priv->hwirq == 6)
  252. ts5500_set_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */
  253. else if (priv->hwirq == 1)
  254. ts5500_set_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */
  255. else
  256. ret = -EINVAL;
  257. spin_unlock_irqrestore(&priv->lock, flags);
  258. return ret;
  259. }
  260. static void ts5500_disable_irq(struct ts5500_priv *priv)
  261. {
  262. unsigned long flags;
  263. spin_lock_irqsave(&priv->lock, flags);
  264. if (priv->hwirq == 7)
  265. ts5500_clear_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */
  266. else if (priv->hwirq == 6)
  267. ts5500_clear_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */
  268. else if (priv->hwirq == 1)
  269. ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */
  270. else
  271. dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n",
  272. priv->hwirq);
  273. spin_unlock_irqrestore(&priv->lock, flags);
  274. }
  275. static int ts5500_dio_probe(struct platform_device *pdev)
  276. {
  277. enum ts5500_blocks block = platform_get_device_id(pdev)->driver_data;
  278. struct device *dev = &pdev->dev;
  279. const char *name = dev_name(dev);
  280. struct ts5500_priv *priv;
  281. struct resource *res;
  282. unsigned long flags;
  283. int ret;
  284. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  285. if (!res) {
  286. dev_err(dev, "missing IRQ resource\n");
  287. return -EINVAL;
  288. }
  289. priv = devm_kzalloc(dev, sizeof(struct ts5500_priv), GFP_KERNEL);
  290. if (!priv)
  291. return -ENOMEM;
  292. platform_set_drvdata(pdev, priv);
  293. priv->hwirq = res->start;
  294. spin_lock_init(&priv->lock);
  295. priv->gpio_chip.owner = THIS_MODULE;
  296. priv->gpio_chip.label = name;
  297. priv->gpio_chip.parent = dev;
  298. priv->gpio_chip.direction_input = ts5500_gpio_input;
  299. priv->gpio_chip.direction_output = ts5500_gpio_output;
  300. priv->gpio_chip.get = ts5500_gpio_get;
  301. priv->gpio_chip.set = ts5500_gpio_set;
  302. priv->gpio_chip.to_irq = ts5500_gpio_to_irq;
  303. priv->gpio_chip.base = -1;
  304. switch (block) {
  305. case TS5500_DIO1:
  306. priv->pinout = ts5500_dio1;
  307. priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio1);
  308. if (!devm_request_region(dev, 0x7a, 3, name)) {
  309. dev_err(dev, "failed to request %s ports\n", name);
  310. return -EBUSY;
  311. }
  312. break;
  313. case TS5500_DIO2:
  314. priv->pinout = ts5500_dio2;
  315. priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio2);
  316. if (!devm_request_region(dev, 0x7e, 2, name)) {
  317. dev_err(dev, "failed to request %s ports\n", name);
  318. return -EBUSY;
  319. }
  320. if (hex7d_reserved)
  321. break;
  322. if (!devm_request_region(dev, 0x7d, 1, name)) {
  323. dev_err(dev, "failed to request %s 7D\n", name);
  324. return -EBUSY;
  325. }
  326. hex7d_reserved = true;
  327. break;
  328. case TS5500_LCD:
  329. case TS5600_LCD:
  330. priv->pinout = ts5500_lcd;
  331. priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_lcd);
  332. if (!devm_request_region(dev, 0x72, 2, name)) {
  333. dev_err(dev, "failed to request %s ports\n", name);
  334. return -EBUSY;
  335. }
  336. if (!hex7d_reserved) {
  337. if (!devm_request_region(dev, 0x7d, 1, name)) {
  338. dev_err(dev, "failed to request %s 7D\n", name);
  339. return -EBUSY;
  340. }
  341. hex7d_reserved = true;
  342. }
  343. /* Ensure usage of LCD port as DIO */
  344. spin_lock_irqsave(&priv->lock, flags);
  345. ts5500_clear_mask(BIT(4), 0x7d);
  346. spin_unlock_irqrestore(&priv->lock, flags);
  347. break;
  348. }
  349. ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv);
  350. if (ret) {
  351. dev_err(dev, "failed to register the gpio chip\n");
  352. return ret;
  353. }
  354. ret = ts5500_enable_irq(priv);
  355. if (ret) {
  356. dev_err(dev, "invalid interrupt %d\n", priv->hwirq);
  357. return ret;
  358. }
  359. return 0;
  360. }
  361. static int ts5500_dio_remove(struct platform_device *pdev)
  362. {
  363. struct ts5500_priv *priv = platform_get_drvdata(pdev);
  364. ts5500_disable_irq(priv);
  365. return 0;
  366. }
  367. static const struct platform_device_id ts5500_dio_ids[] = {
  368. { "ts5500-dio1", TS5500_DIO1 },
  369. { "ts5500-dio2", TS5500_DIO2 },
  370. { "ts5500-dio-lcd", TS5500_LCD },
  371. { "ts5600-dio-lcd", TS5600_LCD },
  372. { }
  373. };
  374. MODULE_DEVICE_TABLE(platform, ts5500_dio_ids);
  375. static struct platform_driver ts5500_dio_driver = {
  376. .driver = {
  377. .name = "ts5500-dio",
  378. },
  379. .probe = ts5500_dio_probe,
  380. .remove = ts5500_dio_remove,
  381. .id_table = ts5500_dio_ids,
  382. };
  383. module_platform_driver(ts5500_dio_driver);
  384. MODULE_LICENSE("GPL");
  385. MODULE_AUTHOR("Savoir-faire Linux Inc. <kernel@savoirfairelinux.com>");
  386. MODULE_DESCRIPTION("Technologic Systems TS-5500 Digital I/O driver");