gpio-sta2x11.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * STMicroelectronics ConneXt (STA2X11) GPIO driver
  4. *
  5. * Copyright 2012 ST Microelectronics (Alessandro Rubini)
  6. * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.
  7. * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc.
  8. */
  9. #include <linux/init.h>
  10. #include <linux/kernel.h>
  11. #include <linux/slab.h>
  12. #include <linux/gpio/driver.h>
  13. #include <linux/bitops.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/irq.h>
  16. #include <linux/pci.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/mfd/sta2x11-mfd.h>
  19. struct gsta_regs {
  20. u32 dat; /* 0x00 */
  21. u32 dats;
  22. u32 datc;
  23. u32 pdis;
  24. u32 dir; /* 0x10 */
  25. u32 dirs;
  26. u32 dirc;
  27. u32 unused_1c;
  28. u32 afsela; /* 0x20 */
  29. u32 unused_24[7];
  30. u32 rimsc; /* 0x40 */
  31. u32 fimsc;
  32. u32 is;
  33. u32 ic;
  34. };
  35. struct gsta_gpio {
  36. spinlock_t lock;
  37. struct device *dev;
  38. void __iomem *reg_base;
  39. struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS];
  40. struct gpio_chip gpio;
  41. int irq_base;
  42. /* FIXME: save the whole config here (AF, ...) */
  43. unsigned irq_type[GSTA_NR_GPIO];
  44. };
  45. /*
  46. * gpio methods
  47. */
  48. static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
  49. {
  50. struct gsta_gpio *chip = gpiochip_get_data(gpio);
  51. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  52. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  53. if (val)
  54. writel(bit, &regs->dats);
  55. else
  56. writel(bit, &regs->datc);
  57. }
  58. static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)
  59. {
  60. struct gsta_gpio *chip = gpiochip_get_data(gpio);
  61. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  62. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  63. return !!(readl(&regs->dat) & bit);
  64. }
  65. static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
  66. int val)
  67. {
  68. struct gsta_gpio *chip = gpiochip_get_data(gpio);
  69. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  70. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  71. writel(bit, &regs->dirs);
  72. /* Data register after direction, otherwise pullup/down is selected */
  73. if (val)
  74. writel(bit, &regs->dats);
  75. else
  76. writel(bit, &regs->datc);
  77. return 0;
  78. }
  79. static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
  80. {
  81. struct gsta_gpio *chip = gpiochip_get_data(gpio);
  82. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  83. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  84. writel(bit, &regs->dirc);
  85. return 0;
  86. }
  87. static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
  88. {
  89. struct gsta_gpio *chip = gpiochip_get_data(gpio);
  90. return chip->irq_base + offset;
  91. }
  92. static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */
  93. {
  94. struct gpio_chip *gpio = &chip->gpio;
  95. /*
  96. * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts
  97. * from the end. However, for compatibility, we need the first
  98. * ConneXt device to start from gpio 0: it's the main chipset
  99. * on most boards so documents and drivers assume gpio0..gpio127
  100. */
  101. static int gpio_base;
  102. gpio->label = dev_name(chip->dev);
  103. gpio->owner = THIS_MODULE;
  104. gpio->direction_input = gsta_gpio_direction_input;
  105. gpio->get = gsta_gpio_get;
  106. gpio->direction_output = gsta_gpio_direction_output;
  107. gpio->set = gsta_gpio_set;
  108. gpio->dbg_show = NULL;
  109. gpio->base = gpio_base;
  110. gpio->ngpio = GSTA_NR_GPIO;
  111. gpio->can_sleep = false;
  112. gpio->to_irq = gsta_gpio_to_irq;
  113. /*
  114. * After the first device, turn to dynamic gpio numbers.
  115. * For example, with ARCH_NR_GPIOS = 256 we can fit two cards
  116. */
  117. if (!gpio_base)
  118. gpio_base = -1;
  119. }
  120. /*
  121. * Special method: alternate functions and pullup/pulldown. This is only
  122. * invoked on startup to configure gpio's according to platform data.
  123. * FIXME : this functionality shall be managed (and exported to other drivers)
  124. * via the pin control subsystem.
  125. */
  126. static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)
  127. {
  128. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  129. unsigned long flags;
  130. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  131. u32 val;
  132. int err = 0;
  133. pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);
  134. if (cfg == PINMUX_TYPE_NONE)
  135. return;
  136. /* Alternate function or not? */
  137. spin_lock_irqsave(&chip->lock, flags);
  138. val = readl(&regs->afsela);
  139. if (cfg == PINMUX_TYPE_FUNCTION)
  140. val |= bit;
  141. else
  142. val &= ~bit;
  143. writel(val | bit, &regs->afsela);
  144. if (cfg == PINMUX_TYPE_FUNCTION) {
  145. spin_unlock_irqrestore(&chip->lock, flags);
  146. return;
  147. }
  148. /* not alternate function: set details */
  149. switch (cfg) {
  150. case PINMUX_TYPE_OUTPUT_LOW:
  151. writel(bit, &regs->dirs);
  152. writel(bit, &regs->datc);
  153. break;
  154. case PINMUX_TYPE_OUTPUT_HIGH:
  155. writel(bit, &regs->dirs);
  156. writel(bit, &regs->dats);
  157. break;
  158. case PINMUX_TYPE_INPUT:
  159. writel(bit, &regs->dirc);
  160. val = readl(&regs->pdis) | bit;
  161. writel(val, &regs->pdis);
  162. break;
  163. case PINMUX_TYPE_INPUT_PULLUP:
  164. writel(bit, &regs->dirc);
  165. val = readl(&regs->pdis) & ~bit;
  166. writel(val, &regs->pdis);
  167. writel(bit, &regs->dats);
  168. break;
  169. case PINMUX_TYPE_INPUT_PULLDOWN:
  170. writel(bit, &regs->dirc);
  171. val = readl(&regs->pdis) & ~bit;
  172. writel(val, &regs->pdis);
  173. writel(bit, &regs->datc);
  174. break;
  175. default:
  176. err = 1;
  177. }
  178. spin_unlock_irqrestore(&chip->lock, flags);
  179. if (err)
  180. pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",
  181. __func__, chip, nr, cfg);
  182. }
  183. /*
  184. * Irq methods
  185. */
  186. static void gsta_irq_disable(struct irq_data *data)
  187. {
  188. struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
  189. struct gsta_gpio *chip = gc->private;
  190. int nr = data->irq - chip->irq_base;
  191. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  192. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  193. u32 val;
  194. unsigned long flags;
  195. spin_lock_irqsave(&chip->lock, flags);
  196. if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) {
  197. val = readl(&regs->rimsc) & ~bit;
  198. writel(val, &regs->rimsc);
  199. }
  200. if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) {
  201. val = readl(&regs->fimsc) & ~bit;
  202. writel(val, &regs->fimsc);
  203. }
  204. spin_unlock_irqrestore(&chip->lock, flags);
  205. return;
  206. }
  207. static void gsta_irq_enable(struct irq_data *data)
  208. {
  209. struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
  210. struct gsta_gpio *chip = gc->private;
  211. int nr = data->irq - chip->irq_base;
  212. struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
  213. u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
  214. u32 val;
  215. int type;
  216. unsigned long flags;
  217. type = chip->irq_type[nr];
  218. spin_lock_irqsave(&chip->lock, flags);
  219. val = readl(&regs->rimsc);
  220. if (type & IRQ_TYPE_EDGE_RISING)
  221. writel(val | bit, &regs->rimsc);
  222. else
  223. writel(val & ~bit, &regs->rimsc);
  224. val = readl(&regs->rimsc);
  225. if (type & IRQ_TYPE_EDGE_FALLING)
  226. writel(val | bit, &regs->fimsc);
  227. else
  228. writel(val & ~bit, &regs->fimsc);
  229. spin_unlock_irqrestore(&chip->lock, flags);
  230. return;
  231. }
  232. static int gsta_irq_type(struct irq_data *d, unsigned int type)
  233. {
  234. struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
  235. struct gsta_gpio *chip = gc->private;
  236. int nr = d->irq - chip->irq_base;
  237. /* We only support edge interrupts */
  238. if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) {
  239. pr_debug("%s: unsupported type 0x%x\n", __func__, type);
  240. return -EINVAL;
  241. }
  242. chip->irq_type[nr] = type; /* used for enable/disable */
  243. gsta_irq_enable(d);
  244. return 0;
  245. }
  246. static irqreturn_t gsta_gpio_handler(int irq, void *dev_id)
  247. {
  248. struct gsta_gpio *chip = dev_id;
  249. struct gsta_regs __iomem *regs;
  250. u32 is;
  251. int i, nr, base;
  252. irqreturn_t ret = IRQ_NONE;
  253. for (i = 0; i < GSTA_NR_BLOCKS; i++) {
  254. regs = chip->regs[i];
  255. base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK;
  256. while ((is = readl(&regs->is))) {
  257. nr = __ffs(is);
  258. irq = base + nr;
  259. generic_handle_irq(irq);
  260. writel(1 << nr, &regs->ic);
  261. ret = IRQ_HANDLED;
  262. }
  263. }
  264. return ret;
  265. }
  266. static int gsta_alloc_irq_chip(struct gsta_gpio *chip)
  267. {
  268. struct irq_chip_generic *gc;
  269. struct irq_chip_type *ct;
  270. int rv;
  271. gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1,
  272. chip->irq_base,
  273. chip->reg_base, handle_simple_irq);
  274. if (!gc)
  275. return -ENOMEM;
  276. gc->private = chip;
  277. ct = gc->chip_types;
  278. ct->chip.irq_set_type = gsta_irq_type;
  279. ct->chip.irq_disable = gsta_irq_disable;
  280. ct->chip.irq_enable = gsta_irq_enable;
  281. /* FIXME: this makes at most 32 interrupts. Request 0 by now */
  282. rv = devm_irq_setup_generic_chip(chip->dev, gc,
  283. 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */,
  284. 0, IRQ_NOREQUEST | IRQ_NOPROBE, 0);
  285. if (rv)
  286. return rv;
  287. /* Set up all all 128 interrupts: code from setup_generic_chip */
  288. {
  289. struct irq_chip_type *ct = gc->chip_types;
  290. int i, j;
  291. for (j = 0; j < GSTA_NR_GPIO; j++) {
  292. i = chip->irq_base + j;
  293. irq_set_chip_and_handler(i, &ct->chip, ct->handler);
  294. irq_set_chip_data(i, gc);
  295. irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
  296. }
  297. gc->irq_cnt = i - gc->irq_base;
  298. }
  299. return 0;
  300. }
  301. /* The platform device used here is instantiated by the MFD device */
  302. static int gsta_probe(struct platform_device *dev)
  303. {
  304. int i, err;
  305. struct pci_dev *pdev;
  306. struct sta2x11_gpio_pdata *gpio_pdata;
  307. struct gsta_gpio *chip;
  308. pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);
  309. gpio_pdata = dev_get_platdata(&pdev->dev);
  310. if (gpio_pdata == NULL)
  311. dev_err(&dev->dev, "no gpio config\n");
  312. pr_debug("gpio config: %p\n", gpio_pdata);
  313. chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL);
  314. if (!chip)
  315. return -ENOMEM;
  316. chip->dev = &dev->dev;
  317. chip->reg_base = devm_platform_ioremap_resource(dev, 0);
  318. if (IS_ERR(chip->reg_base))
  319. return PTR_ERR(chip->reg_base);
  320. for (i = 0; i < GSTA_NR_BLOCKS; i++) {
  321. chip->regs[i] = chip->reg_base + i * 4096;
  322. /* disable all irqs */
  323. writel(0, &chip->regs[i]->rimsc);
  324. writel(0, &chip->regs[i]->fimsc);
  325. writel(~0, &chip->regs[i]->ic);
  326. }
  327. spin_lock_init(&chip->lock);
  328. gsta_gpio_setup(chip);
  329. if (gpio_pdata)
  330. for (i = 0; i < GSTA_NR_GPIO; i++)
  331. gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
  332. /* 384 was used in previous code: be compatible for other drivers */
  333. err = devm_irq_alloc_descs(&dev->dev, -1, 384,
  334. GSTA_NR_GPIO, NUMA_NO_NODE);
  335. if (err < 0) {
  336. dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n",
  337. -err);
  338. return err;
  339. }
  340. chip->irq_base = err;
  341. err = gsta_alloc_irq_chip(chip);
  342. if (err)
  343. return err;
  344. err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler,
  345. IRQF_SHARED, KBUILD_MODNAME, chip);
  346. if (err < 0) {
  347. dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n",
  348. -err);
  349. return err;
  350. }
  351. err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);
  352. if (err < 0) {
  353. dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n",
  354. -err);
  355. return err;
  356. }
  357. platform_set_drvdata(dev, chip);
  358. return 0;
  359. }
  360. static struct platform_driver sta2x11_gpio_platform_driver = {
  361. .driver = {
  362. .name = "sta2x11-gpio",
  363. .suppress_bind_attrs = true,
  364. },
  365. .probe = gsta_probe,
  366. };
  367. builtin_platform_driver(sta2x11_gpio_platform_driver);