gpio-sch311x.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * GPIO driver for the SMSC SCH311x Super-I/O chips
  4. *
  5. * Copyright (C) 2013 Bruno Randolf <br1@einfach.org>
  6. *
  7. * SuperIO functions and chip detection:
  8. * (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
  9. */
  10. #include <linux/ioport.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/gpio/driver.h>
  16. #include <linux/bitops.h>
  17. #include <linux/io.h>
  18. #define DRV_NAME "gpio-sch311x"
  19. #define SCH311X_GPIO_CONF_DIR BIT(0)
  20. #define SCH311X_GPIO_CONF_INVERT BIT(1)
  21. #define SCH311X_GPIO_CONF_OPEN_DRAIN BIT(7)
  22. #define SIO_CONFIG_KEY_ENTER 0x55
  23. #define SIO_CONFIG_KEY_EXIT 0xaa
  24. #define GP1 0x4b
  25. static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e };
  26. static struct platform_device *sch311x_gpio_pdev;
  27. struct sch311x_pdev_data { /* platform device data */
  28. unsigned short runtime_reg; /* runtime register base address */
  29. };
  30. struct sch311x_gpio_block { /* one GPIO block runtime data */
  31. struct gpio_chip chip;
  32. unsigned short data_reg; /* from definition below */
  33. unsigned short *config_regs; /* pointer to definition below */
  34. unsigned short runtime_reg; /* runtime register */
  35. spinlock_t lock; /* lock for this GPIO block */
  36. };
  37. struct sch311x_gpio_priv { /* driver private data */
  38. struct sch311x_gpio_block blocks[6];
  39. };
  40. struct sch311x_gpio_block_def { /* register address definitions */
  41. unsigned short data_reg;
  42. unsigned short config_regs[8];
  43. unsigned short base;
  44. };
  45. /* Note: some GPIOs are not available, these are marked with 0x00 */
  46. static struct sch311x_gpio_block_def sch311x_gpio_blocks[] = {
  47. {
  48. .data_reg = 0x4b, /* GP1 */
  49. .config_regs = {0x23, 0x24, 0x25, 0x26, 0x27, 0x29, 0x2a, 0x2b},
  50. .base = 10,
  51. },
  52. {
  53. .data_reg = 0x4c, /* GP2 */
  54. .config_regs = {0x00, 0x2c, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x32},
  55. .base = 20,
  56. },
  57. {
  58. .data_reg = 0x4d, /* GP3 */
  59. .config_regs = {0x33, 0x34, 0x35, 0x36, 0x37, 0x00, 0x39, 0x3a},
  60. .base = 30,
  61. },
  62. {
  63. .data_reg = 0x4e, /* GP4 */
  64. .config_regs = {0x3b, 0x00, 0x3d, 0x00, 0x6e, 0x6f, 0x72, 0x73},
  65. .base = 40,
  66. },
  67. {
  68. .data_reg = 0x4f, /* GP5 */
  69. .config_regs = {0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46},
  70. .base = 50,
  71. },
  72. {
  73. .data_reg = 0x50, /* GP6 */
  74. .config_regs = {0x47, 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59},
  75. .base = 60,
  76. },
  77. };
  78. /*
  79. * Super-IO functions
  80. */
  81. static inline int sch311x_sio_enter(int sio_config_port)
  82. {
  83. /* Don't step on other drivers' I/O space by accident. */
  84. if (!request_muxed_region(sio_config_port, 2, DRV_NAME)) {
  85. pr_err(DRV_NAME "I/O address 0x%04x already in use\n",
  86. sio_config_port);
  87. return -EBUSY;
  88. }
  89. outb(SIO_CONFIG_KEY_ENTER, sio_config_port);
  90. return 0;
  91. }
  92. static inline void sch311x_sio_exit(int sio_config_port)
  93. {
  94. outb(SIO_CONFIG_KEY_EXIT, sio_config_port);
  95. release_region(sio_config_port, 2);
  96. }
  97. static inline int sch311x_sio_inb(int sio_config_port, int reg)
  98. {
  99. outb(reg, sio_config_port);
  100. return inb(sio_config_port + 1);
  101. }
  102. static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
  103. {
  104. outb(reg, sio_config_port);
  105. outb(val, sio_config_port + 1);
  106. }
  107. /*
  108. * GPIO functions
  109. */
  110. static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset)
  111. {
  112. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  113. if (block->config_regs[offset] == 0) /* GPIO is not available */
  114. return -ENODEV;
  115. if (!request_region(block->runtime_reg + block->config_regs[offset],
  116. 1, DRV_NAME)) {
  117. dev_err(chip->parent, "Failed to request region 0x%04x.\n",
  118. block->runtime_reg + block->config_regs[offset]);
  119. return -EBUSY;
  120. }
  121. return 0;
  122. }
  123. static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset)
  124. {
  125. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  126. if (block->config_regs[offset] == 0) /* GPIO is not available */
  127. return;
  128. release_region(block->runtime_reg + block->config_regs[offset], 1);
  129. }
  130. static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset)
  131. {
  132. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  133. u8 data;
  134. spin_lock(&block->lock);
  135. data = inb(block->runtime_reg + block->data_reg);
  136. spin_unlock(&block->lock);
  137. return !!(data & BIT(offset));
  138. }
  139. static void __sch311x_gpio_set(struct sch311x_gpio_block *block,
  140. unsigned offset, int value)
  141. {
  142. u8 data = inb(block->runtime_reg + block->data_reg);
  143. if (value)
  144. data |= BIT(offset);
  145. else
  146. data &= ~BIT(offset);
  147. outb(data, block->runtime_reg + block->data_reg);
  148. }
  149. static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset,
  150. int value)
  151. {
  152. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  153. spin_lock(&block->lock);
  154. __sch311x_gpio_set(block, offset, value);
  155. spin_unlock(&block->lock);
  156. }
  157. static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
  158. {
  159. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  160. u8 data;
  161. spin_lock(&block->lock);
  162. data = inb(block->runtime_reg + block->config_regs[offset]);
  163. data |= SCH311X_GPIO_CONF_DIR;
  164. outb(data, block->runtime_reg + block->config_regs[offset]);
  165. spin_unlock(&block->lock);
  166. return 0;
  167. }
  168. static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
  169. int value)
  170. {
  171. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  172. u8 data;
  173. spin_lock(&block->lock);
  174. data = inb(block->runtime_reg + block->config_regs[offset]);
  175. data &= ~SCH311X_GPIO_CONF_DIR;
  176. outb(data, block->runtime_reg + block->config_regs[offset]);
  177. __sch311x_gpio_set(block, offset, value);
  178. spin_unlock(&block->lock);
  179. return 0;
  180. }
  181. static int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  182. {
  183. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  184. u8 data;
  185. spin_lock(&block->lock);
  186. data = inb(block->runtime_reg + block->config_regs[offset]);
  187. spin_unlock(&block->lock);
  188. if (data & SCH311X_GPIO_CONF_DIR)
  189. return GPIO_LINE_DIRECTION_IN;
  190. return GPIO_LINE_DIRECTION_OUT;
  191. }
  192. static int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
  193. unsigned long config)
  194. {
  195. struct sch311x_gpio_block *block = gpiochip_get_data(chip);
  196. enum pin_config_param param = pinconf_to_config_param(config);
  197. u8 data;
  198. switch (param) {
  199. case PIN_CONFIG_DRIVE_OPEN_DRAIN:
  200. spin_lock(&block->lock);
  201. data = inb(block->runtime_reg + block->config_regs[offset]);
  202. data |= SCH311X_GPIO_CONF_OPEN_DRAIN;
  203. outb(data, block->runtime_reg + block->config_regs[offset]);
  204. spin_unlock(&block->lock);
  205. return 0;
  206. case PIN_CONFIG_DRIVE_PUSH_PULL:
  207. spin_lock(&block->lock);
  208. data = inb(block->runtime_reg + block->config_regs[offset]);
  209. data &= ~SCH311X_GPIO_CONF_OPEN_DRAIN;
  210. outb(data, block->runtime_reg + block->config_regs[offset]);
  211. spin_unlock(&block->lock);
  212. return 0;
  213. default:
  214. break;
  215. }
  216. return -ENOTSUPP;
  217. }
  218. static int sch311x_gpio_probe(struct platform_device *pdev)
  219. {
  220. struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev);
  221. struct sch311x_gpio_priv *priv;
  222. struct sch311x_gpio_block *block;
  223. int err, i;
  224. /* we can register all GPIO data registers at once */
  225. if (!devm_request_region(&pdev->dev, pdata->runtime_reg + GP1, 6,
  226. DRV_NAME)) {
  227. dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n",
  228. pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5);
  229. return -EBUSY;
  230. }
  231. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  232. if (!priv)
  233. return -ENOMEM;
  234. platform_set_drvdata(pdev, priv);
  235. for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
  236. block = &priv->blocks[i];
  237. spin_lock_init(&block->lock);
  238. block->chip.label = DRV_NAME;
  239. block->chip.owner = THIS_MODULE;
  240. block->chip.request = sch311x_gpio_request;
  241. block->chip.free = sch311x_gpio_free;
  242. block->chip.direction_input = sch311x_gpio_direction_in;
  243. block->chip.direction_output = sch311x_gpio_direction_out;
  244. block->chip.get_direction = sch311x_gpio_get_direction;
  245. block->chip.set_config = sch311x_gpio_set_config;
  246. block->chip.get = sch311x_gpio_get;
  247. block->chip.set = sch311x_gpio_set;
  248. block->chip.ngpio = 8;
  249. block->chip.parent = &pdev->dev;
  250. block->chip.base = sch311x_gpio_blocks[i].base;
  251. block->config_regs = sch311x_gpio_blocks[i].config_regs;
  252. block->data_reg = sch311x_gpio_blocks[i].data_reg;
  253. block->runtime_reg = pdata->runtime_reg;
  254. err = gpiochip_add_data(&block->chip, block);
  255. if (err < 0) {
  256. dev_err(&pdev->dev,
  257. "Could not register gpiochip, %d\n", err);
  258. goto exit_err;
  259. }
  260. dev_info(&pdev->dev,
  261. "SMSC SCH311x GPIO block %d registered.\n", i);
  262. }
  263. return 0;
  264. exit_err:
  265. /* release already registered chips */
  266. for (--i; i >= 0; i--)
  267. gpiochip_remove(&priv->blocks[i].chip);
  268. return err;
  269. }
  270. static int sch311x_gpio_remove(struct platform_device *pdev)
  271. {
  272. struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev);
  273. int i;
  274. for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
  275. gpiochip_remove(&priv->blocks[i].chip);
  276. dev_info(&pdev->dev,
  277. "SMSC SCH311x GPIO block %d unregistered.\n", i);
  278. }
  279. return 0;
  280. }
  281. static struct platform_driver sch311x_gpio_driver = {
  282. .driver.name = DRV_NAME,
  283. .probe = sch311x_gpio_probe,
  284. .remove = sch311x_gpio_remove,
  285. };
  286. /*
  287. * Init & exit routines
  288. */
  289. static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
  290. {
  291. int err = 0, reg;
  292. unsigned short base_addr;
  293. u8 dev_id;
  294. err = sch311x_sio_enter(sio_config_port);
  295. if (err)
  296. return err;
  297. /* Check device ID. */
  298. reg = sch311x_sio_inb(sio_config_port, 0x20);
  299. switch (reg) {
  300. case 0x7c: /* SCH3112 */
  301. dev_id = 2;
  302. break;
  303. case 0x7d: /* SCH3114 */
  304. dev_id = 4;
  305. break;
  306. case 0x7f: /* SCH3116 */
  307. dev_id = 6;
  308. break;
  309. default:
  310. err = -ENODEV;
  311. goto exit;
  312. }
  313. /* Select logical device A (runtime registers) */
  314. sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
  315. /* Check if Logical Device Register is currently active */
  316. if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
  317. pr_info("Seems that LDN 0x0a is not active...\n");
  318. /* Get the base address of the runtime registers */
  319. base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
  320. sch311x_sio_inb(sio_config_port, 0x61);
  321. if (!base_addr) {
  322. pr_err("Base address not set\n");
  323. err = -ENODEV;
  324. goto exit;
  325. }
  326. *addr = base_addr;
  327. pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
  328. exit:
  329. sch311x_sio_exit(sio_config_port);
  330. return err;
  331. }
  332. static int __init sch311x_gpio_pdev_add(const unsigned short addr)
  333. {
  334. struct sch311x_pdev_data pdata;
  335. int err;
  336. pdata.runtime_reg = addr;
  337. sch311x_gpio_pdev = platform_device_alloc(DRV_NAME, -1);
  338. if (!sch311x_gpio_pdev)
  339. return -ENOMEM;
  340. err = platform_device_add_data(sch311x_gpio_pdev,
  341. &pdata, sizeof(pdata));
  342. if (err) {
  343. pr_err(DRV_NAME "Platform data allocation failed\n");
  344. goto err;
  345. }
  346. err = platform_device_add(sch311x_gpio_pdev);
  347. if (err) {
  348. pr_err(DRV_NAME "Device addition failed\n");
  349. goto err;
  350. }
  351. return 0;
  352. err:
  353. platform_device_put(sch311x_gpio_pdev);
  354. return err;
  355. }
  356. static int __init sch311x_gpio_init(void)
  357. {
  358. int err, i;
  359. unsigned short addr = 0;
  360. for (i = 0; i < ARRAY_SIZE(sch311x_ioports); i++)
  361. if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
  362. break;
  363. if (!addr)
  364. return -ENODEV;
  365. err = platform_driver_register(&sch311x_gpio_driver);
  366. if (err)
  367. return err;
  368. err = sch311x_gpio_pdev_add(addr);
  369. if (err)
  370. goto unreg_platform_driver;
  371. return 0;
  372. unreg_platform_driver:
  373. platform_driver_unregister(&sch311x_gpio_driver);
  374. return err;
  375. }
  376. static void __exit sch311x_gpio_exit(void)
  377. {
  378. platform_device_unregister(sch311x_gpio_pdev);
  379. platform_driver_unregister(&sch311x_gpio_driver);
  380. }
  381. module_init(sch311x_gpio_init);
  382. module_exit(sch311x_gpio_exit);
  383. MODULE_AUTHOR("Bruno Randolf <br1@einfach.org>");
  384. MODULE_DESCRIPTION("SMSC SCH311x GPIO Driver");
  385. MODULE_LICENSE("GPL");
  386. MODULE_ALIAS("platform:gpio-sch311x");