gpio-sch.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * GPIO interface for Intel Poulsbo SCH
  4. *
  5. * Copyright (c) 2010 CompuLab Ltd
  6. * Author: Denis Turischev <denis@compulab.co.il>
  7. */
  8. #include <linux/acpi.h>
  9. #include <linux/errno.h>
  10. #include <linux/gpio/driver.h>
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/pci_ids.h>
  15. #include <linux/platform_device.h>
  16. #define GEN 0x00
  17. #define GIO 0x04
  18. #define GLV 0x08
  19. struct sch_gpio {
  20. struct gpio_chip chip;
  21. spinlock_t lock;
  22. unsigned short iobase;
  23. unsigned short resume_base;
  24. };
  25. static unsigned int sch_gpio_offset(struct sch_gpio *sch, unsigned int gpio,
  26. unsigned int reg)
  27. {
  28. unsigned int base = 0;
  29. if (gpio >= sch->resume_base) {
  30. gpio -= sch->resume_base;
  31. base += 0x20;
  32. }
  33. return base + reg + gpio / 8;
  34. }
  35. static unsigned int sch_gpio_bit(struct sch_gpio *sch, unsigned int gpio)
  36. {
  37. if (gpio >= sch->resume_base)
  38. gpio -= sch->resume_base;
  39. return gpio % 8;
  40. }
  41. static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned int gpio, unsigned int reg)
  42. {
  43. unsigned short offset, bit;
  44. u8 reg_val;
  45. offset = sch_gpio_offset(sch, gpio, reg);
  46. bit = sch_gpio_bit(sch, gpio);
  47. reg_val = !!(inb(sch->iobase + offset) & BIT(bit));
  48. return reg_val;
  49. }
  50. static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned int gpio, unsigned int reg,
  51. int val)
  52. {
  53. unsigned short offset, bit;
  54. u8 reg_val;
  55. offset = sch_gpio_offset(sch, gpio, reg);
  56. bit = sch_gpio_bit(sch, gpio);
  57. reg_val = inb(sch->iobase + offset);
  58. if (val)
  59. outb(reg_val | BIT(bit), sch->iobase + offset);
  60. else
  61. outb((reg_val & ~BIT(bit)), sch->iobase + offset);
  62. }
  63. static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num)
  64. {
  65. struct sch_gpio *sch = gpiochip_get_data(gc);
  66. spin_lock(&sch->lock);
  67. sch_gpio_reg_set(sch, gpio_num, GIO, 1);
  68. spin_unlock(&sch->lock);
  69. return 0;
  70. }
  71. static int sch_gpio_get(struct gpio_chip *gc, unsigned int gpio_num)
  72. {
  73. struct sch_gpio *sch = gpiochip_get_data(gc);
  74. return sch_gpio_reg_get(sch, gpio_num, GLV);
  75. }
  76. static void sch_gpio_set(struct gpio_chip *gc, unsigned int gpio_num, int val)
  77. {
  78. struct sch_gpio *sch = gpiochip_get_data(gc);
  79. spin_lock(&sch->lock);
  80. sch_gpio_reg_set(sch, gpio_num, GLV, val);
  81. spin_unlock(&sch->lock);
  82. }
  83. static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned int gpio_num,
  84. int val)
  85. {
  86. struct sch_gpio *sch = gpiochip_get_data(gc);
  87. spin_lock(&sch->lock);
  88. sch_gpio_reg_set(sch, gpio_num, GIO, 0);
  89. spin_unlock(&sch->lock);
  90. /*
  91. * according to the datasheet, writing to the level register has no
  92. * effect when GPIO is programmed as input.
  93. * Actually the the level register is read-only when configured as input.
  94. * Thus presetting the output level before switching to output is _NOT_ possible.
  95. * Hence we set the level after configuring the GPIO as output.
  96. * But we cannot prevent a short low pulse if direction is set to high
  97. * and an external pull-up is connected.
  98. */
  99. sch_gpio_set(gc, gpio_num, val);
  100. return 0;
  101. }
  102. static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio_num)
  103. {
  104. struct sch_gpio *sch = gpiochip_get_data(gc);
  105. if (sch_gpio_reg_get(sch, gpio_num, GIO))
  106. return GPIO_LINE_DIRECTION_IN;
  107. return GPIO_LINE_DIRECTION_OUT;
  108. }
  109. static const struct gpio_chip sch_gpio_chip = {
  110. .label = "sch_gpio",
  111. .owner = THIS_MODULE,
  112. .direction_input = sch_gpio_direction_in,
  113. .get = sch_gpio_get,
  114. .direction_output = sch_gpio_direction_out,
  115. .set = sch_gpio_set,
  116. .get_direction = sch_gpio_get_direction,
  117. };
  118. static int sch_gpio_probe(struct platform_device *pdev)
  119. {
  120. struct sch_gpio *sch;
  121. struct resource *res;
  122. sch = devm_kzalloc(&pdev->dev, sizeof(*sch), GFP_KERNEL);
  123. if (!sch)
  124. return -ENOMEM;
  125. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  126. if (!res)
  127. return -EBUSY;
  128. if (!devm_request_region(&pdev->dev, res->start, resource_size(res),
  129. pdev->name))
  130. return -EBUSY;
  131. spin_lock_init(&sch->lock);
  132. sch->iobase = res->start;
  133. sch->chip = sch_gpio_chip;
  134. sch->chip.label = dev_name(&pdev->dev);
  135. sch->chip.parent = &pdev->dev;
  136. switch (pdev->id) {
  137. case PCI_DEVICE_ID_INTEL_SCH_LPC:
  138. sch->resume_base = 10;
  139. sch->chip.ngpio = 14;
  140. /*
  141. * GPIO[6:0] enabled by default
  142. * GPIO7 is configured by the CMC as SLPIOVR
  143. * Enable GPIO[9:8] core powered gpios explicitly
  144. */
  145. sch_gpio_reg_set(sch, 8, GEN, 1);
  146. sch_gpio_reg_set(sch, 9, GEN, 1);
  147. /*
  148. * SUS_GPIO[2:0] enabled by default
  149. * Enable SUS_GPIO3 resume powered gpio explicitly
  150. */
  151. sch_gpio_reg_set(sch, 13, GEN, 1);
  152. break;
  153. case PCI_DEVICE_ID_INTEL_ITC_LPC:
  154. sch->resume_base = 5;
  155. sch->chip.ngpio = 14;
  156. break;
  157. case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
  158. sch->resume_base = 21;
  159. sch->chip.ngpio = 30;
  160. break;
  161. case PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB:
  162. sch->resume_base = 2;
  163. sch->chip.ngpio = 8;
  164. break;
  165. default:
  166. return -ENODEV;
  167. }
  168. platform_set_drvdata(pdev, sch);
  169. return devm_gpiochip_add_data(&pdev->dev, &sch->chip, sch);
  170. }
  171. static struct platform_driver sch_gpio_driver = {
  172. .driver = {
  173. .name = "sch_gpio",
  174. },
  175. .probe = sch_gpio_probe,
  176. };
  177. module_platform_driver(sch_gpio_driver);
  178. MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
  179. MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
  180. MODULE_LICENSE("GPL v2");
  181. MODULE_ALIAS("platform:sch_gpio");