gpio-max732x.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MAX732x I2C Port Expander with 8/16 I/O
  4. *
  5. * Copyright (C) 2007 Marvell International Ltd.
  6. * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com>
  7. * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com>
  8. * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
  9. *
  10. * Derived from drivers/gpio/pca953x.c
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/string.h>
  16. #include <linux/gpio/driver.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_data/max732x.h>
  20. #include <linux/of.h>
  21. /*
  22. * Each port of MAX732x (including MAX7319) falls into one of the
  23. * following three types:
  24. *
  25. * - Push Pull Output
  26. * - Input
  27. * - Open Drain I/O
  28. *
  29. * designated by 'O', 'I' and 'P' individually according to MAXIM's
  30. * datasheets. 'I' and 'P' ports are interrupt capables, some with
  31. * a dedicated interrupt mask.
  32. *
  33. * There are two groups of I/O ports, each group usually includes
  34. * up to 8 I/O ports, and is accessed by a specific I2C address:
  35. *
  36. * - Group A : by I2C address 0b'110xxxx
  37. * - Group B : by I2C address 0b'101xxxx
  38. *
  39. * where 'xxxx' is decided by the connections of pin AD2/AD0. The
  40. * address used also affects the initial state of output signals.
  41. *
  42. * Within each group of ports, there are five known combinations of
  43. * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for
  44. * the detailed organization of these ports. Only Goup A is interrupt
  45. * capable.
  46. *
  47. * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16',
  48. * and GPIOs from GROUP_A are numbered before those from GROUP_B
  49. * (if there are two groups).
  50. *
  51. * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
  52. * they are not supported by this driver.
  53. */
  54. #define PORT_NONE 0x0 /* '/' No Port */
  55. #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
  56. #define PORT_INPUT 0x2 /* 'I' Input Only */
  57. #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
  58. #define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */
  59. #define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */
  60. #define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */
  61. #define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */
  62. #define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */
  63. #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */
  64. #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */
  65. #define INT_NONE 0x0 /* No interrupt capability */
  66. #define INT_NO_MASK 0x1 /* Has interrupts, no mask */
  67. #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */
  68. #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */
  69. #define INT_CAPS(x) (((uint64_t)(x)) << 32)
  70. enum {
  71. MAX7319,
  72. MAX7320,
  73. MAX7321,
  74. MAX7322,
  75. MAX7323,
  76. MAX7324,
  77. MAX7325,
  78. MAX7326,
  79. MAX7327,
  80. };
  81. static uint64_t max732x_features[] = {
  82. [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK),
  83. [MAX7320] = GROUP_B(IO_8O),
  84. [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK),
  85. [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK),
  86. [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK),
  87. [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK),
  88. [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK),
  89. [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK),
  90. [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK),
  91. };
  92. static const struct i2c_device_id max732x_id[] = {
  93. { "max7319", MAX7319 },
  94. { "max7320", MAX7320 },
  95. { "max7321", MAX7321 },
  96. { "max7322", MAX7322 },
  97. { "max7323", MAX7323 },
  98. { "max7324", MAX7324 },
  99. { "max7325", MAX7325 },
  100. { "max7326", MAX7326 },
  101. { "max7327", MAX7327 },
  102. { },
  103. };
  104. MODULE_DEVICE_TABLE(i2c, max732x_id);
  105. #ifdef CONFIG_OF
  106. static const struct of_device_id max732x_of_table[] = {
  107. { .compatible = "maxim,max7319" },
  108. { .compatible = "maxim,max7320" },
  109. { .compatible = "maxim,max7321" },
  110. { .compatible = "maxim,max7322" },
  111. { .compatible = "maxim,max7323" },
  112. { .compatible = "maxim,max7324" },
  113. { .compatible = "maxim,max7325" },
  114. { .compatible = "maxim,max7326" },
  115. { .compatible = "maxim,max7327" },
  116. { }
  117. };
  118. MODULE_DEVICE_TABLE(of, max732x_of_table);
  119. #endif
  120. struct max732x_chip {
  121. struct gpio_chip gpio_chip;
  122. struct i2c_client *client; /* "main" client */
  123. struct i2c_client *client_dummy;
  124. struct i2c_client *client_group_a;
  125. struct i2c_client *client_group_b;
  126. unsigned int mask_group_a;
  127. unsigned int dir_input;
  128. unsigned int dir_output;
  129. struct mutex lock;
  130. uint8_t reg_out[2];
  131. #ifdef CONFIG_GPIO_MAX732X_IRQ
  132. struct mutex irq_lock;
  133. uint8_t irq_mask;
  134. uint8_t irq_mask_cur;
  135. uint8_t irq_trig_raise;
  136. uint8_t irq_trig_fall;
  137. uint8_t irq_features;
  138. #endif
  139. };
  140. static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val)
  141. {
  142. struct i2c_client *client;
  143. int ret;
  144. client = group_a ? chip->client_group_a : chip->client_group_b;
  145. ret = i2c_smbus_write_byte(client, val);
  146. if (ret < 0) {
  147. dev_err(&client->dev, "failed writing\n");
  148. return ret;
  149. }
  150. return 0;
  151. }
  152. static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val)
  153. {
  154. struct i2c_client *client;
  155. int ret;
  156. client = group_a ? chip->client_group_a : chip->client_group_b;
  157. ret = i2c_smbus_read_byte(client);
  158. if (ret < 0) {
  159. dev_err(&client->dev, "failed reading\n");
  160. return ret;
  161. }
  162. *val = (uint8_t)ret;
  163. return 0;
  164. }
  165. static inline int is_group_a(struct max732x_chip *chip, unsigned off)
  166. {
  167. return (1u << off) & chip->mask_group_a;
  168. }
  169. static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off)
  170. {
  171. struct max732x_chip *chip = gpiochip_get_data(gc);
  172. uint8_t reg_val;
  173. int ret;
  174. ret = max732x_readb(chip, is_group_a(chip, off), &reg_val);
  175. if (ret < 0)
  176. return ret;
  177. return !!(reg_val & (1u << (off & 0x7)));
  178. }
  179. static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask,
  180. int val)
  181. {
  182. struct max732x_chip *chip = gpiochip_get_data(gc);
  183. uint8_t reg_out;
  184. int ret;
  185. mutex_lock(&chip->lock);
  186. reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0];
  187. reg_out = (reg_out & ~mask) | (val & mask);
  188. ret = max732x_writeb(chip, is_group_a(chip, off), reg_out);
  189. if (ret < 0)
  190. goto out;
  191. /* update the shadow register then */
  192. if (off > 7)
  193. chip->reg_out[1] = reg_out;
  194. else
  195. chip->reg_out[0] = reg_out;
  196. out:
  197. mutex_unlock(&chip->lock);
  198. }
  199. static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
  200. {
  201. unsigned base = off & ~0x7;
  202. uint8_t mask = 1u << (off & 0x7);
  203. max732x_gpio_set_mask(gc, base, mask, val << (off & 0x7));
  204. }
  205. static void max732x_gpio_set_multiple(struct gpio_chip *gc,
  206. unsigned long *mask, unsigned long *bits)
  207. {
  208. unsigned mask_lo = mask[0] & 0xff;
  209. unsigned mask_hi = (mask[0] >> 8) & 0xff;
  210. if (mask_lo)
  211. max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff);
  212. if (mask_hi)
  213. max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff);
  214. }
  215. static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
  216. {
  217. struct max732x_chip *chip = gpiochip_get_data(gc);
  218. unsigned int mask = 1u << off;
  219. if ((mask & chip->dir_input) == 0) {
  220. dev_dbg(&chip->client->dev, "%s port %d is output only\n",
  221. chip->client->name, off);
  222. return -EACCES;
  223. }
  224. /*
  225. * Open-drain pins must be set to high impedance (which is
  226. * equivalent to output-high) to be turned into an input.
  227. */
  228. if ((mask & chip->dir_output))
  229. max732x_gpio_set_value(gc, off, 1);
  230. return 0;
  231. }
  232. static int max732x_gpio_direction_output(struct gpio_chip *gc,
  233. unsigned off, int val)
  234. {
  235. struct max732x_chip *chip = gpiochip_get_data(gc);
  236. unsigned int mask = 1u << off;
  237. if ((mask & chip->dir_output) == 0) {
  238. dev_dbg(&chip->client->dev, "%s port %d is input only\n",
  239. chip->client->name, off);
  240. return -EACCES;
  241. }
  242. max732x_gpio_set_value(gc, off, val);
  243. return 0;
  244. }
  245. #ifdef CONFIG_GPIO_MAX732X_IRQ
  246. static int max732x_writew(struct max732x_chip *chip, uint16_t val)
  247. {
  248. int ret;
  249. val = cpu_to_le16(val);
  250. ret = i2c_master_send(chip->client_group_a, (char *)&val, 2);
  251. if (ret < 0) {
  252. dev_err(&chip->client_group_a->dev, "failed writing\n");
  253. return ret;
  254. }
  255. return 0;
  256. }
  257. static int max732x_readw(struct max732x_chip *chip, uint16_t *val)
  258. {
  259. int ret;
  260. ret = i2c_master_recv(chip->client_group_a, (char *)val, 2);
  261. if (ret < 0) {
  262. dev_err(&chip->client_group_a->dev, "failed reading\n");
  263. return ret;
  264. }
  265. *val = le16_to_cpu(*val);
  266. return 0;
  267. }
  268. static void max732x_irq_update_mask(struct max732x_chip *chip)
  269. {
  270. uint16_t msg;
  271. if (chip->irq_mask == chip->irq_mask_cur)
  272. return;
  273. chip->irq_mask = chip->irq_mask_cur;
  274. if (chip->irq_features == INT_NO_MASK)
  275. return;
  276. mutex_lock(&chip->lock);
  277. switch (chip->irq_features) {
  278. case INT_INDEP_MASK:
  279. msg = (chip->irq_mask << 8) | chip->reg_out[0];
  280. max732x_writew(chip, msg);
  281. break;
  282. case INT_MERGED_MASK:
  283. msg = chip->irq_mask | chip->reg_out[0];
  284. max732x_writeb(chip, 1, (uint8_t)msg);
  285. break;
  286. }
  287. mutex_unlock(&chip->lock);
  288. }
  289. static void max732x_irq_mask(struct irq_data *d)
  290. {
  291. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  292. struct max732x_chip *chip = gpiochip_get_data(gc);
  293. chip->irq_mask_cur &= ~(1 << d->hwirq);
  294. }
  295. static void max732x_irq_unmask(struct irq_data *d)
  296. {
  297. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  298. struct max732x_chip *chip = gpiochip_get_data(gc);
  299. chip->irq_mask_cur |= 1 << d->hwirq;
  300. }
  301. static void max732x_irq_bus_lock(struct irq_data *d)
  302. {
  303. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  304. struct max732x_chip *chip = gpiochip_get_data(gc);
  305. mutex_lock(&chip->irq_lock);
  306. chip->irq_mask_cur = chip->irq_mask;
  307. }
  308. static void max732x_irq_bus_sync_unlock(struct irq_data *d)
  309. {
  310. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  311. struct max732x_chip *chip = gpiochip_get_data(gc);
  312. uint16_t new_irqs;
  313. uint16_t level;
  314. max732x_irq_update_mask(chip);
  315. new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
  316. while (new_irqs) {
  317. level = __ffs(new_irqs);
  318. max732x_gpio_direction_input(&chip->gpio_chip, level);
  319. new_irqs &= ~(1 << level);
  320. }
  321. mutex_unlock(&chip->irq_lock);
  322. }
  323. static int max732x_irq_set_type(struct irq_data *d, unsigned int type)
  324. {
  325. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  326. struct max732x_chip *chip = gpiochip_get_data(gc);
  327. uint16_t off = d->hwirq;
  328. uint16_t mask = 1 << off;
  329. if (!(mask & chip->dir_input)) {
  330. dev_dbg(&chip->client->dev, "%s port %d is output only\n",
  331. chip->client->name, off);
  332. return -EACCES;
  333. }
  334. if (!(type & IRQ_TYPE_EDGE_BOTH)) {
  335. dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
  336. d->irq, type);
  337. return -EINVAL;
  338. }
  339. if (type & IRQ_TYPE_EDGE_FALLING)
  340. chip->irq_trig_fall |= mask;
  341. else
  342. chip->irq_trig_fall &= ~mask;
  343. if (type & IRQ_TYPE_EDGE_RISING)
  344. chip->irq_trig_raise |= mask;
  345. else
  346. chip->irq_trig_raise &= ~mask;
  347. return 0;
  348. }
  349. static int max732x_irq_set_wake(struct irq_data *data, unsigned int on)
  350. {
  351. struct max732x_chip *chip = irq_data_get_irq_chip_data(data);
  352. irq_set_irq_wake(chip->client->irq, on);
  353. return 0;
  354. }
  355. static struct irq_chip max732x_irq_chip = {
  356. .name = "max732x",
  357. .irq_mask = max732x_irq_mask,
  358. .irq_unmask = max732x_irq_unmask,
  359. .irq_bus_lock = max732x_irq_bus_lock,
  360. .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock,
  361. .irq_set_type = max732x_irq_set_type,
  362. .irq_set_wake = max732x_irq_set_wake,
  363. };
  364. static uint8_t max732x_irq_pending(struct max732x_chip *chip)
  365. {
  366. uint8_t cur_stat;
  367. uint8_t old_stat;
  368. uint8_t trigger;
  369. uint8_t pending;
  370. uint16_t status;
  371. int ret;
  372. ret = max732x_readw(chip, &status);
  373. if (ret)
  374. return 0;
  375. trigger = status >> 8;
  376. trigger &= chip->irq_mask;
  377. if (!trigger)
  378. return 0;
  379. cur_stat = status & 0xFF;
  380. cur_stat &= chip->irq_mask;
  381. old_stat = cur_stat ^ trigger;
  382. pending = (old_stat & chip->irq_trig_fall) |
  383. (cur_stat & chip->irq_trig_raise);
  384. pending &= trigger;
  385. return pending;
  386. }
  387. static irqreturn_t max732x_irq_handler(int irq, void *devid)
  388. {
  389. struct max732x_chip *chip = devid;
  390. uint8_t pending;
  391. uint8_t level;
  392. pending = max732x_irq_pending(chip);
  393. if (!pending)
  394. return IRQ_HANDLED;
  395. do {
  396. level = __ffs(pending);
  397. handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
  398. level));
  399. pending &= ~(1 << level);
  400. } while (pending);
  401. return IRQ_HANDLED;
  402. }
  403. static int max732x_irq_setup(struct max732x_chip *chip,
  404. const struct i2c_device_id *id)
  405. {
  406. struct i2c_client *client = chip->client;
  407. struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
  408. int has_irq = max732x_features[id->driver_data] >> 32;
  409. int irq_base = 0;
  410. int ret;
  411. if (((pdata && pdata->irq_base) || client->irq)
  412. && has_irq != INT_NONE) {
  413. struct gpio_irq_chip *girq;
  414. if (pdata)
  415. irq_base = pdata->irq_base;
  416. chip->irq_features = has_irq;
  417. mutex_init(&chip->irq_lock);
  418. ret = devm_request_threaded_irq(&client->dev, client->irq,
  419. NULL, max732x_irq_handler, IRQF_ONESHOT |
  420. IRQF_TRIGGER_FALLING | IRQF_SHARED,
  421. dev_name(&client->dev), chip);
  422. if (ret) {
  423. dev_err(&client->dev, "failed to request irq %d\n",
  424. client->irq);
  425. return ret;
  426. }
  427. girq = &chip->gpio_chip.irq;
  428. girq->chip = &max732x_irq_chip;
  429. /* This will let us handle the parent IRQ in the driver */
  430. girq->parent_handler = NULL;
  431. girq->num_parents = 0;
  432. girq->parents = NULL;
  433. girq->default_type = IRQ_TYPE_NONE;
  434. girq->handler = handle_simple_irq;
  435. girq->threaded = true;
  436. girq->first = irq_base; /* FIXME: get rid of this */
  437. }
  438. return 0;
  439. }
  440. #else /* CONFIG_GPIO_MAX732X_IRQ */
  441. static int max732x_irq_setup(struct max732x_chip *chip,
  442. const struct i2c_device_id *id)
  443. {
  444. struct i2c_client *client = chip->client;
  445. struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
  446. int has_irq = max732x_features[id->driver_data] >> 32;
  447. if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE)
  448. dev_warn(&client->dev, "interrupt support not compiled in\n");
  449. return 0;
  450. }
  451. #endif
  452. static int max732x_setup_gpio(struct max732x_chip *chip,
  453. const struct i2c_device_id *id,
  454. unsigned gpio_start)
  455. {
  456. struct gpio_chip *gc = &chip->gpio_chip;
  457. uint32_t id_data = (uint32_t)max732x_features[id->driver_data];
  458. int i, port = 0;
  459. for (i = 0; i < 16; i++, id_data >>= 2) {
  460. unsigned int mask = 1 << port;
  461. switch (id_data & 0x3) {
  462. case PORT_OUTPUT:
  463. chip->dir_output |= mask;
  464. break;
  465. case PORT_INPUT:
  466. chip->dir_input |= mask;
  467. break;
  468. case PORT_OPENDRAIN:
  469. chip->dir_output |= mask;
  470. chip->dir_input |= mask;
  471. break;
  472. default:
  473. continue;
  474. }
  475. if (i < 8)
  476. chip->mask_group_a |= mask;
  477. port++;
  478. }
  479. if (chip->dir_input)
  480. gc->direction_input = max732x_gpio_direction_input;
  481. if (chip->dir_output) {
  482. gc->direction_output = max732x_gpio_direction_output;
  483. gc->set = max732x_gpio_set_value;
  484. gc->set_multiple = max732x_gpio_set_multiple;
  485. }
  486. gc->get = max732x_gpio_get_value;
  487. gc->can_sleep = true;
  488. gc->base = gpio_start;
  489. gc->ngpio = port;
  490. gc->label = chip->client->name;
  491. gc->parent = &chip->client->dev;
  492. gc->owner = THIS_MODULE;
  493. return port;
  494. }
  495. static struct max732x_platform_data *of_gpio_max732x(struct device *dev)
  496. {
  497. struct max732x_platform_data *pdata;
  498. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  499. if (!pdata)
  500. return NULL;
  501. pdata->gpio_base = -1;
  502. return pdata;
  503. }
  504. static int max732x_probe(struct i2c_client *client,
  505. const struct i2c_device_id *id)
  506. {
  507. struct max732x_platform_data *pdata;
  508. struct device_node *node;
  509. struct max732x_chip *chip;
  510. struct i2c_client *c;
  511. uint16_t addr_a, addr_b;
  512. int ret, nr_port;
  513. pdata = dev_get_platdata(&client->dev);
  514. node = client->dev.of_node;
  515. if (!pdata && node)
  516. pdata = of_gpio_max732x(&client->dev);
  517. if (!pdata) {
  518. dev_dbg(&client->dev, "no platform data\n");
  519. return -EINVAL;
  520. }
  521. chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
  522. if (chip == NULL)
  523. return -ENOMEM;
  524. chip->client = client;
  525. nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base);
  526. chip->gpio_chip.parent = &client->dev;
  527. addr_a = (client->addr & 0x0f) | 0x60;
  528. addr_b = (client->addr & 0x0f) | 0x50;
  529. switch (client->addr & 0x70) {
  530. case 0x60:
  531. chip->client_group_a = client;
  532. if (nr_port > 8) {
  533. c = devm_i2c_new_dummy_device(&client->dev,
  534. client->adapter, addr_b);
  535. if (IS_ERR(c)) {
  536. dev_err(&client->dev,
  537. "Failed to allocate I2C device\n");
  538. return PTR_ERR(c);
  539. }
  540. chip->client_group_b = chip->client_dummy = c;
  541. }
  542. break;
  543. case 0x50:
  544. chip->client_group_b = client;
  545. if (nr_port > 8) {
  546. c = devm_i2c_new_dummy_device(&client->dev,
  547. client->adapter, addr_a);
  548. if (IS_ERR(c)) {
  549. dev_err(&client->dev,
  550. "Failed to allocate I2C device\n");
  551. return PTR_ERR(c);
  552. }
  553. chip->client_group_a = chip->client_dummy = c;
  554. }
  555. break;
  556. default:
  557. dev_err(&client->dev, "invalid I2C address specified %02x\n",
  558. client->addr);
  559. return -EINVAL;
  560. }
  561. if (nr_port > 8 && !chip->client_dummy) {
  562. dev_err(&client->dev,
  563. "Failed to allocate second group I2C device\n");
  564. return -ENODEV;
  565. }
  566. mutex_init(&chip->lock);
  567. ret = max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]);
  568. if (ret)
  569. return ret;
  570. if (nr_port > 8) {
  571. ret = max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]);
  572. if (ret)
  573. return ret;
  574. }
  575. ret = max732x_irq_setup(chip, id);
  576. if (ret)
  577. return ret;
  578. ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
  579. if (ret)
  580. return ret;
  581. if (pdata->setup) {
  582. ret = pdata->setup(client, chip->gpio_chip.base,
  583. chip->gpio_chip.ngpio, pdata->context);
  584. if (ret < 0)
  585. dev_warn(&client->dev, "setup failed, %d\n", ret);
  586. }
  587. i2c_set_clientdata(client, chip);
  588. return 0;
  589. }
  590. static int max732x_remove(struct i2c_client *client)
  591. {
  592. struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
  593. struct max732x_chip *chip = i2c_get_clientdata(client);
  594. if (pdata && pdata->teardown) {
  595. int ret;
  596. ret = pdata->teardown(client, chip->gpio_chip.base,
  597. chip->gpio_chip.ngpio, pdata->context);
  598. if (ret < 0) {
  599. dev_err(&client->dev, "%s failed, %d\n",
  600. "teardown", ret);
  601. return ret;
  602. }
  603. }
  604. return 0;
  605. }
  606. static struct i2c_driver max732x_driver = {
  607. .driver = {
  608. .name = "max732x",
  609. .of_match_table = of_match_ptr(max732x_of_table),
  610. },
  611. .probe = max732x_probe,
  612. .remove = max732x_remove,
  613. .id_table = max732x_id,
  614. };
  615. static int __init max732x_init(void)
  616. {
  617. return i2c_add_driver(&max732x_driver);
  618. }
  619. /* register after i2c postcore initcall and before
  620. * subsys initcalls that may rely on these GPIOs
  621. */
  622. subsys_initcall(max732x_init);
  623. static void __exit max732x_exit(void)
  624. {
  625. i2c_del_driver(&max732x_driver);
  626. }
  627. module_exit(max732x_exit);
  628. MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
  629. MODULE_DESCRIPTION("GPIO expander driver for MAX732X");
  630. MODULE_LICENSE("GPL");