fsi-occ.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/device.h>
  3. #include <linux/err.h>
  4. #include <linux/errno.h>
  5. #include <linux/fs.h>
  6. #include <linux/fsi-sbefifo.h>
  7. #include <linux/gfp.h>
  8. #include <linux/idr.h>
  9. #include <linux/kernel.h>
  10. #include <linux/list.h>
  11. #include <linux/miscdevice.h>
  12. #include <linux/module.h>
  13. #include <linux/mutex.h>
  14. #include <linux/fsi-occ.h>
  15. #include <linux/of.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sched.h>
  18. #include <linux/slab.h>
  19. #include <linux/uaccess.h>
  20. #include <asm/unaligned.h>
  21. #define OCC_SRAM_BYTES 4096
  22. #define OCC_CMD_DATA_BYTES 4090
  23. #define OCC_RESP_DATA_BYTES 4089
  24. #define OCC_SRAM_CMD_ADDR 0xFFFBE000
  25. #define OCC_SRAM_RSP_ADDR 0xFFFBF000
  26. /*
  27. * Assume we don't have much FFDC, if we do we'll overflow and
  28. * fail the command. This needs to be big enough for simple
  29. * commands as well.
  30. */
  31. #define OCC_SBE_STATUS_WORDS 32
  32. #define OCC_TIMEOUT_MS 1000
  33. #define OCC_CMD_IN_PRG_WAIT_MS 50
  34. struct occ {
  35. struct device *dev;
  36. struct device *sbefifo;
  37. char name[32];
  38. int idx;
  39. struct miscdevice mdev;
  40. struct mutex occ_lock;
  41. };
  42. #define to_occ(x) container_of((x), struct occ, mdev)
  43. struct occ_response {
  44. u8 seq_no;
  45. u8 cmd_type;
  46. u8 return_status;
  47. __be16 data_length;
  48. u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
  49. } __packed;
  50. struct occ_client {
  51. struct occ *occ;
  52. struct mutex lock;
  53. size_t data_size;
  54. size_t read_offset;
  55. u8 *buffer;
  56. };
  57. #define to_client(x) container_of((x), struct occ_client, xfr)
  58. static DEFINE_IDA(occ_ida);
  59. static int occ_open(struct inode *inode, struct file *file)
  60. {
  61. struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
  62. struct miscdevice *mdev = file->private_data;
  63. struct occ *occ = to_occ(mdev);
  64. if (!client)
  65. return -ENOMEM;
  66. client->buffer = (u8 *)__get_free_page(GFP_KERNEL);
  67. if (!client->buffer) {
  68. kfree(client);
  69. return -ENOMEM;
  70. }
  71. client->occ = occ;
  72. mutex_init(&client->lock);
  73. file->private_data = client;
  74. /* We allocate a 1-page buffer, make sure it all fits */
  75. BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE);
  76. BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE);
  77. return 0;
  78. }
  79. static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
  80. loff_t *offset)
  81. {
  82. struct occ_client *client = file->private_data;
  83. ssize_t rc = 0;
  84. if (!client)
  85. return -ENODEV;
  86. if (len > OCC_SRAM_BYTES)
  87. return -EINVAL;
  88. mutex_lock(&client->lock);
  89. /* This should not be possible ... */
  90. if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
  91. rc = -EIO;
  92. goto done;
  93. }
  94. /* Grab how much data we have to read */
  95. rc = min(len, client->data_size - client->read_offset);
  96. if (copy_to_user(buf, client->buffer + client->read_offset, rc))
  97. rc = -EFAULT;
  98. else
  99. client->read_offset += rc;
  100. done:
  101. mutex_unlock(&client->lock);
  102. return rc;
  103. }
  104. static ssize_t occ_write(struct file *file, const char __user *buf,
  105. size_t len, loff_t *offset)
  106. {
  107. struct occ_client *client = file->private_data;
  108. size_t rlen, data_length;
  109. u16 checksum = 0;
  110. ssize_t rc, i;
  111. u8 *cmd;
  112. if (!client)
  113. return -ENODEV;
  114. if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
  115. return -EINVAL;
  116. mutex_lock(&client->lock);
  117. /* Construct the command */
  118. cmd = client->buffer;
  119. /* Sequence number (we could increment and compare with response) */
  120. cmd[0] = 1;
  121. /*
  122. * Copy the user command (assume user data follows the occ command
  123. * format)
  124. * byte 0: command type
  125. * bytes 1-2: data length (msb first)
  126. * bytes 3-n: data
  127. */
  128. if (copy_from_user(&cmd[1], buf, len)) {
  129. rc = -EFAULT;
  130. goto done;
  131. }
  132. /* Extract data length */
  133. data_length = (cmd[2] << 8) + cmd[3];
  134. if (data_length > OCC_CMD_DATA_BYTES) {
  135. rc = -EINVAL;
  136. goto done;
  137. }
  138. /* Calculate checksum */
  139. for (i = 0; i < data_length + 4; ++i)
  140. checksum += cmd[i];
  141. cmd[data_length + 4] = checksum >> 8;
  142. cmd[data_length + 5] = checksum & 0xFF;
  143. /* Submit command */
  144. rlen = PAGE_SIZE;
  145. rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
  146. &rlen);
  147. if (rc)
  148. goto done;
  149. /* Set read tracking data */
  150. client->data_size = rlen;
  151. client->read_offset = 0;
  152. /* Done */
  153. rc = len;
  154. done:
  155. mutex_unlock(&client->lock);
  156. return rc;
  157. }
  158. static int occ_release(struct inode *inode, struct file *file)
  159. {
  160. struct occ_client *client = file->private_data;
  161. free_page((unsigned long)client->buffer);
  162. kfree(client);
  163. return 0;
  164. }
  165. static const struct file_operations occ_fops = {
  166. .owner = THIS_MODULE,
  167. .open = occ_open,
  168. .read = occ_read,
  169. .write = occ_write,
  170. .release = occ_release,
  171. };
  172. static int occ_verify_checksum(struct occ_response *resp, u16 data_length)
  173. {
  174. /* Fetch the two bytes after the data for the checksum. */
  175. u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
  176. u16 checksum;
  177. u16 i;
  178. checksum = resp->seq_no;
  179. checksum += resp->cmd_type;
  180. checksum += resp->return_status;
  181. checksum += (data_length >> 8) + (data_length & 0xFF);
  182. for (i = 0; i < data_length; ++i)
  183. checksum += resp->data[i];
  184. if (checksum != checksum_resp)
  185. return -EBADMSG;
  186. return 0;
  187. }
  188. static int occ_getsram(struct occ *occ, u32 address, void *data, ssize_t len)
  189. {
  190. u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
  191. size_t resp_len, resp_data_len;
  192. __be32 *resp, cmd[5];
  193. int rc;
  194. /*
  195. * Magic sequence to do SBE getsram command. SBE will fetch data from
  196. * specified SRAM address.
  197. */
  198. cmd[0] = cpu_to_be32(0x5);
  199. cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
  200. cmd[2] = cpu_to_be32(1);
  201. cmd[3] = cpu_to_be32(address);
  202. cmd[4] = cpu_to_be32(data_len);
  203. resp_len = (data_len >> 2) + OCC_SBE_STATUS_WORDS;
  204. resp = kzalloc(resp_len << 2, GFP_KERNEL);
  205. if (!resp)
  206. return -ENOMEM;
  207. rc = sbefifo_submit(occ->sbefifo, cmd, 5, resp, &resp_len);
  208. if (rc)
  209. goto free;
  210. rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
  211. resp, resp_len, &resp_len);
  212. if (rc)
  213. goto free;
  214. resp_data_len = be32_to_cpu(resp[resp_len - 1]);
  215. if (resp_data_len != data_len) {
  216. dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
  217. data_len, resp_data_len);
  218. rc = -EBADMSG;
  219. } else {
  220. memcpy(data, resp, len);
  221. }
  222. free:
  223. /* Convert positive SBEI status */
  224. if (rc > 0) {
  225. dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
  226. rc);
  227. rc = -EBADMSG;
  228. }
  229. kfree(resp);
  230. return rc;
  231. }
  232. static int occ_putsram(struct occ *occ, u32 address, const void *data,
  233. ssize_t len)
  234. {
  235. size_t cmd_len, buf_len, resp_len, resp_data_len;
  236. u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
  237. __be32 *buf;
  238. int rc;
  239. /*
  240. * We use the same buffer for command and response, make
  241. * sure it's big enough
  242. */
  243. resp_len = OCC_SBE_STATUS_WORDS;
  244. cmd_len = (data_len >> 2) + 5;
  245. buf_len = max(cmd_len, resp_len);
  246. buf = kzalloc(buf_len << 2, GFP_KERNEL);
  247. if (!buf)
  248. return -ENOMEM;
  249. /*
  250. * Magic sequence to do SBE putsram command. SBE will transfer
  251. * data to specified SRAM address.
  252. */
  253. buf[0] = cpu_to_be32(cmd_len);
  254. buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
  255. buf[2] = cpu_to_be32(1);
  256. buf[3] = cpu_to_be32(address);
  257. buf[4] = cpu_to_be32(data_len);
  258. memcpy(&buf[5], data, len);
  259. rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
  260. if (rc)
  261. goto free;
  262. rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
  263. buf, resp_len, &resp_len);
  264. if (rc)
  265. goto free;
  266. if (resp_len != 1) {
  267. dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
  268. resp_len);
  269. rc = -EBADMSG;
  270. } else {
  271. resp_data_len = be32_to_cpu(buf[0]);
  272. if (resp_data_len != data_len) {
  273. dev_err(occ->dev,
  274. "SRAM write expected %d bytes got %zd\n",
  275. data_len, resp_data_len);
  276. rc = -EBADMSG;
  277. }
  278. }
  279. free:
  280. /* Convert positive SBEI status */
  281. if (rc > 0) {
  282. dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
  283. rc);
  284. rc = -EBADMSG;
  285. }
  286. kfree(buf);
  287. return rc;
  288. }
  289. static int occ_trigger_attn(struct occ *occ)
  290. {
  291. __be32 buf[OCC_SBE_STATUS_WORDS];
  292. size_t resp_len, resp_data_len;
  293. int rc;
  294. BUILD_BUG_ON(OCC_SBE_STATUS_WORDS < 7);
  295. resp_len = OCC_SBE_STATUS_WORDS;
  296. buf[0] = cpu_to_be32(0x5 + 0x2); /* Chip-op length in words */
  297. buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
  298. buf[2] = cpu_to_be32(0x3); /* Mode: Circular */
  299. buf[3] = cpu_to_be32(0x0); /* Address: ignore in mode 3 */
  300. buf[4] = cpu_to_be32(0x8); /* Data length in bytes */
  301. buf[5] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
  302. buf[6] = 0;
  303. rc = sbefifo_submit(occ->sbefifo, buf, 7, buf, &resp_len);
  304. if (rc)
  305. goto error;
  306. rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
  307. buf, resp_len, &resp_len);
  308. if (rc)
  309. goto error;
  310. if (resp_len != 1) {
  311. dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
  312. resp_len);
  313. rc = -EBADMSG;
  314. } else {
  315. resp_data_len = be32_to_cpu(buf[0]);
  316. if (resp_data_len != 8) {
  317. dev_err(occ->dev,
  318. "SRAM attn expected 8 bytes got %zd\n",
  319. resp_data_len);
  320. rc = -EBADMSG;
  321. }
  322. }
  323. error:
  324. /* Convert positive SBEI status */
  325. if (rc > 0) {
  326. dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
  327. rc);
  328. rc = -EBADMSG;
  329. }
  330. return rc;
  331. }
  332. int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
  333. void *response, size_t *resp_len)
  334. {
  335. const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
  336. const unsigned long wait_time =
  337. msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
  338. struct occ *occ = dev_get_drvdata(dev);
  339. struct occ_response *resp = response;
  340. u8 seq_no;
  341. u16 resp_data_length;
  342. unsigned long start;
  343. int rc;
  344. if (!occ)
  345. return -ENODEV;
  346. if (*resp_len < 7) {
  347. dev_dbg(dev, "Bad resplen %zd\n", *resp_len);
  348. return -EINVAL;
  349. }
  350. mutex_lock(&occ->occ_lock);
  351. /* Extract the seq_no from the command (first byte) */
  352. seq_no = *(const u8 *)request;
  353. rc = occ_putsram(occ, OCC_SRAM_CMD_ADDR, request, req_len);
  354. if (rc)
  355. goto done;
  356. rc = occ_trigger_attn(occ);
  357. if (rc)
  358. goto done;
  359. /* Read occ response header */
  360. start = jiffies;
  361. do {
  362. rc = occ_getsram(occ, OCC_SRAM_RSP_ADDR, resp, 8);
  363. if (rc)
  364. goto done;
  365. if (resp->return_status == OCC_RESP_CMD_IN_PRG ||
  366. resp->return_status == OCC_RESP_CRIT_INIT ||
  367. resp->seq_no != seq_no) {
  368. rc = -ETIMEDOUT;
  369. if (time_after(jiffies, start + timeout)) {
  370. dev_err(occ->dev, "resp timeout status=%02x "
  371. "resp seq_no=%d our seq_no=%d\n",
  372. resp->return_status, resp->seq_no,
  373. seq_no);
  374. goto done;
  375. }
  376. set_current_state(TASK_UNINTERRUPTIBLE);
  377. schedule_timeout(wait_time);
  378. }
  379. } while (rc);
  380. /* Extract size of response data */
  381. resp_data_length = get_unaligned_be16(&resp->data_length);
  382. /* Message size is data length + 5 bytes header + 2 bytes checksum */
  383. if ((resp_data_length + 7) > *resp_len) {
  384. rc = -EMSGSIZE;
  385. goto done;
  386. }
  387. dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
  388. resp->return_status, resp_data_length);
  389. /* Grab the rest */
  390. if (resp_data_length > 1) {
  391. /* already got 3 bytes resp, also need 2 bytes checksum */
  392. rc = occ_getsram(occ, OCC_SRAM_RSP_ADDR + 8,
  393. &resp->data[3], resp_data_length - 1);
  394. if (rc)
  395. goto done;
  396. }
  397. *resp_len = resp_data_length + 7;
  398. rc = occ_verify_checksum(resp, resp_data_length);
  399. done:
  400. mutex_unlock(&occ->occ_lock);
  401. return rc;
  402. }
  403. EXPORT_SYMBOL_GPL(fsi_occ_submit);
  404. static int occ_unregister_child(struct device *dev, void *data)
  405. {
  406. struct platform_device *hwmon_dev = to_platform_device(dev);
  407. platform_device_unregister(hwmon_dev);
  408. return 0;
  409. }
  410. static int occ_probe(struct platform_device *pdev)
  411. {
  412. int rc;
  413. u32 reg;
  414. struct occ *occ;
  415. struct platform_device *hwmon_dev;
  416. struct device *dev = &pdev->dev;
  417. struct platform_device_info hwmon_dev_info = {
  418. .parent = dev,
  419. .name = "occ-hwmon",
  420. };
  421. occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
  422. if (!occ)
  423. return -ENOMEM;
  424. occ->dev = dev;
  425. occ->sbefifo = dev->parent;
  426. mutex_init(&occ->occ_lock);
  427. if (dev->of_node) {
  428. rc = of_property_read_u32(dev->of_node, "reg", &reg);
  429. if (!rc) {
  430. /* make sure we don't have a duplicate from dts */
  431. occ->idx = ida_simple_get(&occ_ida, reg, reg + 1,
  432. GFP_KERNEL);
  433. if (occ->idx < 0)
  434. occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
  435. GFP_KERNEL);
  436. } else {
  437. occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
  438. GFP_KERNEL);
  439. }
  440. } else {
  441. occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL);
  442. }
  443. platform_set_drvdata(pdev, occ);
  444. snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
  445. occ->mdev.fops = &occ_fops;
  446. occ->mdev.minor = MISC_DYNAMIC_MINOR;
  447. occ->mdev.name = occ->name;
  448. occ->mdev.parent = dev;
  449. rc = misc_register(&occ->mdev);
  450. if (rc) {
  451. dev_err(dev, "failed to register miscdevice: %d\n", rc);
  452. ida_simple_remove(&occ_ida, occ->idx);
  453. return rc;
  454. }
  455. hwmon_dev_info.id = occ->idx;
  456. hwmon_dev = platform_device_register_full(&hwmon_dev_info);
  457. if (IS_ERR(hwmon_dev))
  458. dev_warn(dev, "failed to create hwmon device\n");
  459. return 0;
  460. }
  461. static int occ_remove(struct platform_device *pdev)
  462. {
  463. struct occ *occ = platform_get_drvdata(pdev);
  464. misc_deregister(&occ->mdev);
  465. device_for_each_child(&pdev->dev, NULL, occ_unregister_child);
  466. ida_simple_remove(&occ_ida, occ->idx);
  467. return 0;
  468. }
  469. static const struct of_device_id occ_match[] = {
  470. { .compatible = "ibm,p9-occ" },
  471. { },
  472. };
  473. MODULE_DEVICE_TABLE(of, occ_match);
  474. static struct platform_driver occ_driver = {
  475. .driver = {
  476. .name = "occ",
  477. .of_match_table = occ_match,
  478. },
  479. .probe = occ_probe,
  480. .remove = occ_remove,
  481. };
  482. static int occ_init(void)
  483. {
  484. return platform_driver_register(&occ_driver);
  485. }
  486. static void occ_exit(void)
  487. {
  488. platform_driver_unregister(&occ_driver);
  489. ida_destroy(&occ_ida);
  490. }
  491. module_init(occ_init);
  492. module_exit(occ_exit);
  493. MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
  494. MODULE_DESCRIPTION("BMC P9 OCC driver");
  495. MODULE_LICENSE("GPL");