fpga-mgr.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * FPGA Manager Core
  4. *
  5. * Copyright (C) 2013-2015 Altera Corporation
  6. * Copyright (C) 2017 Intel Corporation
  7. *
  8. * With code from the mailing list:
  9. * Copyright (C) 2013 Xilinx, Inc.
  10. */
  11. #include <linux/firmware.h>
  12. #include <linux/fpga/fpga-mgr.h>
  13. #include <linux/idr.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/mutex.h>
  17. #include <linux/slab.h>
  18. #include <linux/scatterlist.h>
  19. #include <linux/highmem.h>
  20. static DEFINE_IDA(fpga_mgr_ida);
  21. static struct class *fpga_mgr_class;
  22. /**
  23. * fpga_image_info_alloc - Allocate a FPGA image info struct
  24. * @dev: owning device
  25. *
  26. * Return: struct fpga_image_info or NULL
  27. */
  28. struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
  29. {
  30. struct fpga_image_info *info;
  31. get_device(dev);
  32. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  33. if (!info) {
  34. put_device(dev);
  35. return NULL;
  36. }
  37. info->dev = dev;
  38. return info;
  39. }
  40. EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
  41. /**
  42. * fpga_image_info_free - Free a FPGA image info struct
  43. * @info: FPGA image info struct to free
  44. */
  45. void fpga_image_info_free(struct fpga_image_info *info)
  46. {
  47. struct device *dev;
  48. if (!info)
  49. return;
  50. dev = info->dev;
  51. if (info->firmware_name)
  52. devm_kfree(dev, info->firmware_name);
  53. devm_kfree(dev, info);
  54. put_device(dev);
  55. }
  56. EXPORT_SYMBOL_GPL(fpga_image_info_free);
  57. /*
  58. * Call the low level driver's write_init function. This will do the
  59. * device-specific things to get the FPGA into the state where it is ready to
  60. * receive an FPGA image. The low level driver only gets to see the first
  61. * initial_header_size bytes in the buffer.
  62. */
  63. static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
  64. struct fpga_image_info *info,
  65. const char *buf, size_t count)
  66. {
  67. int ret;
  68. mgr->state = FPGA_MGR_STATE_WRITE_INIT;
  69. if (!mgr->mops->initial_header_size)
  70. ret = mgr->mops->write_init(mgr, info, NULL, 0);
  71. else
  72. ret = mgr->mops->write_init(
  73. mgr, info, buf, min(mgr->mops->initial_header_size, count));
  74. if (ret) {
  75. dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
  76. mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
  77. return ret;
  78. }
  79. return 0;
  80. }
  81. static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
  82. struct fpga_image_info *info,
  83. struct sg_table *sgt)
  84. {
  85. struct sg_mapping_iter miter;
  86. size_t len;
  87. char *buf;
  88. int ret;
  89. if (!mgr->mops->initial_header_size)
  90. return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
  91. /*
  92. * First try to use miter to map the first fragment to access the
  93. * header, this is the typical path.
  94. */
  95. sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
  96. if (sg_miter_next(&miter) &&
  97. miter.length >= mgr->mops->initial_header_size) {
  98. ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
  99. miter.length);
  100. sg_miter_stop(&miter);
  101. return ret;
  102. }
  103. sg_miter_stop(&miter);
  104. /* Otherwise copy the fragments into temporary memory. */
  105. buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
  106. if (!buf)
  107. return -ENOMEM;
  108. len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
  109. mgr->mops->initial_header_size);
  110. ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
  111. kfree(buf);
  112. return ret;
  113. }
  114. /*
  115. * After all the FPGA image has been written, do the device specific steps to
  116. * finish and set the FPGA into operating mode.
  117. */
  118. static int fpga_mgr_write_complete(struct fpga_manager *mgr,
  119. struct fpga_image_info *info)
  120. {
  121. int ret;
  122. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
  123. ret = mgr->mops->write_complete(mgr, info);
  124. if (ret) {
  125. dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
  126. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
  127. return ret;
  128. }
  129. mgr->state = FPGA_MGR_STATE_OPERATING;
  130. return 0;
  131. }
  132. /**
  133. * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
  134. * @mgr: fpga manager
  135. * @info: fpga image specific information
  136. * @sgt: scatterlist table
  137. *
  138. * Step the low level fpga manager through the device-specific steps of getting
  139. * an FPGA ready to be configured, writing the image to it, then doing whatever
  140. * post-configuration steps necessary. This code assumes the caller got the
  141. * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
  142. * not an error code.
  143. *
  144. * This is the preferred entry point for FPGA programming, it does not require
  145. * any contiguous kernel memory.
  146. *
  147. * Return: 0 on success, negative error code otherwise.
  148. */
  149. static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
  150. struct fpga_image_info *info,
  151. struct sg_table *sgt)
  152. {
  153. int ret;
  154. ret = fpga_mgr_write_init_sg(mgr, info, sgt);
  155. if (ret)
  156. return ret;
  157. /* Write the FPGA image to the FPGA. */
  158. mgr->state = FPGA_MGR_STATE_WRITE;
  159. if (mgr->mops->write_sg) {
  160. ret = mgr->mops->write_sg(mgr, sgt);
  161. } else {
  162. struct sg_mapping_iter miter;
  163. sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
  164. while (sg_miter_next(&miter)) {
  165. ret = mgr->mops->write(mgr, miter.addr, miter.length);
  166. if (ret)
  167. break;
  168. }
  169. sg_miter_stop(&miter);
  170. }
  171. if (ret) {
  172. dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
  173. mgr->state = FPGA_MGR_STATE_WRITE_ERR;
  174. return ret;
  175. }
  176. return fpga_mgr_write_complete(mgr, info);
  177. }
  178. static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
  179. struct fpga_image_info *info,
  180. const char *buf, size_t count)
  181. {
  182. int ret;
  183. ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
  184. if (ret)
  185. return ret;
  186. /*
  187. * Write the FPGA image to the FPGA.
  188. */
  189. mgr->state = FPGA_MGR_STATE_WRITE;
  190. ret = mgr->mops->write(mgr, buf, count);
  191. if (ret) {
  192. dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
  193. mgr->state = FPGA_MGR_STATE_WRITE_ERR;
  194. return ret;
  195. }
  196. return fpga_mgr_write_complete(mgr, info);
  197. }
  198. /**
  199. * fpga_mgr_buf_load - load fpga from image in buffer
  200. * @mgr: fpga manager
  201. * @info: fpga image info
  202. * @buf: buffer contain fpga image
  203. * @count: byte count of buf
  204. *
  205. * Step the low level fpga manager through the device-specific steps of getting
  206. * an FPGA ready to be configured, writing the image to it, then doing whatever
  207. * post-configuration steps necessary. This code assumes the caller got the
  208. * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
  209. *
  210. * Return: 0 on success, negative error code otherwise.
  211. */
  212. static int fpga_mgr_buf_load(struct fpga_manager *mgr,
  213. struct fpga_image_info *info,
  214. const char *buf, size_t count)
  215. {
  216. struct page **pages;
  217. struct sg_table sgt;
  218. const void *p;
  219. int nr_pages;
  220. int index;
  221. int rc;
  222. /*
  223. * This is just a fast path if the caller has already created a
  224. * contiguous kernel buffer and the driver doesn't require SG, non-SG
  225. * drivers will still work on the slow path.
  226. */
  227. if (mgr->mops->write)
  228. return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
  229. /*
  230. * Convert the linear kernel pointer into a sg_table of pages for use
  231. * by the driver.
  232. */
  233. nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
  234. (unsigned long)buf / PAGE_SIZE;
  235. pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
  236. if (!pages)
  237. return -ENOMEM;
  238. p = buf - offset_in_page(buf);
  239. for (index = 0; index < nr_pages; index++) {
  240. if (is_vmalloc_addr(p))
  241. pages[index] = vmalloc_to_page(p);
  242. else
  243. pages[index] = kmap_to_page((void *)p);
  244. if (!pages[index]) {
  245. kfree(pages);
  246. return -EFAULT;
  247. }
  248. p += PAGE_SIZE;
  249. }
  250. /*
  251. * The temporary pages list is used to code share the merging algorithm
  252. * in sg_alloc_table_from_pages
  253. */
  254. rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
  255. count, GFP_KERNEL);
  256. kfree(pages);
  257. if (rc)
  258. return rc;
  259. rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
  260. sg_free_table(&sgt);
  261. return rc;
  262. }
  263. /**
  264. * fpga_mgr_firmware_load - request firmware and load to fpga
  265. * @mgr: fpga manager
  266. * @info: fpga image specific information
  267. * @image_name: name of image file on the firmware search path
  268. *
  269. * Request an FPGA image using the firmware class, then write out to the FPGA.
  270. * Update the state before each step to provide info on what step failed if
  271. * there is a failure. This code assumes the caller got the mgr pointer
  272. * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
  273. * code.
  274. *
  275. * Return: 0 on success, negative error code otherwise.
  276. */
  277. static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
  278. struct fpga_image_info *info,
  279. const char *image_name)
  280. {
  281. struct device *dev = &mgr->dev;
  282. const struct firmware *fw;
  283. int ret;
  284. dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
  285. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
  286. ret = request_firmware(&fw, image_name, dev);
  287. if (ret) {
  288. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
  289. dev_err(dev, "Error requesting firmware %s\n", image_name);
  290. return ret;
  291. }
  292. ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
  293. release_firmware(fw);
  294. return ret;
  295. }
  296. /**
  297. * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
  298. * @mgr: fpga manager
  299. * @info: fpga image information.
  300. *
  301. * Load the FPGA from an image which is indicated in @info. If successful, the
  302. * FPGA ends up in operating mode.
  303. *
  304. * Return: 0 on success, negative error code otherwise.
  305. */
  306. int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
  307. {
  308. if (info->sgt)
  309. return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
  310. if (info->buf && info->count)
  311. return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
  312. if (info->firmware_name)
  313. return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
  314. return -EINVAL;
  315. }
  316. EXPORT_SYMBOL_GPL(fpga_mgr_load);
  317. static const char * const state_str[] = {
  318. [FPGA_MGR_STATE_UNKNOWN] = "unknown",
  319. [FPGA_MGR_STATE_POWER_OFF] = "power off",
  320. [FPGA_MGR_STATE_POWER_UP] = "power up",
  321. [FPGA_MGR_STATE_RESET] = "reset",
  322. /* requesting FPGA image from firmware */
  323. [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
  324. [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
  325. /* Preparing FPGA to receive image */
  326. [FPGA_MGR_STATE_WRITE_INIT] = "write init",
  327. [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
  328. /* Writing image to FPGA */
  329. [FPGA_MGR_STATE_WRITE] = "write",
  330. [FPGA_MGR_STATE_WRITE_ERR] = "write error",
  331. /* Finishing configuration after image has been written */
  332. [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
  333. [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
  334. /* FPGA reports to be in normal operating mode */
  335. [FPGA_MGR_STATE_OPERATING] = "operating",
  336. };
  337. static ssize_t name_show(struct device *dev,
  338. struct device_attribute *attr, char *buf)
  339. {
  340. struct fpga_manager *mgr = to_fpga_manager(dev);
  341. return sprintf(buf, "%s\n", mgr->name);
  342. }
  343. static ssize_t state_show(struct device *dev,
  344. struct device_attribute *attr, char *buf)
  345. {
  346. struct fpga_manager *mgr = to_fpga_manager(dev);
  347. return sprintf(buf, "%s\n", state_str[mgr->state]);
  348. }
  349. static ssize_t status_show(struct device *dev,
  350. struct device_attribute *attr, char *buf)
  351. {
  352. struct fpga_manager *mgr = to_fpga_manager(dev);
  353. u64 status;
  354. int len = 0;
  355. if (!mgr->mops->status)
  356. return -ENOENT;
  357. status = mgr->mops->status(mgr);
  358. if (status & FPGA_MGR_STATUS_OPERATION_ERR)
  359. len += sprintf(buf + len, "reconfig operation error\n");
  360. if (status & FPGA_MGR_STATUS_CRC_ERR)
  361. len += sprintf(buf + len, "reconfig CRC error\n");
  362. if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
  363. len += sprintf(buf + len, "reconfig incompatible image\n");
  364. if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
  365. len += sprintf(buf + len, "reconfig IP protocol error\n");
  366. if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
  367. len += sprintf(buf + len, "reconfig fifo overflow error\n");
  368. return len;
  369. }
  370. static DEVICE_ATTR_RO(name);
  371. static DEVICE_ATTR_RO(state);
  372. static DEVICE_ATTR_RO(status);
  373. static struct attribute *fpga_mgr_attrs[] = {
  374. &dev_attr_name.attr,
  375. &dev_attr_state.attr,
  376. &dev_attr_status.attr,
  377. NULL,
  378. };
  379. ATTRIBUTE_GROUPS(fpga_mgr);
  380. static struct fpga_manager *__fpga_mgr_get(struct device *dev)
  381. {
  382. struct fpga_manager *mgr;
  383. mgr = to_fpga_manager(dev);
  384. if (!try_module_get(dev->parent->driver->owner))
  385. goto err_dev;
  386. return mgr;
  387. err_dev:
  388. put_device(dev);
  389. return ERR_PTR(-ENODEV);
  390. }
  391. static int fpga_mgr_dev_match(struct device *dev, const void *data)
  392. {
  393. return dev->parent == data;
  394. }
  395. /**
  396. * fpga_mgr_get - Given a device, get a reference to a fpga mgr.
  397. * @dev: parent device that fpga mgr was registered with
  398. *
  399. * Return: fpga manager struct or IS_ERR() condition containing error code.
  400. */
  401. struct fpga_manager *fpga_mgr_get(struct device *dev)
  402. {
  403. struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
  404. fpga_mgr_dev_match);
  405. if (!mgr_dev)
  406. return ERR_PTR(-ENODEV);
  407. return __fpga_mgr_get(mgr_dev);
  408. }
  409. EXPORT_SYMBOL_GPL(fpga_mgr_get);
  410. /**
  411. * of_fpga_mgr_get - Given a device node, get a reference to a fpga mgr.
  412. *
  413. * @node: device node
  414. *
  415. * Return: fpga manager struct or IS_ERR() condition containing error code.
  416. */
  417. struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
  418. {
  419. struct device *dev;
  420. dev = class_find_device_by_of_node(fpga_mgr_class, node);
  421. if (!dev)
  422. return ERR_PTR(-ENODEV);
  423. return __fpga_mgr_get(dev);
  424. }
  425. EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
  426. /**
  427. * fpga_mgr_put - release a reference to a fpga manager
  428. * @mgr: fpga manager structure
  429. */
  430. void fpga_mgr_put(struct fpga_manager *mgr)
  431. {
  432. module_put(mgr->dev.parent->driver->owner);
  433. put_device(&mgr->dev);
  434. }
  435. EXPORT_SYMBOL_GPL(fpga_mgr_put);
  436. /**
  437. * fpga_mgr_lock - Lock FPGA manager for exclusive use
  438. * @mgr: fpga manager
  439. *
  440. * Given a pointer to FPGA Manager (from fpga_mgr_get() or
  441. * of_fpga_mgr_put()) attempt to get the mutex. The user should call
  442. * fpga_mgr_lock() and verify that it returns 0 before attempting to
  443. * program the FPGA. Likewise, the user should call fpga_mgr_unlock
  444. * when done programming the FPGA.
  445. *
  446. * Return: 0 for success or -EBUSY
  447. */
  448. int fpga_mgr_lock(struct fpga_manager *mgr)
  449. {
  450. if (!mutex_trylock(&mgr->ref_mutex)) {
  451. dev_err(&mgr->dev, "FPGA manager is in use.\n");
  452. return -EBUSY;
  453. }
  454. return 0;
  455. }
  456. EXPORT_SYMBOL_GPL(fpga_mgr_lock);
  457. /**
  458. * fpga_mgr_unlock - Unlock FPGA manager after done programming
  459. * @mgr: fpga manager
  460. */
  461. void fpga_mgr_unlock(struct fpga_manager *mgr)
  462. {
  463. mutex_unlock(&mgr->ref_mutex);
  464. }
  465. EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
  466. /**
  467. * fpga_mgr_create - create and initialize a FPGA manager struct
  468. * @dev: fpga manager device from pdev
  469. * @name: fpga manager name
  470. * @mops: pointer to structure of fpga manager ops
  471. * @priv: fpga manager private data
  472. *
  473. * The caller of this function is responsible for freeing the struct with
  474. * fpga_mgr_free(). Using devm_fpga_mgr_create() instead is recommended.
  475. *
  476. * Return: pointer to struct fpga_manager or NULL
  477. */
  478. struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name,
  479. const struct fpga_manager_ops *mops,
  480. void *priv)
  481. {
  482. struct fpga_manager *mgr;
  483. int id, ret;
  484. if (!mops || !mops->write_complete || !mops->state ||
  485. !mops->write_init || (!mops->write && !mops->write_sg) ||
  486. (mops->write && mops->write_sg)) {
  487. dev_err(dev, "Attempt to register without fpga_manager_ops\n");
  488. return NULL;
  489. }
  490. if (!name || !strlen(name)) {
  491. dev_err(dev, "Attempt to register with no name!\n");
  492. return NULL;
  493. }
  494. mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  495. if (!mgr)
  496. return NULL;
  497. id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
  498. if (id < 0)
  499. goto error_kfree;
  500. mutex_init(&mgr->ref_mutex);
  501. mgr->name = name;
  502. mgr->mops = mops;
  503. mgr->priv = priv;
  504. device_initialize(&mgr->dev);
  505. mgr->dev.class = fpga_mgr_class;
  506. mgr->dev.groups = mops->groups;
  507. mgr->dev.parent = dev;
  508. mgr->dev.of_node = dev->of_node;
  509. mgr->dev.id = id;
  510. ret = dev_set_name(&mgr->dev, "fpga%d", id);
  511. if (ret)
  512. goto error_device;
  513. return mgr;
  514. error_device:
  515. ida_simple_remove(&fpga_mgr_ida, id);
  516. error_kfree:
  517. kfree(mgr);
  518. return NULL;
  519. }
  520. EXPORT_SYMBOL_GPL(fpga_mgr_create);
  521. /**
  522. * fpga_mgr_free - free a FPGA manager created with fpga_mgr_create()
  523. * @mgr: fpga manager struct
  524. */
  525. void fpga_mgr_free(struct fpga_manager *mgr)
  526. {
  527. ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
  528. kfree(mgr);
  529. }
  530. EXPORT_SYMBOL_GPL(fpga_mgr_free);
  531. static void devm_fpga_mgr_release(struct device *dev, void *res)
  532. {
  533. struct fpga_manager *mgr = *(struct fpga_manager **)res;
  534. fpga_mgr_free(mgr);
  535. }
  536. /**
  537. * devm_fpga_mgr_create - create and initialize a managed FPGA manager struct
  538. * @dev: fpga manager device from pdev
  539. * @name: fpga manager name
  540. * @mops: pointer to structure of fpga manager ops
  541. * @priv: fpga manager private data
  542. *
  543. * This function is intended for use in a FPGA manager driver's probe function.
  544. * After the manager driver creates the manager struct with
  545. * devm_fpga_mgr_create(), it should register it with fpga_mgr_register(). The
  546. * manager driver's remove function should call fpga_mgr_unregister(). The
  547. * manager struct allocated with this function will be freed automatically on
  548. * driver detach. This includes the case of a probe function returning error
  549. * before calling fpga_mgr_register(), the struct will still get cleaned up.
  550. *
  551. * Return: pointer to struct fpga_manager or NULL
  552. */
  553. struct fpga_manager *devm_fpga_mgr_create(struct device *dev, const char *name,
  554. const struct fpga_manager_ops *mops,
  555. void *priv)
  556. {
  557. struct fpga_manager **ptr, *mgr;
  558. ptr = devres_alloc(devm_fpga_mgr_release, sizeof(*ptr), GFP_KERNEL);
  559. if (!ptr)
  560. return NULL;
  561. mgr = fpga_mgr_create(dev, name, mops, priv);
  562. if (!mgr) {
  563. devres_free(ptr);
  564. } else {
  565. *ptr = mgr;
  566. devres_add(dev, ptr);
  567. }
  568. return mgr;
  569. }
  570. EXPORT_SYMBOL_GPL(devm_fpga_mgr_create);
  571. /**
  572. * fpga_mgr_register - register a FPGA manager
  573. * @mgr: fpga manager struct
  574. *
  575. * Return: 0 on success, negative error code otherwise.
  576. */
  577. int fpga_mgr_register(struct fpga_manager *mgr)
  578. {
  579. int ret;
  580. /*
  581. * Initialize framework state by requesting low level driver read state
  582. * from device. FPGA may be in reset mode or may have been programmed
  583. * by bootloader or EEPROM.
  584. */
  585. mgr->state = mgr->mops->state(mgr);
  586. ret = device_add(&mgr->dev);
  587. if (ret)
  588. goto error_device;
  589. dev_info(&mgr->dev, "%s registered\n", mgr->name);
  590. return 0;
  591. error_device:
  592. ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
  593. return ret;
  594. }
  595. EXPORT_SYMBOL_GPL(fpga_mgr_register);
  596. /**
  597. * fpga_mgr_unregister - unregister a FPGA manager
  598. * @mgr: fpga manager struct
  599. *
  600. * This function is intended for use in a FPGA manager driver's remove function.
  601. */
  602. void fpga_mgr_unregister(struct fpga_manager *mgr)
  603. {
  604. dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
  605. /*
  606. * If the low level driver provides a method for putting fpga into
  607. * a desired state upon unregister, do it.
  608. */
  609. if (mgr->mops->fpga_remove)
  610. mgr->mops->fpga_remove(mgr);
  611. device_unregister(&mgr->dev);
  612. }
  613. EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
  614. static void fpga_mgr_dev_release(struct device *dev)
  615. {
  616. }
  617. static int __init fpga_mgr_class_init(void)
  618. {
  619. pr_info("FPGA manager framework\n");
  620. fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
  621. if (IS_ERR(fpga_mgr_class))
  622. return PTR_ERR(fpga_mgr_class);
  623. fpga_mgr_class->dev_groups = fpga_mgr_groups;
  624. fpga_mgr_class->dev_release = fpga_mgr_dev_release;
  625. return 0;
  626. }
  627. static void __exit fpga_mgr_class_exit(void)
  628. {
  629. class_destroy(fpga_mgr_class);
  630. ida_destroy(&fpga_mgr_ida);
  631. }
  632. MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
  633. MODULE_DESCRIPTION("FPGA manager framework");
  634. MODULE_LICENSE("GPL v2");
  635. subsys_initcall(fpga_mgr_class_init);
  636. module_exit(fpga_mgr_class_exit);