dfl.c 46 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for FPGA Device Feature List (DFL) Support
  4. *
  5. * Copyright (C) 2017-2018 Intel Corporation, Inc.
  6. *
  7. * Authors:
  8. * Kang Luwei <luwei.kang@intel.com>
  9. * Zhang Yi <yi.z.zhang@intel.com>
  10. * Wu Hao <hao.wu@intel.com>
  11. * Xiao Guangrong <guangrong.xiao@linux.intel.com>
  12. */
  13. #include <linux/fpga-dfl.h>
  14. #include <linux/module.h>
  15. #include <linux/uaccess.h>
  16. #include "dfl.h"
  17. static DEFINE_MUTEX(dfl_id_mutex);
  18. /*
  19. * when adding a new feature dev support in DFL framework, it's required to
  20. * add a new item in enum dfl_id_type and provide related information in below
  21. * dfl_devs table which is indexed by dfl_id_type, e.g. name string used for
  22. * platform device creation (define name strings in dfl.h, as they could be
  23. * reused by platform device drivers).
  24. *
  25. * if the new feature dev needs chardev support, then it's required to add
  26. * a new item in dfl_chardevs table and configure dfl_devs[i].devt_type as
  27. * index to dfl_chardevs table. If no chardev support just set devt_type
  28. * as one invalid index (DFL_FPGA_DEVT_MAX).
  29. */
  30. enum dfl_fpga_devt_type {
  31. DFL_FPGA_DEVT_FME,
  32. DFL_FPGA_DEVT_PORT,
  33. DFL_FPGA_DEVT_MAX,
  34. };
  35. static struct lock_class_key dfl_pdata_keys[DFL_ID_MAX];
  36. static const char *dfl_pdata_key_strings[DFL_ID_MAX] = {
  37. "dfl-fme-pdata",
  38. "dfl-port-pdata",
  39. };
  40. /**
  41. * dfl_dev_info - dfl feature device information.
  42. * @name: name string of the feature platform device.
  43. * @dfh_id: id value in Device Feature Header (DFH) register by DFL spec.
  44. * @id: idr id of the feature dev.
  45. * @devt_type: index to dfl_chrdevs[].
  46. */
  47. struct dfl_dev_info {
  48. const char *name;
  49. u16 dfh_id;
  50. struct idr id;
  51. enum dfl_fpga_devt_type devt_type;
  52. };
  53. /* it is indexed by dfl_id_type */
  54. static struct dfl_dev_info dfl_devs[] = {
  55. {.name = DFL_FPGA_FEATURE_DEV_FME, .dfh_id = DFH_ID_FIU_FME,
  56. .devt_type = DFL_FPGA_DEVT_FME},
  57. {.name = DFL_FPGA_FEATURE_DEV_PORT, .dfh_id = DFH_ID_FIU_PORT,
  58. .devt_type = DFL_FPGA_DEVT_PORT},
  59. };
  60. /**
  61. * dfl_chardev_info - chardev information of dfl feature device
  62. * @name: nmae string of the char device.
  63. * @devt: devt of the char device.
  64. */
  65. struct dfl_chardev_info {
  66. const char *name;
  67. dev_t devt;
  68. };
  69. /* indexed by enum dfl_fpga_devt_type */
  70. static struct dfl_chardev_info dfl_chrdevs[] = {
  71. {.name = DFL_FPGA_FEATURE_DEV_FME},
  72. {.name = DFL_FPGA_FEATURE_DEV_PORT},
  73. };
  74. static void dfl_ids_init(void)
  75. {
  76. int i;
  77. for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  78. idr_init(&dfl_devs[i].id);
  79. }
  80. static void dfl_ids_destroy(void)
  81. {
  82. int i;
  83. for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  84. idr_destroy(&dfl_devs[i].id);
  85. }
  86. static int dfl_id_alloc(enum dfl_id_type type, struct device *dev)
  87. {
  88. int id;
  89. WARN_ON(type >= DFL_ID_MAX);
  90. mutex_lock(&dfl_id_mutex);
  91. id = idr_alloc(&dfl_devs[type].id, dev, 0, 0, GFP_KERNEL);
  92. mutex_unlock(&dfl_id_mutex);
  93. return id;
  94. }
  95. static void dfl_id_free(enum dfl_id_type type, int id)
  96. {
  97. WARN_ON(type >= DFL_ID_MAX);
  98. mutex_lock(&dfl_id_mutex);
  99. idr_remove(&dfl_devs[type].id, id);
  100. mutex_unlock(&dfl_id_mutex);
  101. }
  102. static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev)
  103. {
  104. int i;
  105. for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  106. if (!strcmp(dfl_devs[i].name, pdev->name))
  107. return i;
  108. return DFL_ID_MAX;
  109. }
  110. static enum dfl_id_type dfh_id_to_type(u16 id)
  111. {
  112. int i;
  113. for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  114. if (dfl_devs[i].dfh_id == id)
  115. return i;
  116. return DFL_ID_MAX;
  117. }
  118. /*
  119. * introduce a global port_ops list, it allows port drivers to register ops
  120. * in such list, then other feature devices (e.g. FME), could use the port
  121. * functions even related port platform device is hidden. Below is one example,
  122. * in virtualization case of PCIe-based FPGA DFL device, when SRIOV is
  123. * enabled, port (and it's AFU) is turned into VF and port platform device
  124. * is hidden from system but it's still required to access port to finish FPGA
  125. * reconfiguration function in FME.
  126. */
  127. static DEFINE_MUTEX(dfl_port_ops_mutex);
  128. static LIST_HEAD(dfl_port_ops_list);
  129. /**
  130. * dfl_fpga_port_ops_get - get matched port ops from the global list
  131. * @pdev: platform device to match with associated port ops.
  132. * Return: matched port ops on success, NULL otherwise.
  133. *
  134. * Please note that must dfl_fpga_port_ops_put after use the port_ops.
  135. */
  136. struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pdev)
  137. {
  138. struct dfl_fpga_port_ops *ops = NULL;
  139. mutex_lock(&dfl_port_ops_mutex);
  140. if (list_empty(&dfl_port_ops_list))
  141. goto done;
  142. list_for_each_entry(ops, &dfl_port_ops_list, node) {
  143. /* match port_ops using the name of platform device */
  144. if (!strcmp(pdev->name, ops->name)) {
  145. if (!try_module_get(ops->owner))
  146. ops = NULL;
  147. goto done;
  148. }
  149. }
  150. ops = NULL;
  151. done:
  152. mutex_unlock(&dfl_port_ops_mutex);
  153. return ops;
  154. }
  155. EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_get);
  156. /**
  157. * dfl_fpga_port_ops_put - put port ops
  158. * @ops: port ops.
  159. */
  160. void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops)
  161. {
  162. if (ops && ops->owner)
  163. module_put(ops->owner);
  164. }
  165. EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_put);
  166. /**
  167. * dfl_fpga_port_ops_add - add port_ops to global list
  168. * @ops: port ops to add.
  169. */
  170. void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops)
  171. {
  172. mutex_lock(&dfl_port_ops_mutex);
  173. list_add_tail(&ops->node, &dfl_port_ops_list);
  174. mutex_unlock(&dfl_port_ops_mutex);
  175. }
  176. EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_add);
  177. /**
  178. * dfl_fpga_port_ops_del - remove port_ops from global list
  179. * @ops: port ops to del.
  180. */
  181. void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops)
  182. {
  183. mutex_lock(&dfl_port_ops_mutex);
  184. list_del(&ops->node);
  185. mutex_unlock(&dfl_port_ops_mutex);
  186. }
  187. EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del);
  188. /**
  189. * dfl_fpga_check_port_id - check the port id
  190. * @pdev: port platform device.
  191. * @pport_id: port id to compare.
  192. *
  193. * Return: 1 if port device matches with given port id, otherwise 0.
  194. */
  195. int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id)
  196. {
  197. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  198. struct dfl_fpga_port_ops *port_ops;
  199. if (pdata->id != FEATURE_DEV_ID_UNUSED)
  200. return pdata->id == *(int *)pport_id;
  201. port_ops = dfl_fpga_port_ops_get(pdev);
  202. if (!port_ops || !port_ops->get_id)
  203. return 0;
  204. pdata->id = port_ops->get_id(pdev);
  205. dfl_fpga_port_ops_put(port_ops);
  206. return pdata->id == *(int *)pport_id;
  207. }
  208. EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id);
  209. static DEFINE_IDA(dfl_device_ida);
  210. static const struct dfl_device_id *
  211. dfl_match_one_device(const struct dfl_device_id *id, struct dfl_device *ddev)
  212. {
  213. if (id->type == ddev->type && id->feature_id == ddev->feature_id)
  214. return id;
  215. return NULL;
  216. }
  217. static int dfl_bus_match(struct device *dev, struct device_driver *drv)
  218. {
  219. struct dfl_device *ddev = to_dfl_dev(dev);
  220. struct dfl_driver *ddrv = to_dfl_drv(drv);
  221. const struct dfl_device_id *id_entry;
  222. id_entry = ddrv->id_table;
  223. if (id_entry) {
  224. while (id_entry->feature_id) {
  225. if (dfl_match_one_device(id_entry, ddev)) {
  226. ddev->id_entry = id_entry;
  227. return 1;
  228. }
  229. id_entry++;
  230. }
  231. }
  232. return 0;
  233. }
  234. static int dfl_bus_probe(struct device *dev)
  235. {
  236. struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
  237. struct dfl_device *ddev = to_dfl_dev(dev);
  238. return ddrv->probe(ddev);
  239. }
  240. static int dfl_bus_remove(struct device *dev)
  241. {
  242. struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
  243. struct dfl_device *ddev = to_dfl_dev(dev);
  244. if (ddrv->remove)
  245. ddrv->remove(ddev);
  246. return 0;
  247. }
  248. static int dfl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
  249. {
  250. struct dfl_device *ddev = to_dfl_dev(dev);
  251. /* The type has 4 valid bits and feature_id has 12 valid bits */
  252. return add_uevent_var(env, "MODALIAS=dfl:t%01Xf%03X",
  253. ddev->type, ddev->feature_id);
  254. }
  255. static ssize_t
  256. type_show(struct device *dev, struct device_attribute *attr, char *buf)
  257. {
  258. struct dfl_device *ddev = to_dfl_dev(dev);
  259. return sprintf(buf, "0x%x\n", ddev->type);
  260. }
  261. static DEVICE_ATTR_RO(type);
  262. static ssize_t
  263. feature_id_show(struct device *dev, struct device_attribute *attr, char *buf)
  264. {
  265. struct dfl_device *ddev = to_dfl_dev(dev);
  266. return sprintf(buf, "0x%x\n", ddev->feature_id);
  267. }
  268. static DEVICE_ATTR_RO(feature_id);
  269. static struct attribute *dfl_dev_attrs[] = {
  270. &dev_attr_type.attr,
  271. &dev_attr_feature_id.attr,
  272. NULL,
  273. };
  274. ATTRIBUTE_GROUPS(dfl_dev);
  275. static struct bus_type dfl_bus_type = {
  276. .name = "dfl",
  277. .match = dfl_bus_match,
  278. .probe = dfl_bus_probe,
  279. .remove = dfl_bus_remove,
  280. .uevent = dfl_bus_uevent,
  281. .dev_groups = dfl_dev_groups,
  282. };
  283. static void release_dfl_dev(struct device *dev)
  284. {
  285. struct dfl_device *ddev = to_dfl_dev(dev);
  286. if (ddev->mmio_res.parent)
  287. release_resource(&ddev->mmio_res);
  288. ida_simple_remove(&dfl_device_ida, ddev->id);
  289. kfree(ddev->irqs);
  290. kfree(ddev);
  291. }
  292. static struct dfl_device *
  293. dfl_dev_add(struct dfl_feature_platform_data *pdata,
  294. struct dfl_feature *feature)
  295. {
  296. struct platform_device *pdev = pdata->dev;
  297. struct resource *parent_res;
  298. struct dfl_device *ddev;
  299. int id, i, ret;
  300. ddev = kzalloc(sizeof(*ddev), GFP_KERNEL);
  301. if (!ddev)
  302. return ERR_PTR(-ENOMEM);
  303. id = ida_simple_get(&dfl_device_ida, 0, 0, GFP_KERNEL);
  304. if (id < 0) {
  305. dev_err(&pdev->dev, "unable to get id\n");
  306. kfree(ddev);
  307. return ERR_PTR(id);
  308. }
  309. /* freeing resources by put_device() after device_initialize() */
  310. device_initialize(&ddev->dev);
  311. ddev->dev.parent = &pdev->dev;
  312. ddev->dev.bus = &dfl_bus_type;
  313. ddev->dev.release = release_dfl_dev;
  314. ddev->id = id;
  315. ret = dev_set_name(&ddev->dev, "dfl_dev.%d", id);
  316. if (ret)
  317. goto put_dev;
  318. ddev->type = feature_dev_id_type(pdev);
  319. ddev->feature_id = feature->id;
  320. ddev->cdev = pdata->dfl_cdev;
  321. /* add mmio resource */
  322. parent_res = &pdev->resource[feature->resource_index];
  323. ddev->mmio_res.flags = IORESOURCE_MEM;
  324. ddev->mmio_res.start = parent_res->start;
  325. ddev->mmio_res.end = parent_res->end;
  326. ddev->mmio_res.name = dev_name(&ddev->dev);
  327. ret = insert_resource(parent_res, &ddev->mmio_res);
  328. if (ret) {
  329. dev_err(&pdev->dev, "%s failed to claim resource: %pR\n",
  330. dev_name(&ddev->dev), &ddev->mmio_res);
  331. goto put_dev;
  332. }
  333. /* then add irq resource */
  334. if (feature->nr_irqs) {
  335. ddev->irqs = kcalloc(feature->nr_irqs,
  336. sizeof(*ddev->irqs), GFP_KERNEL);
  337. if (!ddev->irqs) {
  338. ret = -ENOMEM;
  339. goto put_dev;
  340. }
  341. for (i = 0; i < feature->nr_irqs; i++)
  342. ddev->irqs[i] = feature->irq_ctx[i].irq;
  343. ddev->num_irqs = feature->nr_irqs;
  344. }
  345. ret = device_add(&ddev->dev);
  346. if (ret)
  347. goto put_dev;
  348. dev_dbg(&pdev->dev, "add dfl_dev: %s\n", dev_name(&ddev->dev));
  349. return ddev;
  350. put_dev:
  351. /* calls release_dfl_dev() which does the clean up */
  352. put_device(&ddev->dev);
  353. return ERR_PTR(ret);
  354. }
  355. static void dfl_devs_remove(struct dfl_feature_platform_data *pdata)
  356. {
  357. struct dfl_feature *feature;
  358. dfl_fpga_dev_for_each_feature(pdata, feature) {
  359. if (feature->ddev) {
  360. device_unregister(&feature->ddev->dev);
  361. feature->ddev = NULL;
  362. }
  363. }
  364. }
  365. static int dfl_devs_add(struct dfl_feature_platform_data *pdata)
  366. {
  367. struct dfl_feature *feature;
  368. struct dfl_device *ddev;
  369. int ret;
  370. dfl_fpga_dev_for_each_feature(pdata, feature) {
  371. if (feature->ioaddr)
  372. continue;
  373. if (feature->ddev) {
  374. ret = -EEXIST;
  375. goto err;
  376. }
  377. ddev = dfl_dev_add(pdata, feature);
  378. if (IS_ERR(ddev)) {
  379. ret = PTR_ERR(ddev);
  380. goto err;
  381. }
  382. feature->ddev = ddev;
  383. }
  384. return 0;
  385. err:
  386. dfl_devs_remove(pdata);
  387. return ret;
  388. }
  389. int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner)
  390. {
  391. if (!dfl_drv || !dfl_drv->probe || !dfl_drv->id_table)
  392. return -EINVAL;
  393. dfl_drv->drv.owner = owner;
  394. dfl_drv->drv.bus = &dfl_bus_type;
  395. return driver_register(&dfl_drv->drv);
  396. }
  397. EXPORT_SYMBOL(__dfl_driver_register);
  398. void dfl_driver_unregister(struct dfl_driver *dfl_drv)
  399. {
  400. driver_unregister(&dfl_drv->drv);
  401. }
  402. EXPORT_SYMBOL(dfl_driver_unregister);
  403. #define is_header_feature(feature) ((feature)->id == FEATURE_ID_FIU_HEADER)
  404. /**
  405. * dfl_fpga_dev_feature_uinit - uinit for sub features of dfl feature device
  406. * @pdev: feature device.
  407. */
  408. void dfl_fpga_dev_feature_uinit(struct platform_device *pdev)
  409. {
  410. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  411. struct dfl_feature *feature;
  412. dfl_devs_remove(pdata);
  413. dfl_fpga_dev_for_each_feature(pdata, feature) {
  414. if (feature->ops) {
  415. if (feature->ops->uinit)
  416. feature->ops->uinit(pdev, feature);
  417. feature->ops = NULL;
  418. }
  419. }
  420. }
  421. EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit);
  422. static int dfl_feature_instance_init(struct platform_device *pdev,
  423. struct dfl_feature_platform_data *pdata,
  424. struct dfl_feature *feature,
  425. struct dfl_feature_driver *drv)
  426. {
  427. void __iomem *base;
  428. int ret = 0;
  429. if (!is_header_feature(feature)) {
  430. base = devm_platform_ioremap_resource(pdev,
  431. feature->resource_index);
  432. if (IS_ERR(base)) {
  433. dev_err(&pdev->dev,
  434. "ioremap failed for feature 0x%x!\n",
  435. feature->id);
  436. return PTR_ERR(base);
  437. }
  438. feature->ioaddr = base;
  439. }
  440. if (drv->ops->init) {
  441. ret = drv->ops->init(pdev, feature);
  442. if (ret)
  443. return ret;
  444. }
  445. feature->ops = drv->ops;
  446. return ret;
  447. }
  448. static bool dfl_feature_drv_match(struct dfl_feature *feature,
  449. struct dfl_feature_driver *driver)
  450. {
  451. const struct dfl_feature_id *ids = driver->id_table;
  452. if (ids) {
  453. while (ids->id) {
  454. if (ids->id == feature->id)
  455. return true;
  456. ids++;
  457. }
  458. }
  459. return false;
  460. }
  461. /**
  462. * dfl_fpga_dev_feature_init - init for sub features of dfl feature device
  463. * @pdev: feature device.
  464. * @feature_drvs: drvs for sub features.
  465. *
  466. * This function will match sub features with given feature drvs list and
  467. * use matched drv to init related sub feature.
  468. *
  469. * Return: 0 on success, negative error code otherwise.
  470. */
  471. int dfl_fpga_dev_feature_init(struct platform_device *pdev,
  472. struct dfl_feature_driver *feature_drvs)
  473. {
  474. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  475. struct dfl_feature_driver *drv = feature_drvs;
  476. struct dfl_feature *feature;
  477. int ret;
  478. while (drv->ops) {
  479. dfl_fpga_dev_for_each_feature(pdata, feature) {
  480. if (dfl_feature_drv_match(feature, drv)) {
  481. ret = dfl_feature_instance_init(pdev, pdata,
  482. feature, drv);
  483. if (ret)
  484. goto exit;
  485. }
  486. }
  487. drv++;
  488. }
  489. ret = dfl_devs_add(pdata);
  490. if (ret)
  491. goto exit;
  492. return 0;
  493. exit:
  494. dfl_fpga_dev_feature_uinit(pdev);
  495. return ret;
  496. }
  497. EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init);
  498. static void dfl_chardev_uinit(void)
  499. {
  500. int i;
  501. for (i = 0; i < DFL_FPGA_DEVT_MAX; i++)
  502. if (MAJOR(dfl_chrdevs[i].devt)) {
  503. unregister_chrdev_region(dfl_chrdevs[i].devt,
  504. MINORMASK + 1);
  505. dfl_chrdevs[i].devt = MKDEV(0, 0);
  506. }
  507. }
  508. static int dfl_chardev_init(void)
  509. {
  510. int i, ret;
  511. for (i = 0; i < DFL_FPGA_DEVT_MAX; i++) {
  512. ret = alloc_chrdev_region(&dfl_chrdevs[i].devt, 0,
  513. MINORMASK + 1, dfl_chrdevs[i].name);
  514. if (ret)
  515. goto exit;
  516. }
  517. return 0;
  518. exit:
  519. dfl_chardev_uinit();
  520. return ret;
  521. }
  522. static dev_t dfl_get_devt(enum dfl_fpga_devt_type type, int id)
  523. {
  524. if (type >= DFL_FPGA_DEVT_MAX)
  525. return 0;
  526. return MKDEV(MAJOR(dfl_chrdevs[type].devt), id);
  527. }
  528. /**
  529. * dfl_fpga_dev_ops_register - register cdev ops for feature dev
  530. *
  531. * @pdev: feature dev.
  532. * @fops: file operations for feature dev's cdev.
  533. * @owner: owning module/driver.
  534. *
  535. * Return: 0 on success, negative error code otherwise.
  536. */
  537. int dfl_fpga_dev_ops_register(struct platform_device *pdev,
  538. const struct file_operations *fops,
  539. struct module *owner)
  540. {
  541. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  542. cdev_init(&pdata->cdev, fops);
  543. pdata->cdev.owner = owner;
  544. /*
  545. * set parent to the feature device so that its refcount is
  546. * decreased after the last refcount of cdev is gone, that
  547. * makes sure the feature device is valid during device
  548. * file's life-cycle.
  549. */
  550. pdata->cdev.kobj.parent = &pdev->dev.kobj;
  551. return cdev_add(&pdata->cdev, pdev->dev.devt, 1);
  552. }
  553. EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_register);
  554. /**
  555. * dfl_fpga_dev_ops_unregister - unregister cdev ops for feature dev
  556. * @pdev: feature dev.
  557. */
  558. void dfl_fpga_dev_ops_unregister(struct platform_device *pdev)
  559. {
  560. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  561. cdev_del(&pdata->cdev);
  562. }
  563. EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
  564. /**
  565. * struct build_feature_devs_info - info collected during feature dev build.
  566. *
  567. * @dev: device to enumerate.
  568. * @cdev: the container device for all feature devices.
  569. * @nr_irqs: number of irqs for all feature devices.
  570. * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
  571. * this device.
  572. * @feature_dev: current feature device.
  573. * @ioaddr: header register region address of current FIU in enumeration.
  574. * @start: register resource start of current FIU.
  575. * @len: max register resource length of current FIU.
  576. * @sub_features: a sub features linked list for feature device in enumeration.
  577. * @feature_num: number of sub features for feature device in enumeration.
  578. */
  579. struct build_feature_devs_info {
  580. struct device *dev;
  581. struct dfl_fpga_cdev *cdev;
  582. unsigned int nr_irqs;
  583. int *irq_table;
  584. struct platform_device *feature_dev;
  585. void __iomem *ioaddr;
  586. resource_size_t start;
  587. resource_size_t len;
  588. struct list_head sub_features;
  589. int feature_num;
  590. };
  591. /**
  592. * struct dfl_feature_info - sub feature info collected during feature dev build
  593. *
  594. * @fid: id of this sub feature.
  595. * @mmio_res: mmio resource of this sub feature.
  596. * @ioaddr: mapped base address of mmio resource.
  597. * @node: node in sub_features linked list.
  598. * @irq_base: start of irq index in this sub feature.
  599. * @nr_irqs: number of irqs of this sub feature.
  600. */
  601. struct dfl_feature_info {
  602. u16 fid;
  603. struct resource mmio_res;
  604. void __iomem *ioaddr;
  605. struct list_head node;
  606. unsigned int irq_base;
  607. unsigned int nr_irqs;
  608. };
  609. static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
  610. struct platform_device *port)
  611. {
  612. struct dfl_feature_platform_data *pdata = dev_get_platdata(&port->dev);
  613. mutex_lock(&cdev->lock);
  614. list_add(&pdata->node, &cdev->port_dev_list);
  615. get_device(&pdata->dev->dev);
  616. mutex_unlock(&cdev->lock);
  617. }
  618. /*
  619. * register current feature device, it is called when we need to switch to
  620. * another feature parsing or we have parsed all features on given device
  621. * feature list.
  622. */
  623. static int build_info_commit_dev(struct build_feature_devs_info *binfo)
  624. {
  625. struct platform_device *fdev = binfo->feature_dev;
  626. struct dfl_feature_platform_data *pdata;
  627. struct dfl_feature_info *finfo, *p;
  628. enum dfl_id_type type;
  629. int ret, index = 0, res_idx = 0;
  630. type = feature_dev_id_type(fdev);
  631. if (WARN_ON_ONCE(type >= DFL_ID_MAX))
  632. return -EINVAL;
  633. /*
  634. * we do not need to care for the memory which is associated with
  635. * the platform device. After calling platform_device_unregister(),
  636. * it will be automatically freed by device's release() callback,
  637. * platform_device_release().
  638. */
  639. pdata = kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_KERNEL);
  640. if (!pdata)
  641. return -ENOMEM;
  642. pdata->dev = fdev;
  643. pdata->num = binfo->feature_num;
  644. pdata->dfl_cdev = binfo->cdev;
  645. pdata->id = FEATURE_DEV_ID_UNUSED;
  646. mutex_init(&pdata->lock);
  647. lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type],
  648. dfl_pdata_key_strings[type]);
  649. /*
  650. * the count should be initialized to 0 to make sure
  651. *__fpga_port_enable() following __fpga_port_disable()
  652. * works properly for port device.
  653. * and it should always be 0 for fme device.
  654. */
  655. WARN_ON(pdata->disable_count);
  656. fdev->dev.platform_data = pdata;
  657. /* each sub feature has one MMIO resource */
  658. fdev->num_resources = binfo->feature_num;
  659. fdev->resource = kcalloc(binfo->feature_num, sizeof(*fdev->resource),
  660. GFP_KERNEL);
  661. if (!fdev->resource)
  662. return -ENOMEM;
  663. /* fill features and resource information for feature dev */
  664. list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
  665. struct dfl_feature *feature = &pdata->features[index++];
  666. struct dfl_feature_irq_ctx *ctx;
  667. unsigned int i;
  668. /* save resource information for each feature */
  669. feature->dev = fdev;
  670. feature->id = finfo->fid;
  671. /*
  672. * the FIU header feature has some fundamental functions (sriov
  673. * set, port enable/disable) needed for the dfl bus device and
  674. * other sub features. So its mmio resource should be mapped by
  675. * DFL bus device. And we should not assign it to feature
  676. * devices (dfl-fme/afu) again.
  677. */
  678. if (is_header_feature(feature)) {
  679. feature->resource_index = -1;
  680. feature->ioaddr =
  681. devm_ioremap_resource(binfo->dev,
  682. &finfo->mmio_res);
  683. if (IS_ERR(feature->ioaddr))
  684. return PTR_ERR(feature->ioaddr);
  685. } else {
  686. feature->resource_index = res_idx;
  687. fdev->resource[res_idx++] = finfo->mmio_res;
  688. }
  689. if (finfo->nr_irqs) {
  690. ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
  691. sizeof(*ctx), GFP_KERNEL);
  692. if (!ctx)
  693. return -ENOMEM;
  694. for (i = 0; i < finfo->nr_irqs; i++)
  695. ctx[i].irq =
  696. binfo->irq_table[finfo->irq_base + i];
  697. feature->irq_ctx = ctx;
  698. feature->nr_irqs = finfo->nr_irqs;
  699. }
  700. list_del(&finfo->node);
  701. kfree(finfo);
  702. }
  703. ret = platform_device_add(binfo->feature_dev);
  704. if (!ret) {
  705. if (type == PORT_ID)
  706. dfl_fpga_cdev_add_port_dev(binfo->cdev,
  707. binfo->feature_dev);
  708. else
  709. binfo->cdev->fme_dev =
  710. get_device(&binfo->feature_dev->dev);
  711. /*
  712. * reset it to avoid build_info_free() freeing their resource.
  713. *
  714. * The resource of successfully registered feature devices
  715. * will be freed by platform_device_unregister(). See the
  716. * comments in build_info_create_dev().
  717. */
  718. binfo->feature_dev = NULL;
  719. }
  720. return ret;
  721. }
  722. static int
  723. build_info_create_dev(struct build_feature_devs_info *binfo,
  724. enum dfl_id_type type)
  725. {
  726. struct platform_device *fdev;
  727. if (type >= DFL_ID_MAX)
  728. return -EINVAL;
  729. /*
  730. * we use -ENODEV as the initialization indicator which indicates
  731. * whether the id need to be reclaimed
  732. */
  733. fdev = platform_device_alloc(dfl_devs[type].name, -ENODEV);
  734. if (!fdev)
  735. return -ENOMEM;
  736. binfo->feature_dev = fdev;
  737. binfo->feature_num = 0;
  738. INIT_LIST_HEAD(&binfo->sub_features);
  739. fdev->id = dfl_id_alloc(type, &fdev->dev);
  740. if (fdev->id < 0)
  741. return fdev->id;
  742. fdev->dev.parent = &binfo->cdev->region->dev;
  743. fdev->dev.devt = dfl_get_devt(dfl_devs[type].devt_type, fdev->id);
  744. return 0;
  745. }
  746. static void build_info_free(struct build_feature_devs_info *binfo)
  747. {
  748. struct dfl_feature_info *finfo, *p;
  749. /*
  750. * it is a valid id, free it. See comments in
  751. * build_info_create_dev()
  752. */
  753. if (binfo->feature_dev && binfo->feature_dev->id >= 0) {
  754. dfl_id_free(feature_dev_id_type(binfo->feature_dev),
  755. binfo->feature_dev->id);
  756. list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
  757. list_del(&finfo->node);
  758. kfree(finfo);
  759. }
  760. }
  761. platform_device_put(binfo->feature_dev);
  762. devm_kfree(binfo->dev, binfo);
  763. }
  764. static inline u32 feature_size(void __iomem *start)
  765. {
  766. u64 v = readq(start + DFH);
  767. u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v);
  768. /* workaround for private features with invalid size, use 4K instead */
  769. return ofst ? ofst : 4096;
  770. }
  771. static u16 feature_id(void __iomem *start)
  772. {
  773. u64 v = readq(start + DFH);
  774. u16 id = FIELD_GET(DFH_ID, v);
  775. u8 type = FIELD_GET(DFH_TYPE, v);
  776. if (type == DFH_TYPE_FIU)
  777. return FEATURE_ID_FIU_HEADER;
  778. else if (type == DFH_TYPE_PRIVATE)
  779. return id;
  780. else if (type == DFH_TYPE_AFU)
  781. return FEATURE_ID_AFU;
  782. WARN_ON(1);
  783. return 0;
  784. }
  785. static int parse_feature_irqs(struct build_feature_devs_info *binfo,
  786. resource_size_t ofst, u16 fid,
  787. unsigned int *irq_base, unsigned int *nr_irqs)
  788. {
  789. void __iomem *base = binfo->ioaddr + ofst;
  790. unsigned int i, ibase, inr = 0;
  791. int virq;
  792. u64 v;
  793. /*
  794. * Ideally DFL framework should only read info from DFL header, but
  795. * current version DFL only provides mmio resources information for
  796. * each feature in DFL Header, no field for interrupt resources.
  797. * Interrupt resource information is provided by specific mmio
  798. * registers of each private feature which supports interrupt. So in
  799. * order to parse and assign irq resources, DFL framework has to look
  800. * into specific capability registers of these private features.
  801. *
  802. * Once future DFL version supports generic interrupt resource
  803. * information in common DFL headers, the generic interrupt parsing
  804. * code will be added. But in order to be compatible to old version
  805. * DFL, the driver may still fall back to these quirks.
  806. */
  807. switch (fid) {
  808. case PORT_FEATURE_ID_UINT:
  809. v = readq(base + PORT_UINT_CAP);
  810. ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
  811. inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
  812. break;
  813. case PORT_FEATURE_ID_ERROR:
  814. v = readq(base + PORT_ERROR_CAP);
  815. ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
  816. inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
  817. break;
  818. case FME_FEATURE_ID_GLOBAL_ERR:
  819. v = readq(base + FME_ERROR_CAP);
  820. ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
  821. inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
  822. break;
  823. }
  824. if (!inr) {
  825. *irq_base = 0;
  826. *nr_irqs = 0;
  827. return 0;
  828. }
  829. dev_dbg(binfo->dev, "feature: 0x%x, irq_base: %u, nr_irqs: %u\n",
  830. fid, ibase, inr);
  831. if (ibase + inr > binfo->nr_irqs) {
  832. dev_err(binfo->dev,
  833. "Invalid interrupt number in feature 0x%x\n", fid);
  834. return -EINVAL;
  835. }
  836. for (i = 0; i < inr; i++) {
  837. virq = binfo->irq_table[ibase + i];
  838. if (virq < 0 || virq > NR_IRQS) {
  839. dev_err(binfo->dev,
  840. "Invalid irq table entry for feature 0x%x\n",
  841. fid);
  842. return -EINVAL;
  843. }
  844. }
  845. *irq_base = ibase;
  846. *nr_irqs = inr;
  847. return 0;
  848. }
  849. /*
  850. * when create sub feature instances, for private features, it doesn't need
  851. * to provide resource size and feature id as they could be read from DFH
  852. * register. For afu sub feature, its register region only contains user
  853. * defined registers, so never trust any information from it, just use the
  854. * resource size information provided by its parent FIU.
  855. */
  856. static int
  857. create_feature_instance(struct build_feature_devs_info *binfo,
  858. resource_size_t ofst, resource_size_t size, u16 fid)
  859. {
  860. unsigned int irq_base, nr_irqs;
  861. struct dfl_feature_info *finfo;
  862. int ret;
  863. /* read feature size and id if inputs are invalid */
  864. size = size ? size : feature_size(binfo->ioaddr + ofst);
  865. fid = fid ? fid : feature_id(binfo->ioaddr + ofst);
  866. if (binfo->len - ofst < size)
  867. return -EINVAL;
  868. ret = parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
  869. if (ret)
  870. return ret;
  871. finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
  872. if (!finfo)
  873. return -ENOMEM;
  874. finfo->fid = fid;
  875. finfo->mmio_res.start = binfo->start + ofst;
  876. finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
  877. finfo->mmio_res.flags = IORESOURCE_MEM;
  878. finfo->irq_base = irq_base;
  879. finfo->nr_irqs = nr_irqs;
  880. list_add_tail(&finfo->node, &binfo->sub_features);
  881. binfo->feature_num++;
  882. return 0;
  883. }
  884. static int parse_feature_port_afu(struct build_feature_devs_info *binfo,
  885. resource_size_t ofst)
  886. {
  887. u64 v = readq(binfo->ioaddr + PORT_HDR_CAP);
  888. u32 size = FIELD_GET(PORT_CAP_MMIO_SIZE, v) << 10;
  889. WARN_ON(!size);
  890. return create_feature_instance(binfo, ofst, size, FEATURE_ID_AFU);
  891. }
  892. #define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev)
  893. static int parse_feature_afu(struct build_feature_devs_info *binfo,
  894. resource_size_t ofst)
  895. {
  896. if (!is_feature_dev_detected(binfo)) {
  897. dev_err(binfo->dev, "this AFU does not belong to any FIU.\n");
  898. return -EINVAL;
  899. }
  900. switch (feature_dev_id_type(binfo->feature_dev)) {
  901. case PORT_ID:
  902. return parse_feature_port_afu(binfo, ofst);
  903. default:
  904. dev_info(binfo->dev, "AFU belonging to FIU %s is not supported yet.\n",
  905. binfo->feature_dev->name);
  906. }
  907. return 0;
  908. }
  909. static int build_info_prepare(struct build_feature_devs_info *binfo,
  910. resource_size_t start, resource_size_t len)
  911. {
  912. struct device *dev = binfo->dev;
  913. void __iomem *ioaddr;
  914. if (!devm_request_mem_region(dev, start, len, dev_name(dev))) {
  915. dev_err(dev, "request region fail, start:%pa, len:%pa\n",
  916. &start, &len);
  917. return -EBUSY;
  918. }
  919. ioaddr = devm_ioremap(dev, start, len);
  920. if (!ioaddr) {
  921. dev_err(dev, "ioremap region fail, start:%pa, len:%pa\n",
  922. &start, &len);
  923. return -ENOMEM;
  924. }
  925. binfo->start = start;
  926. binfo->len = len;
  927. binfo->ioaddr = ioaddr;
  928. return 0;
  929. }
  930. static void build_info_complete(struct build_feature_devs_info *binfo)
  931. {
  932. devm_iounmap(binfo->dev, binfo->ioaddr);
  933. devm_release_mem_region(binfo->dev, binfo->start, binfo->len);
  934. }
  935. static int parse_feature_fiu(struct build_feature_devs_info *binfo,
  936. resource_size_t ofst)
  937. {
  938. int ret = 0;
  939. u32 offset;
  940. u16 id;
  941. u64 v;
  942. if (is_feature_dev_detected(binfo)) {
  943. build_info_complete(binfo);
  944. ret = build_info_commit_dev(binfo);
  945. if (ret)
  946. return ret;
  947. ret = build_info_prepare(binfo, binfo->start + ofst,
  948. binfo->len - ofst);
  949. if (ret)
  950. return ret;
  951. }
  952. v = readq(binfo->ioaddr + DFH);
  953. id = FIELD_GET(DFH_ID, v);
  954. /* create platform device for dfl feature dev */
  955. ret = build_info_create_dev(binfo, dfh_id_to_type(id));
  956. if (ret)
  957. return ret;
  958. ret = create_feature_instance(binfo, 0, 0, 0);
  959. if (ret)
  960. return ret;
  961. /*
  962. * find and parse FIU's child AFU via its NEXT_AFU register.
  963. * please note that only Port has valid NEXT_AFU pointer per spec.
  964. */
  965. v = readq(binfo->ioaddr + NEXT_AFU);
  966. offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
  967. if (offset)
  968. return parse_feature_afu(binfo, offset);
  969. dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
  970. return ret;
  971. }
  972. static int parse_feature_private(struct build_feature_devs_info *binfo,
  973. resource_size_t ofst)
  974. {
  975. if (!is_feature_dev_detected(binfo)) {
  976. dev_err(binfo->dev, "the private feature 0x%x does not belong to any AFU.\n",
  977. feature_id(binfo->ioaddr + ofst));
  978. return -EINVAL;
  979. }
  980. return create_feature_instance(binfo, ofst, 0, 0);
  981. }
  982. /**
  983. * parse_feature - parse a feature on given device feature list
  984. *
  985. * @binfo: build feature devices information.
  986. * @ofst: offset to current FIU header
  987. */
  988. static int parse_feature(struct build_feature_devs_info *binfo,
  989. resource_size_t ofst)
  990. {
  991. u64 v;
  992. u32 type;
  993. v = readq(binfo->ioaddr + ofst + DFH);
  994. type = FIELD_GET(DFH_TYPE, v);
  995. switch (type) {
  996. case DFH_TYPE_AFU:
  997. return parse_feature_afu(binfo, ofst);
  998. case DFH_TYPE_PRIVATE:
  999. return parse_feature_private(binfo, ofst);
  1000. case DFH_TYPE_FIU:
  1001. return parse_feature_fiu(binfo, ofst);
  1002. default:
  1003. dev_info(binfo->dev,
  1004. "Feature Type %x is not supported.\n", type);
  1005. }
  1006. return 0;
  1007. }
  1008. static int parse_feature_list(struct build_feature_devs_info *binfo,
  1009. resource_size_t start, resource_size_t len)
  1010. {
  1011. resource_size_t end = start + len;
  1012. int ret = 0;
  1013. u32 ofst = 0;
  1014. u64 v;
  1015. ret = build_info_prepare(binfo, start, len);
  1016. if (ret)
  1017. return ret;
  1018. /* walk through the device feature list via DFH's next DFH pointer. */
  1019. for (; start < end; start += ofst) {
  1020. if (end - start < DFH_SIZE) {
  1021. dev_err(binfo->dev, "The region is too small to contain a feature.\n");
  1022. return -EINVAL;
  1023. }
  1024. ret = parse_feature(binfo, start - binfo->start);
  1025. if (ret)
  1026. return ret;
  1027. v = readq(binfo->ioaddr + start - binfo->start + DFH);
  1028. ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v);
  1029. /* stop parsing if EOL(End of List) is set or offset is 0 */
  1030. if ((v & DFH_EOL) || !ofst)
  1031. break;
  1032. }
  1033. /* commit current feature device when reach the end of list */
  1034. build_info_complete(binfo);
  1035. if (is_feature_dev_detected(binfo))
  1036. ret = build_info_commit_dev(binfo);
  1037. return ret;
  1038. }
  1039. struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev)
  1040. {
  1041. struct dfl_fpga_enum_info *info;
  1042. get_device(dev);
  1043. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  1044. if (!info) {
  1045. put_device(dev);
  1046. return NULL;
  1047. }
  1048. info->dev = dev;
  1049. INIT_LIST_HEAD(&info->dfls);
  1050. return info;
  1051. }
  1052. EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_alloc);
  1053. void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
  1054. {
  1055. struct dfl_fpga_enum_dfl *tmp, *dfl;
  1056. struct device *dev;
  1057. if (!info)
  1058. return;
  1059. dev = info->dev;
  1060. /* remove all device feature lists in the list. */
  1061. list_for_each_entry_safe(dfl, tmp, &info->dfls, node) {
  1062. list_del(&dfl->node);
  1063. devm_kfree(dev, dfl);
  1064. }
  1065. /* remove irq table */
  1066. if (info->irq_table)
  1067. devm_kfree(dev, info->irq_table);
  1068. devm_kfree(dev, info);
  1069. put_device(dev);
  1070. }
  1071. EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_free);
  1072. /**
  1073. * dfl_fpga_enum_info_add_dfl - add info of a device feature list to enum info
  1074. *
  1075. * @info: ptr to dfl_fpga_enum_info
  1076. * @start: mmio resource address of the device feature list.
  1077. * @len: mmio resource length of the device feature list.
  1078. *
  1079. * One FPGA device may have one or more Device Feature Lists (DFLs), use this
  1080. * function to add information of each DFL to common data structure for next
  1081. * step enumeration.
  1082. *
  1083. * Return: 0 on success, negative error code otherwise.
  1084. */
  1085. int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
  1086. resource_size_t start, resource_size_t len)
  1087. {
  1088. struct dfl_fpga_enum_dfl *dfl;
  1089. dfl = devm_kzalloc(info->dev, sizeof(*dfl), GFP_KERNEL);
  1090. if (!dfl)
  1091. return -ENOMEM;
  1092. dfl->start = start;
  1093. dfl->len = len;
  1094. list_add_tail(&dfl->node, &info->dfls);
  1095. return 0;
  1096. }
  1097. EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
  1098. /**
  1099. * dfl_fpga_enum_info_add_irq - add irq table to enum info
  1100. *
  1101. * @info: ptr to dfl_fpga_enum_info
  1102. * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
  1103. * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
  1104. * this device.
  1105. *
  1106. * One FPGA device may have several interrupts. This function adds irq
  1107. * information of the DFL fpga device to enum info for next step enumeration.
  1108. * This function should be called before dfl_fpga_feature_devs_enumerate().
  1109. * As we only support one irq domain for all DFLs in the same enum info, adding
  1110. * irq table a second time for the same enum info will return error.
  1111. *
  1112. * If we need to enumerate DFLs which belong to different irq domains, we
  1113. * should fill more enum info and enumerate them one by one.
  1114. *
  1115. * Return: 0 on success, negative error code otherwise.
  1116. */
  1117. int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
  1118. unsigned int nr_irqs, int *irq_table)
  1119. {
  1120. if (!nr_irqs || !irq_table)
  1121. return -EINVAL;
  1122. if (info->irq_table)
  1123. return -EEXIST;
  1124. info->irq_table = devm_kmemdup(info->dev, irq_table,
  1125. sizeof(int) * nr_irqs, GFP_KERNEL);
  1126. if (!info->irq_table)
  1127. return -ENOMEM;
  1128. info->nr_irqs = nr_irqs;
  1129. return 0;
  1130. }
  1131. EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
  1132. static int remove_feature_dev(struct device *dev, void *data)
  1133. {
  1134. struct platform_device *pdev = to_platform_device(dev);
  1135. enum dfl_id_type type = feature_dev_id_type(pdev);
  1136. int id = pdev->id;
  1137. platform_device_unregister(pdev);
  1138. dfl_id_free(type, id);
  1139. return 0;
  1140. }
  1141. static void remove_feature_devs(struct dfl_fpga_cdev *cdev)
  1142. {
  1143. device_for_each_child(&cdev->region->dev, NULL, remove_feature_dev);
  1144. }
  1145. /**
  1146. * dfl_fpga_feature_devs_enumerate - enumerate feature devices
  1147. * @info: information for enumeration.
  1148. *
  1149. * This function creates a container device (base FPGA region), enumerates
  1150. * feature devices based on the enumeration info and creates platform devices
  1151. * under the container device.
  1152. *
  1153. * Return: dfl_fpga_cdev struct on success, -errno on failure
  1154. */
  1155. struct dfl_fpga_cdev *
  1156. dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
  1157. {
  1158. struct build_feature_devs_info *binfo;
  1159. struct dfl_fpga_enum_dfl *dfl;
  1160. struct dfl_fpga_cdev *cdev;
  1161. int ret = 0;
  1162. if (!info->dev)
  1163. return ERR_PTR(-ENODEV);
  1164. cdev = devm_kzalloc(info->dev, sizeof(*cdev), GFP_KERNEL);
  1165. if (!cdev)
  1166. return ERR_PTR(-ENOMEM);
  1167. cdev->region = devm_fpga_region_create(info->dev, NULL, NULL);
  1168. if (!cdev->region) {
  1169. ret = -ENOMEM;
  1170. goto free_cdev_exit;
  1171. }
  1172. cdev->parent = info->dev;
  1173. mutex_init(&cdev->lock);
  1174. INIT_LIST_HEAD(&cdev->port_dev_list);
  1175. ret = fpga_region_register(cdev->region);
  1176. if (ret)
  1177. goto free_cdev_exit;
  1178. /* create and init build info for enumeration */
  1179. binfo = devm_kzalloc(info->dev, sizeof(*binfo), GFP_KERNEL);
  1180. if (!binfo) {
  1181. ret = -ENOMEM;
  1182. goto unregister_region_exit;
  1183. }
  1184. binfo->dev = info->dev;
  1185. binfo->cdev = cdev;
  1186. binfo->nr_irqs = info->nr_irqs;
  1187. if (info->nr_irqs)
  1188. binfo->irq_table = info->irq_table;
  1189. /*
  1190. * start enumeration for all feature devices based on Device Feature
  1191. * Lists.
  1192. */
  1193. list_for_each_entry(dfl, &info->dfls, node) {
  1194. ret = parse_feature_list(binfo, dfl->start, dfl->len);
  1195. if (ret) {
  1196. remove_feature_devs(cdev);
  1197. build_info_free(binfo);
  1198. goto unregister_region_exit;
  1199. }
  1200. }
  1201. build_info_free(binfo);
  1202. return cdev;
  1203. unregister_region_exit:
  1204. fpga_region_unregister(cdev->region);
  1205. free_cdev_exit:
  1206. devm_kfree(info->dev, cdev);
  1207. return ERR_PTR(ret);
  1208. }
  1209. EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate);
  1210. /**
  1211. * dfl_fpga_feature_devs_remove - remove all feature devices
  1212. * @cdev: fpga container device.
  1213. *
  1214. * Remove the container device and all feature devices under given container
  1215. * devices.
  1216. */
  1217. void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev)
  1218. {
  1219. struct dfl_feature_platform_data *pdata, *ptmp;
  1220. mutex_lock(&cdev->lock);
  1221. if (cdev->fme_dev)
  1222. put_device(cdev->fme_dev);
  1223. list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) {
  1224. struct platform_device *port_dev = pdata->dev;
  1225. /* remove released ports */
  1226. if (!device_is_registered(&port_dev->dev)) {
  1227. dfl_id_free(feature_dev_id_type(port_dev),
  1228. port_dev->id);
  1229. platform_device_put(port_dev);
  1230. }
  1231. list_del(&pdata->node);
  1232. put_device(&port_dev->dev);
  1233. }
  1234. mutex_unlock(&cdev->lock);
  1235. remove_feature_devs(cdev);
  1236. fpga_region_unregister(cdev->region);
  1237. devm_kfree(cdev->parent, cdev);
  1238. }
  1239. EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove);
  1240. /**
  1241. * __dfl_fpga_cdev_find_port - find a port under given container device
  1242. *
  1243. * @cdev: container device
  1244. * @data: data passed to match function
  1245. * @match: match function used to find specific port from the port device list
  1246. *
  1247. * Find a port device under container device. This function needs to be
  1248. * invoked with lock held.
  1249. *
  1250. * Return: pointer to port's platform device if successful, NULL otherwise.
  1251. *
  1252. * NOTE: you will need to drop the device reference with put_device() after use.
  1253. */
  1254. struct platform_device *
  1255. __dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,
  1256. int (*match)(struct platform_device *, void *))
  1257. {
  1258. struct dfl_feature_platform_data *pdata;
  1259. struct platform_device *port_dev;
  1260. list_for_each_entry(pdata, &cdev->port_dev_list, node) {
  1261. port_dev = pdata->dev;
  1262. if (match(port_dev, data) && get_device(&port_dev->dev))
  1263. return port_dev;
  1264. }
  1265. return NULL;
  1266. }
  1267. EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port);
  1268. static int __init dfl_fpga_init(void)
  1269. {
  1270. int ret;
  1271. ret = bus_register(&dfl_bus_type);
  1272. if (ret)
  1273. return ret;
  1274. dfl_ids_init();
  1275. ret = dfl_chardev_init();
  1276. if (ret) {
  1277. dfl_ids_destroy();
  1278. bus_unregister(&dfl_bus_type);
  1279. }
  1280. return ret;
  1281. }
  1282. /**
  1283. * dfl_fpga_cdev_release_port - release a port platform device
  1284. *
  1285. * @cdev: parent container device.
  1286. * @port_id: id of the port platform device.
  1287. *
  1288. * This function allows user to release a port platform device. This is a
  1289. * mandatory step before turn a port from PF into VF for SRIOV support.
  1290. *
  1291. * Return: 0 on success, negative error code otherwise.
  1292. */
  1293. int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id)
  1294. {
  1295. struct dfl_feature_platform_data *pdata;
  1296. struct platform_device *port_pdev;
  1297. int ret = -ENODEV;
  1298. mutex_lock(&cdev->lock);
  1299. port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
  1300. dfl_fpga_check_port_id);
  1301. if (!port_pdev)
  1302. goto unlock_exit;
  1303. if (!device_is_registered(&port_pdev->dev)) {
  1304. ret = -EBUSY;
  1305. goto put_dev_exit;
  1306. }
  1307. pdata = dev_get_platdata(&port_pdev->dev);
  1308. mutex_lock(&pdata->lock);
  1309. ret = dfl_feature_dev_use_begin(pdata, true);
  1310. mutex_unlock(&pdata->lock);
  1311. if (ret)
  1312. goto put_dev_exit;
  1313. platform_device_del(port_pdev);
  1314. cdev->released_port_num++;
  1315. put_dev_exit:
  1316. put_device(&port_pdev->dev);
  1317. unlock_exit:
  1318. mutex_unlock(&cdev->lock);
  1319. return ret;
  1320. }
  1321. EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port);
  1322. /**
  1323. * dfl_fpga_cdev_assign_port - assign a port platform device back
  1324. *
  1325. * @cdev: parent container device.
  1326. * @port_id: id of the port platform device.
  1327. *
  1328. * This function allows user to assign a port platform device back. This is
  1329. * a mandatory step after disable SRIOV support.
  1330. *
  1331. * Return: 0 on success, negative error code otherwise.
  1332. */
  1333. int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id)
  1334. {
  1335. struct dfl_feature_platform_data *pdata;
  1336. struct platform_device *port_pdev;
  1337. int ret = -ENODEV;
  1338. mutex_lock(&cdev->lock);
  1339. port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
  1340. dfl_fpga_check_port_id);
  1341. if (!port_pdev)
  1342. goto unlock_exit;
  1343. if (device_is_registered(&port_pdev->dev)) {
  1344. ret = -EBUSY;
  1345. goto put_dev_exit;
  1346. }
  1347. ret = platform_device_add(port_pdev);
  1348. if (ret)
  1349. goto put_dev_exit;
  1350. pdata = dev_get_platdata(&port_pdev->dev);
  1351. mutex_lock(&pdata->lock);
  1352. dfl_feature_dev_use_end(pdata);
  1353. mutex_unlock(&pdata->lock);
  1354. cdev->released_port_num--;
  1355. put_dev_exit:
  1356. put_device(&port_pdev->dev);
  1357. unlock_exit:
  1358. mutex_unlock(&cdev->lock);
  1359. return ret;
  1360. }
  1361. EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port);
  1362. static void config_port_access_mode(struct device *fme_dev, int port_id,
  1363. bool is_vf)
  1364. {
  1365. void __iomem *base;
  1366. u64 v;
  1367. base = dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER);
  1368. v = readq(base + FME_HDR_PORT_OFST(port_id));
  1369. v &= ~FME_PORT_OFST_ACC_CTRL;
  1370. v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL,
  1371. is_vf ? FME_PORT_OFST_ACC_VF : FME_PORT_OFST_ACC_PF);
  1372. writeq(v, base + FME_HDR_PORT_OFST(port_id));
  1373. }
  1374. #define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true)
  1375. #define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false)
  1376. /**
  1377. * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode
  1378. *
  1379. * @cdev: parent container device.
  1380. *
  1381. * This function is needed in sriov configuration routine. It could be used to
  1382. * configure the all released ports from VF access mode to PF.
  1383. */
  1384. void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev)
  1385. {
  1386. struct dfl_feature_platform_data *pdata;
  1387. mutex_lock(&cdev->lock);
  1388. list_for_each_entry(pdata, &cdev->port_dev_list, node) {
  1389. if (device_is_registered(&pdata->dev->dev))
  1390. continue;
  1391. config_port_pf_mode(cdev->fme_dev, pdata->id);
  1392. }
  1393. mutex_unlock(&cdev->lock);
  1394. }
  1395. EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf);
  1396. /**
  1397. * dfl_fpga_cdev_config_ports_vf - configure ports to VF access mode
  1398. *
  1399. * @cdev: parent container device.
  1400. * @num_vfs: VF device number.
  1401. *
  1402. * This function is needed in sriov configuration routine. It could be used to
  1403. * configure the released ports from PF access mode to VF.
  1404. *
  1405. * Return: 0 on success, negative error code otherwise.
  1406. */
  1407. int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
  1408. {
  1409. struct dfl_feature_platform_data *pdata;
  1410. int ret = 0;
  1411. mutex_lock(&cdev->lock);
  1412. /*
  1413. * can't turn multiple ports into 1 VF device, only 1 port for 1 VF
  1414. * device, so if released port number doesn't match VF device number,
  1415. * then reject the request with -EINVAL error code.
  1416. */
  1417. if (cdev->released_port_num != num_vfs) {
  1418. ret = -EINVAL;
  1419. goto done;
  1420. }
  1421. list_for_each_entry(pdata, &cdev->port_dev_list, node) {
  1422. if (device_is_registered(&pdata->dev->dev))
  1423. continue;
  1424. config_port_vf_mode(cdev->fme_dev, pdata->id);
  1425. }
  1426. done:
  1427. mutex_unlock(&cdev->lock);
  1428. return ret;
  1429. }
  1430. EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
  1431. static irqreturn_t dfl_irq_handler(int irq, void *arg)
  1432. {
  1433. struct eventfd_ctx *trigger = arg;
  1434. eventfd_signal(trigger, 1);
  1435. return IRQ_HANDLED;
  1436. }
  1437. static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
  1438. int fd)
  1439. {
  1440. struct platform_device *pdev = feature->dev;
  1441. struct eventfd_ctx *trigger;
  1442. int irq, ret;
  1443. irq = feature->irq_ctx[idx].irq;
  1444. if (feature->irq_ctx[idx].trigger) {
  1445. free_irq(irq, feature->irq_ctx[idx].trigger);
  1446. kfree(feature->irq_ctx[idx].name);
  1447. eventfd_ctx_put(feature->irq_ctx[idx].trigger);
  1448. feature->irq_ctx[idx].trigger = NULL;
  1449. }
  1450. if (fd < 0)
  1451. return 0;
  1452. feature->irq_ctx[idx].name =
  1453. kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%x)", idx,
  1454. dev_name(&pdev->dev), feature->id);
  1455. if (!feature->irq_ctx[idx].name)
  1456. return -ENOMEM;
  1457. trigger = eventfd_ctx_fdget(fd);
  1458. if (IS_ERR(trigger)) {
  1459. ret = PTR_ERR(trigger);
  1460. goto free_name;
  1461. }
  1462. ret = request_irq(irq, dfl_irq_handler, 0,
  1463. feature->irq_ctx[idx].name, trigger);
  1464. if (!ret) {
  1465. feature->irq_ctx[idx].trigger = trigger;
  1466. return ret;
  1467. }
  1468. eventfd_ctx_put(trigger);
  1469. free_name:
  1470. kfree(feature->irq_ctx[idx].name);
  1471. return ret;
  1472. }
  1473. /**
  1474. * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
  1475. *
  1476. * @feature: dfl sub feature.
  1477. * @start: start of irq index in this dfl sub feature.
  1478. * @count: number of irqs.
  1479. * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
  1480. * unbind "count" specified number of irqs if fds ptr is NULL.
  1481. *
  1482. * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
  1483. * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
  1484. * NULL.
  1485. *
  1486. * Return: 0 on success, negative error code otherwise.
  1487. */
  1488. int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
  1489. unsigned int count, int32_t *fds)
  1490. {
  1491. unsigned int i;
  1492. int ret = 0;
  1493. /* overflow */
  1494. if (unlikely(start + count < start))
  1495. return -EINVAL;
  1496. /* exceeds nr_irqs */
  1497. if (start + count > feature->nr_irqs)
  1498. return -EINVAL;
  1499. for (i = 0; i < count; i++) {
  1500. int fd = fds ? fds[i] : -1;
  1501. ret = do_set_irq_trigger(feature, start + i, fd);
  1502. if (ret) {
  1503. while (i--)
  1504. do_set_irq_trigger(feature, start + i, -1);
  1505. break;
  1506. }
  1507. }
  1508. return ret;
  1509. }
  1510. EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
  1511. /**
  1512. * dfl_feature_ioctl_get_num_irqs - dfl feature _GET_IRQ_NUM ioctl interface.
  1513. * @pdev: the feature device which has the sub feature
  1514. * @feature: the dfl sub feature
  1515. * @arg: ioctl argument
  1516. *
  1517. * Return: 0 on success, negative error code otherwise.
  1518. */
  1519. long dfl_feature_ioctl_get_num_irqs(struct platform_device *pdev,
  1520. struct dfl_feature *feature,
  1521. unsigned long arg)
  1522. {
  1523. return put_user(feature->nr_irqs, (__u32 __user *)arg);
  1524. }
  1525. EXPORT_SYMBOL_GPL(dfl_feature_ioctl_get_num_irqs);
  1526. /**
  1527. * dfl_feature_ioctl_set_irq - dfl feature _SET_IRQ ioctl interface.
  1528. * @pdev: the feature device which has the sub feature
  1529. * @feature: the dfl sub feature
  1530. * @arg: ioctl argument
  1531. *
  1532. * Return: 0 on success, negative error code otherwise.
  1533. */
  1534. long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
  1535. struct dfl_feature *feature,
  1536. unsigned long arg)
  1537. {
  1538. struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
  1539. struct dfl_fpga_irq_set hdr;
  1540. s32 *fds;
  1541. long ret;
  1542. if (!feature->nr_irqs)
  1543. return -ENOENT;
  1544. if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
  1545. return -EFAULT;
  1546. if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
  1547. (hdr.start + hdr.count < hdr.start))
  1548. return -EINVAL;
  1549. fds = memdup_user((void __user *)(arg + sizeof(hdr)),
  1550. hdr.count * sizeof(s32));
  1551. if (IS_ERR(fds))
  1552. return PTR_ERR(fds);
  1553. mutex_lock(&pdata->lock);
  1554. ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
  1555. mutex_unlock(&pdata->lock);
  1556. kfree(fds);
  1557. return ret;
  1558. }
  1559. EXPORT_SYMBOL_GPL(dfl_feature_ioctl_set_irq);
  1560. static void __exit dfl_fpga_exit(void)
  1561. {
  1562. dfl_chardev_uinit();
  1563. dfl_ids_destroy();
  1564. bus_unregister(&dfl_bus_type);
  1565. }
  1566. module_init(dfl_fpga_init);
  1567. module_exit(dfl_fpga_exit);
  1568. MODULE_DESCRIPTION("FPGA Device Feature List (DFL) Support");
  1569. MODULE_AUTHOR("Intel Corporation");
  1570. MODULE_LICENSE("GPL v2");