dfl-fme-pr.h 2.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Header file for FPGA Management Engine (FME) Partial Reconfiguration Driver
  4. *
  5. * Copyright (C) 2017-2018 Intel Corporation, Inc.
  6. *
  7. * Authors:
  8. * Kang Luwei <luwei.kang@intel.com>
  9. * Xiao Guangrong <guangrong.xiao@linux.intel.com>
  10. * Wu Hao <hao.wu@intel.com>
  11. * Joseph Grecco <joe.grecco@intel.com>
  12. * Enno Luebbers <enno.luebbers@intel.com>
  13. * Tim Whisonant <tim.whisonant@intel.com>
  14. * Ananda Ravuri <ananda.ravuri@intel.com>
  15. * Henry Mitchel <henry.mitchel@intel.com>
  16. */
  17. #ifndef __DFL_FME_PR_H
  18. #define __DFL_FME_PR_H
  19. #include <linux/platform_device.h>
  20. /**
  21. * struct dfl_fme_region - FME fpga region data structure
  22. *
  23. * @region: platform device of the FPGA region.
  24. * @node: used to link fme_region to a list.
  25. * @port_id: indicate which port this region connected to.
  26. */
  27. struct dfl_fme_region {
  28. struct platform_device *region;
  29. struct list_head node;
  30. int port_id;
  31. };
  32. /**
  33. * struct dfl_fme_region_pdata - platform data for FME region platform device.
  34. *
  35. * @mgr: platform device of the FPGA manager.
  36. * @br: platform device of the FPGA bridge.
  37. * @region_id: region id (same as port_id).
  38. */
  39. struct dfl_fme_region_pdata {
  40. struct platform_device *mgr;
  41. struct platform_device *br;
  42. int region_id;
  43. };
  44. /**
  45. * struct dfl_fme_bridge - FME fpga bridge data structure
  46. *
  47. * @br: platform device of the FPGA bridge.
  48. * @node: used to link fme_bridge to a list.
  49. */
  50. struct dfl_fme_bridge {
  51. struct platform_device *br;
  52. struct list_head node;
  53. };
  54. /**
  55. * struct dfl_fme_bridge_pdata - platform data for FME bridge platform device.
  56. *
  57. * @cdev: container device.
  58. * @port_id: port id.
  59. */
  60. struct dfl_fme_br_pdata {
  61. struct dfl_fpga_cdev *cdev;
  62. int port_id;
  63. };
  64. /**
  65. * struct dfl_fme_mgr_pdata - platform data for FME manager platform device.
  66. *
  67. * @ioaddr: mapped io address for FME manager platform device.
  68. */
  69. struct dfl_fme_mgr_pdata {
  70. void __iomem *ioaddr;
  71. };
  72. #define DFL_FPGA_FME_MGR "dfl-fme-mgr"
  73. #define DFL_FPGA_FME_BRIDGE "dfl-fme-bridge"
  74. #define DFL_FPGA_FME_REGION "dfl-fme-region"
  75. #endif /* __DFL_FME_PR_H */