memconsole-coreboot.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * memconsole-coreboot.c
  4. *
  5. * Memory based BIOS console accessed through coreboot table.
  6. *
  7. * Copyright 2017 Google Inc.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/io.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include "memconsole.h"
  14. #include "coreboot_table.h"
  15. #define CB_TAG_CBMEM_CONSOLE 0x17
  16. /* CBMEM firmware console log descriptor. */
  17. struct cbmem_cons {
  18. u32 size_dont_access_after_boot;
  19. u32 cursor;
  20. u8 body[];
  21. } __packed;
  22. #define CURSOR_MASK ((1 << 28) - 1)
  23. #define OVERFLOW (1 << 31)
  24. static struct cbmem_cons *cbmem_console;
  25. static u32 cbmem_console_size;
  26. /*
  27. * The cbmem_console structure is read again on every access because it may
  28. * change at any time if runtime firmware logs new messages. This may rarely
  29. * lead to race conditions where the firmware overwrites the beginning of the
  30. * ring buffer with more lines after we have already read |cursor|. It should be
  31. * rare and harmless enough that we don't spend extra effort working around it.
  32. */
  33. static ssize_t memconsole_coreboot_read(char *buf, loff_t pos, size_t count)
  34. {
  35. u32 cursor = cbmem_console->cursor & CURSOR_MASK;
  36. u32 flags = cbmem_console->cursor & ~CURSOR_MASK;
  37. u32 size = cbmem_console_size;
  38. struct seg { /* describes ring buffer segments in logical order */
  39. u32 phys; /* physical offset from start of mem buffer */
  40. u32 len; /* length of segment */
  41. } seg[2] = { {0}, {0} };
  42. size_t done = 0;
  43. int i;
  44. if (flags & OVERFLOW) {
  45. if (cursor > size) /* Shouldn't really happen, but... */
  46. cursor = 0;
  47. seg[0] = (struct seg){.phys = cursor, .len = size - cursor};
  48. seg[1] = (struct seg){.phys = 0, .len = cursor};
  49. } else {
  50. seg[0] = (struct seg){.phys = 0, .len = min(cursor, size)};
  51. }
  52. for (i = 0; i < ARRAY_SIZE(seg) && count > done; i++) {
  53. done += memory_read_from_buffer(buf + done, count - done, &pos,
  54. cbmem_console->body + seg[i].phys, seg[i].len);
  55. pos -= seg[i].len;
  56. }
  57. return done;
  58. }
  59. static int memconsole_probe(struct coreboot_device *dev)
  60. {
  61. struct cbmem_cons *tmp_cbmc;
  62. tmp_cbmc = memremap(dev->cbmem_ref.cbmem_addr,
  63. sizeof(*tmp_cbmc), MEMREMAP_WB);
  64. if (!tmp_cbmc)
  65. return -ENOMEM;
  66. /* Read size only once to prevent overrun attack through /dev/mem. */
  67. cbmem_console_size = tmp_cbmc->size_dont_access_after_boot;
  68. cbmem_console = devm_memremap(&dev->dev, dev->cbmem_ref.cbmem_addr,
  69. cbmem_console_size + sizeof(*cbmem_console),
  70. MEMREMAP_WB);
  71. memunmap(tmp_cbmc);
  72. if (IS_ERR(cbmem_console))
  73. return PTR_ERR(cbmem_console);
  74. memconsole_setup(memconsole_coreboot_read);
  75. return memconsole_sysfs_init();
  76. }
  77. static int memconsole_remove(struct coreboot_device *dev)
  78. {
  79. memconsole_exit();
  80. return 0;
  81. }
  82. static struct coreboot_driver memconsole_driver = {
  83. .probe = memconsole_probe,
  84. .remove = memconsole_remove,
  85. .drv = {
  86. .name = "memconsole",
  87. },
  88. .tag = CB_TAG_CBMEM_CONSOLE,
  89. };
  90. module_coreboot_driver(memconsole_driver);
  91. MODULE_AUTHOR("Google, Inc.");
  92. MODULE_LICENSE("GPL");