k3-psil-am654.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
  4. * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
  5. */
  6. #include <linux/kernel.h>
  7. #include "k3-psil-priv.h"
  8. #define PSIL_PDMA_XY_TR(x) \
  9. { \
  10. .thread_id = x, \
  11. .ep_config = { \
  12. .ep_type = PSIL_EP_PDMA_XY, \
  13. }, \
  14. }
  15. #define PSIL_PDMA_XY_PKT(x) \
  16. { \
  17. .thread_id = x, \
  18. .ep_config = { \
  19. .ep_type = PSIL_EP_PDMA_XY, \
  20. .pkt_mode = 1, \
  21. }, \
  22. }
  23. #define PSIL_ETHERNET(x) \
  24. { \
  25. .thread_id = x, \
  26. .ep_config = { \
  27. .ep_type = PSIL_EP_NATIVE, \
  28. .pkt_mode = 1, \
  29. .needs_epib = 1, \
  30. .psd_size = 16, \
  31. }, \
  32. }
  33. #define PSIL_SA2UL(x, tx) \
  34. { \
  35. .thread_id = x, \
  36. .ep_config = { \
  37. .ep_type = PSIL_EP_NATIVE, \
  38. .pkt_mode = 1, \
  39. .needs_epib = 1, \
  40. .psd_size = 64, \
  41. .notdpkt = tx, \
  42. }, \
  43. }
  44. /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
  45. static struct psil_ep am654_src_ep_map[] = {
  46. /* SA2UL */
  47. PSIL_SA2UL(0x4000, 0),
  48. PSIL_SA2UL(0x4001, 0),
  49. PSIL_SA2UL(0x4002, 0),
  50. PSIL_SA2UL(0x4003, 0),
  51. /* PRU_ICSSG0 */
  52. PSIL_ETHERNET(0x4100),
  53. PSIL_ETHERNET(0x4101),
  54. PSIL_ETHERNET(0x4102),
  55. PSIL_ETHERNET(0x4103),
  56. /* PRU_ICSSG1 */
  57. PSIL_ETHERNET(0x4200),
  58. PSIL_ETHERNET(0x4201),
  59. PSIL_ETHERNET(0x4202),
  60. PSIL_ETHERNET(0x4203),
  61. /* PRU_ICSSG2 */
  62. PSIL_ETHERNET(0x4300),
  63. PSIL_ETHERNET(0x4301),
  64. PSIL_ETHERNET(0x4302),
  65. PSIL_ETHERNET(0x4303),
  66. /* PDMA0 - McASPs */
  67. PSIL_PDMA_XY_TR(0x4400),
  68. PSIL_PDMA_XY_TR(0x4401),
  69. PSIL_PDMA_XY_TR(0x4402),
  70. /* PDMA1 - SPI0-4 */
  71. PSIL_PDMA_XY_PKT(0x4500),
  72. PSIL_PDMA_XY_PKT(0x4501),
  73. PSIL_PDMA_XY_PKT(0x4502),
  74. PSIL_PDMA_XY_PKT(0x4503),
  75. PSIL_PDMA_XY_PKT(0x4504),
  76. PSIL_PDMA_XY_PKT(0x4505),
  77. PSIL_PDMA_XY_PKT(0x4506),
  78. PSIL_PDMA_XY_PKT(0x4507),
  79. PSIL_PDMA_XY_PKT(0x4508),
  80. PSIL_PDMA_XY_PKT(0x4509),
  81. PSIL_PDMA_XY_PKT(0x450a),
  82. PSIL_PDMA_XY_PKT(0x450b),
  83. PSIL_PDMA_XY_PKT(0x450c),
  84. PSIL_PDMA_XY_PKT(0x450d),
  85. PSIL_PDMA_XY_PKT(0x450e),
  86. PSIL_PDMA_XY_PKT(0x450f),
  87. PSIL_PDMA_XY_PKT(0x4510),
  88. PSIL_PDMA_XY_PKT(0x4511),
  89. PSIL_PDMA_XY_PKT(0x4512),
  90. PSIL_PDMA_XY_PKT(0x4513),
  91. /* PDMA1 - USART0-2 */
  92. PSIL_PDMA_XY_PKT(0x4514),
  93. PSIL_PDMA_XY_PKT(0x4515),
  94. PSIL_PDMA_XY_PKT(0x4516),
  95. /* CPSW0 */
  96. PSIL_ETHERNET(0x7000),
  97. /* MCU_PDMA0 - ADCs */
  98. PSIL_PDMA_XY_TR(0x7100),
  99. PSIL_PDMA_XY_TR(0x7101),
  100. PSIL_PDMA_XY_TR(0x7102),
  101. PSIL_PDMA_XY_TR(0x7103),
  102. /* MCU_PDMA1 - MCU_SPI0-2 */
  103. PSIL_PDMA_XY_PKT(0x7200),
  104. PSIL_PDMA_XY_PKT(0x7201),
  105. PSIL_PDMA_XY_PKT(0x7202),
  106. PSIL_PDMA_XY_PKT(0x7203),
  107. PSIL_PDMA_XY_PKT(0x7204),
  108. PSIL_PDMA_XY_PKT(0x7205),
  109. PSIL_PDMA_XY_PKT(0x7206),
  110. PSIL_PDMA_XY_PKT(0x7207),
  111. PSIL_PDMA_XY_PKT(0x7208),
  112. PSIL_PDMA_XY_PKT(0x7209),
  113. PSIL_PDMA_XY_PKT(0x720a),
  114. PSIL_PDMA_XY_PKT(0x720b),
  115. /* MCU_PDMA1 - MCU_USART0 */
  116. PSIL_PDMA_XY_PKT(0x7212),
  117. };
  118. /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
  119. static struct psil_ep am654_dst_ep_map[] = {
  120. /* SA2UL */
  121. PSIL_SA2UL(0xc000, 1),
  122. PSIL_SA2UL(0xc001, 1),
  123. /* PRU_ICSSG0 */
  124. PSIL_ETHERNET(0xc100),
  125. PSIL_ETHERNET(0xc101),
  126. PSIL_ETHERNET(0xc102),
  127. PSIL_ETHERNET(0xc103),
  128. PSIL_ETHERNET(0xc104),
  129. PSIL_ETHERNET(0xc105),
  130. PSIL_ETHERNET(0xc106),
  131. PSIL_ETHERNET(0xc107),
  132. /* PRU_ICSSG1 */
  133. PSIL_ETHERNET(0xc200),
  134. PSIL_ETHERNET(0xc201),
  135. PSIL_ETHERNET(0xc202),
  136. PSIL_ETHERNET(0xc203),
  137. PSIL_ETHERNET(0xc204),
  138. PSIL_ETHERNET(0xc205),
  139. PSIL_ETHERNET(0xc206),
  140. PSIL_ETHERNET(0xc207),
  141. /* PRU_ICSSG2 */
  142. PSIL_ETHERNET(0xc300),
  143. PSIL_ETHERNET(0xc301),
  144. PSIL_ETHERNET(0xc302),
  145. PSIL_ETHERNET(0xc303),
  146. PSIL_ETHERNET(0xc304),
  147. PSIL_ETHERNET(0xc305),
  148. PSIL_ETHERNET(0xc306),
  149. PSIL_ETHERNET(0xc307),
  150. /* CPSW0 */
  151. PSIL_ETHERNET(0xf000),
  152. PSIL_ETHERNET(0xf001),
  153. PSIL_ETHERNET(0xf002),
  154. PSIL_ETHERNET(0xf003),
  155. PSIL_ETHERNET(0xf004),
  156. PSIL_ETHERNET(0xf005),
  157. PSIL_ETHERNET(0xf006),
  158. PSIL_ETHERNET(0xf007),
  159. };
  160. struct psil_ep_map am654_ep_map = {
  161. .name = "am654",
  162. .src = am654_src_ep_map,
  163. .src_count = ARRAY_SIZE(am654_src_ep_map),
  164. .dst = am654_dst_ep_map,
  165. .dst_count = ARRAY_SIZE(am654_dst_ep_map),
  166. };