pci.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PCI driver for the High Speed UART DMA
  4. *
  5. * Copyright (C) 2015 Intel Corporation
  6. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  7. *
  8. * Partially based on the bits found in drivers/tty/serial/mfd.c.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/device.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include "hsu.h"
  15. #define HSU_PCI_DMASR 0x00
  16. #define HSU_PCI_DMAISR 0x04
  17. #define HSU_PCI_CHAN_OFFSET 0x100
  18. #define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA 0x081e
  19. #define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA 0x1192
  20. static irqreturn_t hsu_pci_irq(int irq, void *dev)
  21. {
  22. struct hsu_dma_chip *chip = dev;
  23. u32 dmaisr;
  24. u32 status;
  25. unsigned short i;
  26. int ret = 0;
  27. int err;
  28. dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
  29. for (i = 0; i < chip->hsu->nr_channels; i++) {
  30. if (dmaisr & 0x1) {
  31. err = hsu_dma_get_status(chip, i, &status);
  32. if (err > 0)
  33. ret |= 1;
  34. else if (err == 0)
  35. ret |= hsu_dma_do_irq(chip, i, status);
  36. }
  37. dmaisr >>= 1;
  38. }
  39. return IRQ_RETVAL(ret);
  40. }
  41. static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  42. {
  43. struct hsu_dma_chip *chip;
  44. int ret;
  45. ret = pcim_enable_device(pdev);
  46. if (ret)
  47. return ret;
  48. ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
  49. if (ret) {
  50. dev_err(&pdev->dev, "I/O memory remapping failed\n");
  51. return ret;
  52. }
  53. pci_set_master(pdev);
  54. pci_try_set_mwi(pdev);
  55. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  56. if (ret)
  57. return ret;
  58. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  59. if (ret)
  60. return ret;
  61. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  62. if (!chip)
  63. return -ENOMEM;
  64. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  65. if (ret < 0)
  66. return ret;
  67. chip->dev = &pdev->dev;
  68. chip->regs = pcim_iomap_table(pdev)[0];
  69. chip->length = pci_resource_len(pdev, 0);
  70. chip->offset = HSU_PCI_CHAN_OFFSET;
  71. chip->irq = pci_irq_vector(pdev, 0);
  72. ret = hsu_dma_probe(chip);
  73. if (ret)
  74. return ret;
  75. ret = request_irq(chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip);
  76. if (ret)
  77. goto err_register_irq;
  78. /*
  79. * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
  80. * to have different numbers, is shared between HSU DMA and UART IPs.
  81. * Thus on such SoCs we are expecting that IRQ handler is called in
  82. * UART driver only. Instead of handling the spurious interrupt
  83. * from HSU DMA here and waste CPU time and delay HSU UART interrupt
  84. * handling, disable the interrupt entirely.
  85. */
  86. if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
  87. disable_irq_nosync(chip->irq);
  88. pci_set_drvdata(pdev, chip);
  89. return 0;
  90. err_register_irq:
  91. hsu_dma_remove(chip);
  92. return ret;
  93. }
  94. static void hsu_pci_remove(struct pci_dev *pdev)
  95. {
  96. struct hsu_dma_chip *chip = pci_get_drvdata(pdev);
  97. free_irq(chip->irq, chip);
  98. hsu_dma_remove(chip);
  99. }
  100. static const struct pci_device_id hsu_pci_id_table[] = {
  101. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
  102. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },
  103. { }
  104. };
  105. MODULE_DEVICE_TABLE(pci, hsu_pci_id_table);
  106. static struct pci_driver hsu_pci_driver = {
  107. .name = "hsu_dma_pci",
  108. .id_table = hsu_pci_id_table,
  109. .probe = hsu_pci_probe,
  110. .remove = hsu_pci_remove,
  111. };
  112. module_pci_driver(hsu_pci_driver);
  113. MODULE_LICENSE("GPL v2");
  114. MODULE_DESCRIPTION("High Speed UART DMA PCI driver");
  115. MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");