rk3288_crypto.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Crypto acceleration support for Rockchip RK3288
  4. *
  5. * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
  6. *
  7. * Author: Zain Wang <zain.wang@rock-chips.com>
  8. *
  9. * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
  10. */
  11. #include "rk3288_crypto.h"
  12. #include <linux/dma-mapping.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/of.h>
  16. #include <linux/clk.h>
  17. #include <linux/crypto.h>
  18. #include <linux/reset.h>
  19. static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
  20. {
  21. int err;
  22. err = clk_prepare_enable(dev->sclk);
  23. if (err) {
  24. dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n",
  25. __func__, __LINE__);
  26. goto err_return;
  27. }
  28. err = clk_prepare_enable(dev->aclk);
  29. if (err) {
  30. dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n",
  31. __func__, __LINE__);
  32. goto err_aclk;
  33. }
  34. err = clk_prepare_enable(dev->hclk);
  35. if (err) {
  36. dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n",
  37. __func__, __LINE__);
  38. goto err_hclk;
  39. }
  40. err = clk_prepare_enable(dev->dmaclk);
  41. if (err) {
  42. dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n",
  43. __func__, __LINE__);
  44. goto err_dmaclk;
  45. }
  46. return err;
  47. err_dmaclk:
  48. clk_disable_unprepare(dev->hclk);
  49. err_hclk:
  50. clk_disable_unprepare(dev->aclk);
  51. err_aclk:
  52. clk_disable_unprepare(dev->sclk);
  53. err_return:
  54. return err;
  55. }
  56. static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
  57. {
  58. clk_disable_unprepare(dev->dmaclk);
  59. clk_disable_unprepare(dev->hclk);
  60. clk_disable_unprepare(dev->aclk);
  61. clk_disable_unprepare(dev->sclk);
  62. }
  63. static int check_alignment(struct scatterlist *sg_src,
  64. struct scatterlist *sg_dst,
  65. int align_mask)
  66. {
  67. int in, out, align;
  68. in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
  69. IS_ALIGNED((uint32_t)sg_src->length, align_mask);
  70. if (!sg_dst)
  71. return in;
  72. out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
  73. IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
  74. align = in && out;
  75. return (align && (sg_src->length == sg_dst->length));
  76. }
  77. static int rk_load_data(struct rk_crypto_info *dev,
  78. struct scatterlist *sg_src,
  79. struct scatterlist *sg_dst)
  80. {
  81. unsigned int count;
  82. dev->aligned = dev->aligned ?
  83. check_alignment(sg_src, sg_dst, dev->align_size) :
  84. dev->aligned;
  85. if (dev->aligned) {
  86. count = min(dev->left_bytes, sg_src->length);
  87. dev->left_bytes -= count;
  88. if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
  89. dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n",
  90. __func__, __LINE__);
  91. return -EINVAL;
  92. }
  93. dev->addr_in = sg_dma_address(sg_src);
  94. if (sg_dst) {
  95. if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
  96. dev_err(dev->dev,
  97. "[%s:%d] dma_map_sg(dst) error\n",
  98. __func__, __LINE__);
  99. dma_unmap_sg(dev->dev, sg_src, 1,
  100. DMA_TO_DEVICE);
  101. return -EINVAL;
  102. }
  103. dev->addr_out = sg_dma_address(sg_dst);
  104. }
  105. } else {
  106. count = (dev->left_bytes > PAGE_SIZE) ?
  107. PAGE_SIZE : dev->left_bytes;
  108. if (!sg_pcopy_to_buffer(dev->first, dev->src_nents,
  109. dev->addr_vir, count,
  110. dev->total - dev->left_bytes)) {
  111. dev_err(dev->dev, "[%s:%d] pcopy err\n",
  112. __func__, __LINE__);
  113. return -EINVAL;
  114. }
  115. dev->left_bytes -= count;
  116. sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
  117. if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
  118. dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n",
  119. __func__, __LINE__);
  120. return -ENOMEM;
  121. }
  122. dev->addr_in = sg_dma_address(&dev->sg_tmp);
  123. if (sg_dst) {
  124. if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
  125. DMA_FROM_DEVICE)) {
  126. dev_err(dev->dev,
  127. "[%s:%d] dma_map_sg(sg_tmp) error\n",
  128. __func__, __LINE__);
  129. dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
  130. DMA_TO_DEVICE);
  131. return -ENOMEM;
  132. }
  133. dev->addr_out = sg_dma_address(&dev->sg_tmp);
  134. }
  135. }
  136. dev->count = count;
  137. return 0;
  138. }
  139. static void rk_unload_data(struct rk_crypto_info *dev)
  140. {
  141. struct scatterlist *sg_in, *sg_out;
  142. sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
  143. dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
  144. if (dev->sg_dst) {
  145. sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
  146. dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
  147. }
  148. }
  149. static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
  150. {
  151. struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
  152. u32 interrupt_status;
  153. spin_lock(&dev->lock);
  154. interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
  155. CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
  156. if (interrupt_status & 0x0a) {
  157. dev_warn(dev->dev, "DMA Error\n");
  158. dev->err = -EFAULT;
  159. }
  160. tasklet_schedule(&dev->done_task);
  161. spin_unlock(&dev->lock);
  162. return IRQ_HANDLED;
  163. }
  164. static int rk_crypto_enqueue(struct rk_crypto_info *dev,
  165. struct crypto_async_request *async_req)
  166. {
  167. unsigned long flags;
  168. int ret;
  169. spin_lock_irqsave(&dev->lock, flags);
  170. ret = crypto_enqueue_request(&dev->queue, async_req);
  171. if (dev->busy) {
  172. spin_unlock_irqrestore(&dev->lock, flags);
  173. return ret;
  174. }
  175. dev->busy = true;
  176. spin_unlock_irqrestore(&dev->lock, flags);
  177. tasklet_schedule(&dev->queue_task);
  178. return ret;
  179. }
  180. static void rk_crypto_queue_task_cb(unsigned long data)
  181. {
  182. struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
  183. struct crypto_async_request *async_req, *backlog;
  184. unsigned long flags;
  185. int err = 0;
  186. dev->err = 0;
  187. spin_lock_irqsave(&dev->lock, flags);
  188. backlog = crypto_get_backlog(&dev->queue);
  189. async_req = crypto_dequeue_request(&dev->queue);
  190. if (!async_req) {
  191. dev->busy = false;
  192. spin_unlock_irqrestore(&dev->lock, flags);
  193. return;
  194. }
  195. spin_unlock_irqrestore(&dev->lock, flags);
  196. if (backlog) {
  197. backlog->complete(backlog, -EINPROGRESS);
  198. backlog = NULL;
  199. }
  200. dev->async_req = async_req;
  201. err = dev->start(dev);
  202. if (err)
  203. dev->complete(dev->async_req, err);
  204. }
  205. static void rk_crypto_done_task_cb(unsigned long data)
  206. {
  207. struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
  208. if (dev->err) {
  209. dev->complete(dev->async_req, dev->err);
  210. return;
  211. }
  212. dev->err = dev->update(dev);
  213. if (dev->err)
  214. dev->complete(dev->async_req, dev->err);
  215. }
  216. static struct rk_crypto_tmp *rk_cipher_algs[] = {
  217. &rk_ecb_aes_alg,
  218. &rk_cbc_aes_alg,
  219. &rk_ecb_des_alg,
  220. &rk_cbc_des_alg,
  221. &rk_ecb_des3_ede_alg,
  222. &rk_cbc_des3_ede_alg,
  223. &rk_ahash_sha1,
  224. &rk_ahash_sha256,
  225. &rk_ahash_md5,
  226. };
  227. static int rk_crypto_register(struct rk_crypto_info *crypto_info)
  228. {
  229. unsigned int i, k;
  230. int err = 0;
  231. for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
  232. rk_cipher_algs[i]->dev = crypto_info;
  233. if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
  234. err = crypto_register_skcipher(
  235. &rk_cipher_algs[i]->alg.skcipher);
  236. else
  237. err = crypto_register_ahash(
  238. &rk_cipher_algs[i]->alg.hash);
  239. if (err)
  240. goto err_cipher_algs;
  241. }
  242. return 0;
  243. err_cipher_algs:
  244. for (k = 0; k < i; k++) {
  245. if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
  246. crypto_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher);
  247. else
  248. crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
  249. }
  250. return err;
  251. }
  252. static void rk_crypto_unregister(void)
  253. {
  254. unsigned int i;
  255. for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
  256. if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
  257. crypto_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher);
  258. else
  259. crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
  260. }
  261. }
  262. static void rk_crypto_action(void *data)
  263. {
  264. struct rk_crypto_info *crypto_info = data;
  265. reset_control_assert(crypto_info->rst);
  266. }
  267. static const struct of_device_id crypto_of_id_table[] = {
  268. { .compatible = "rockchip,rk3288-crypto" },
  269. {}
  270. };
  271. MODULE_DEVICE_TABLE(of, crypto_of_id_table);
  272. static int rk_crypto_probe(struct platform_device *pdev)
  273. {
  274. struct device *dev = &pdev->dev;
  275. struct rk_crypto_info *crypto_info;
  276. int err = 0;
  277. crypto_info = devm_kzalloc(&pdev->dev,
  278. sizeof(*crypto_info), GFP_KERNEL);
  279. if (!crypto_info) {
  280. err = -ENOMEM;
  281. goto err_crypto;
  282. }
  283. crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
  284. if (IS_ERR(crypto_info->rst)) {
  285. err = PTR_ERR(crypto_info->rst);
  286. goto err_crypto;
  287. }
  288. reset_control_assert(crypto_info->rst);
  289. usleep_range(10, 20);
  290. reset_control_deassert(crypto_info->rst);
  291. err = devm_add_action_or_reset(dev, rk_crypto_action, crypto_info);
  292. if (err)
  293. goto err_crypto;
  294. spin_lock_init(&crypto_info->lock);
  295. crypto_info->reg = devm_platform_ioremap_resource(pdev, 0);
  296. if (IS_ERR(crypto_info->reg)) {
  297. err = PTR_ERR(crypto_info->reg);
  298. goto err_crypto;
  299. }
  300. crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
  301. if (IS_ERR(crypto_info->aclk)) {
  302. err = PTR_ERR(crypto_info->aclk);
  303. goto err_crypto;
  304. }
  305. crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
  306. if (IS_ERR(crypto_info->hclk)) {
  307. err = PTR_ERR(crypto_info->hclk);
  308. goto err_crypto;
  309. }
  310. crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
  311. if (IS_ERR(crypto_info->sclk)) {
  312. err = PTR_ERR(crypto_info->sclk);
  313. goto err_crypto;
  314. }
  315. crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
  316. if (IS_ERR(crypto_info->dmaclk)) {
  317. err = PTR_ERR(crypto_info->dmaclk);
  318. goto err_crypto;
  319. }
  320. crypto_info->irq = platform_get_irq(pdev, 0);
  321. if (crypto_info->irq < 0) {
  322. dev_warn(crypto_info->dev,
  323. "control Interrupt is not available.\n");
  324. err = crypto_info->irq;
  325. goto err_crypto;
  326. }
  327. err = devm_request_irq(&pdev->dev, crypto_info->irq,
  328. rk_crypto_irq_handle, IRQF_SHARED,
  329. "rk-crypto", pdev);
  330. if (err) {
  331. dev_err(crypto_info->dev, "irq request failed.\n");
  332. goto err_crypto;
  333. }
  334. crypto_info->dev = &pdev->dev;
  335. platform_set_drvdata(pdev, crypto_info);
  336. tasklet_init(&crypto_info->queue_task,
  337. rk_crypto_queue_task_cb, (unsigned long)crypto_info);
  338. tasklet_init(&crypto_info->done_task,
  339. rk_crypto_done_task_cb, (unsigned long)crypto_info);
  340. crypto_init_queue(&crypto_info->queue, 50);
  341. crypto_info->enable_clk = rk_crypto_enable_clk;
  342. crypto_info->disable_clk = rk_crypto_disable_clk;
  343. crypto_info->load_data = rk_load_data;
  344. crypto_info->unload_data = rk_unload_data;
  345. crypto_info->enqueue = rk_crypto_enqueue;
  346. crypto_info->busy = false;
  347. err = rk_crypto_register(crypto_info);
  348. if (err) {
  349. dev_err(dev, "err in register alg");
  350. goto err_register_alg;
  351. }
  352. dev_info(dev, "Crypto Accelerator successfully registered\n");
  353. return 0;
  354. err_register_alg:
  355. tasklet_kill(&crypto_info->queue_task);
  356. tasklet_kill(&crypto_info->done_task);
  357. err_crypto:
  358. return err;
  359. }
  360. static int rk_crypto_remove(struct platform_device *pdev)
  361. {
  362. struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
  363. rk_crypto_unregister();
  364. tasklet_kill(&crypto_tmp->done_task);
  365. tasklet_kill(&crypto_tmp->queue_task);
  366. return 0;
  367. }
  368. static struct platform_driver crypto_driver = {
  369. .probe = rk_crypto_probe,
  370. .remove = rk_crypto_remove,
  371. .driver = {
  372. .name = "rk3288-crypto",
  373. .of_match_table = crypto_of_id_table,
  374. },
  375. };
  376. module_platform_driver(crypto_driver);
  377. MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
  378. MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
  379. MODULE_LICENSE("GPL");