Kconfig 27 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. menuconfig CRYPTO_HW
  3. bool "Hardware crypto devices"
  4. default y
  5. help
  6. Say Y here to get to see options for hardware crypto devices and
  7. processors. This option alone does not add any kernel code.
  8. If you say N, all options in this submenu will be skipped and disabled.
  9. if CRYPTO_HW
  10. source "drivers/crypto/allwinner/Kconfig"
  11. config CRYPTO_DEV_PADLOCK
  12. tristate "Support for VIA PadLock ACE"
  13. depends on X86 && !UML
  14. help
  15. Some VIA processors come with an integrated crypto engine
  16. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  17. that provides instructions for very fast cryptographic
  18. operations with supported algorithms.
  19. The instructions are used only when the CPU supports them.
  20. Otherwise software encryption is used.
  21. config CRYPTO_DEV_PADLOCK_AES
  22. tristate "PadLock driver for AES algorithm"
  23. depends on CRYPTO_DEV_PADLOCK
  24. select CRYPTO_SKCIPHER
  25. select CRYPTO_LIB_AES
  26. help
  27. Use VIA PadLock for AES algorithm.
  28. Available in VIA C3 and newer CPUs.
  29. If unsure say M. The compiled module will be
  30. called padlock-aes.
  31. config CRYPTO_DEV_PADLOCK_SHA
  32. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  33. depends on CRYPTO_DEV_PADLOCK
  34. select CRYPTO_HASH
  35. select CRYPTO_SHA1
  36. select CRYPTO_SHA256
  37. help
  38. Use VIA PadLock for SHA1/SHA256 algorithms.
  39. Available in VIA C7 and newer processors.
  40. If unsure say M. The compiled module will be
  41. called padlock-sha.
  42. config CRYPTO_DEV_GEODE
  43. tristate "Support for the Geode LX AES engine"
  44. depends on X86_32 && PCI
  45. select CRYPTO_ALGAPI
  46. select CRYPTO_SKCIPHER
  47. help
  48. Say 'Y' here to use the AMD Geode LX processor on-board AES
  49. engine for the CryptoAPI AES algorithm.
  50. To compile this driver as a module, choose M here: the module
  51. will be called geode-aes.
  52. config ZCRYPT
  53. tristate "Support for s390 cryptographic adapters"
  54. depends on S390
  55. select HW_RANDOM
  56. help
  57. Select this option if you want to enable support for
  58. s390 cryptographic adapters like:
  59. + Crypto Express 2 up to 7 Coprocessor (CEXxC)
  60. + Crypto Express 2 up to 7 Accelerator (CEXxA)
  61. + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
  62. config ZCRYPT_DEBUG
  63. bool "Enable debug features for s390 cryptographic adapters"
  64. default n
  65. depends on DEBUG_KERNEL
  66. depends on ZCRYPT
  67. help
  68. Say 'Y' here to enable some additional debug features on the
  69. s390 cryptographic adapters driver.
  70. There will be some more sysfs attributes displayed for ap cards
  71. and queues and some flags on crypto requests are interpreted as
  72. debugging messages to force error injection.
  73. Do not enable on production level kernel build.
  74. If unsure, say N.
  75. config ZCRYPT_MULTIDEVNODES
  76. bool "Support for multiple zcrypt device nodes"
  77. default y
  78. depends on S390
  79. depends on ZCRYPT
  80. help
  81. With this option enabled the zcrypt device driver can
  82. provide multiple devices nodes in /dev. Each device
  83. node can get customized to limit access and narrow
  84. down the use of the available crypto hardware.
  85. config PKEY
  86. tristate "Kernel API for protected key handling"
  87. depends on S390
  88. depends on ZCRYPT
  89. help
  90. With this option enabled the pkey kernel module provides an API
  91. for creation and handling of protected keys. Other parts of the
  92. kernel or userspace applications may use these functions.
  93. Select this option if you want to enable the kernel and userspace
  94. API for proteced key handling.
  95. Please note that creation of protected keys from secure keys
  96. requires to have at least one CEX card in coprocessor mode
  97. available at runtime.
  98. config CRYPTO_PAES_S390
  99. tristate "PAES cipher algorithms"
  100. depends on S390
  101. depends on ZCRYPT
  102. depends on PKEY
  103. select CRYPTO_ALGAPI
  104. select CRYPTO_SKCIPHER
  105. help
  106. This is the s390 hardware accelerated implementation of the
  107. AES cipher algorithms for use with protected key.
  108. Select this option if you want to use the paes cipher
  109. for example to use protected key encrypted devices.
  110. config CRYPTO_SHA1_S390
  111. tristate "SHA1 digest algorithm"
  112. depends on S390
  113. select CRYPTO_HASH
  114. help
  115. This is the s390 hardware accelerated implementation of the
  116. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  117. It is available as of z990.
  118. config CRYPTO_SHA256_S390
  119. tristate "SHA256 digest algorithm"
  120. depends on S390
  121. select CRYPTO_HASH
  122. help
  123. This is the s390 hardware accelerated implementation of the
  124. SHA256 secure hash standard (DFIPS 180-2).
  125. It is available as of z9.
  126. config CRYPTO_SHA512_S390
  127. tristate "SHA384 and SHA512 digest algorithm"
  128. depends on S390
  129. select CRYPTO_HASH
  130. help
  131. This is the s390 hardware accelerated implementation of the
  132. SHA512 secure hash standard.
  133. It is available as of z10.
  134. config CRYPTO_SHA3_256_S390
  135. tristate "SHA3_224 and SHA3_256 digest algorithm"
  136. depends on S390
  137. select CRYPTO_HASH
  138. help
  139. This is the s390 hardware accelerated implementation of the
  140. SHA3_256 secure hash standard.
  141. It is available as of z14.
  142. config CRYPTO_SHA3_512_S390
  143. tristate "SHA3_384 and SHA3_512 digest algorithm"
  144. depends on S390
  145. select CRYPTO_HASH
  146. help
  147. This is the s390 hardware accelerated implementation of the
  148. SHA3_512 secure hash standard.
  149. It is available as of z14.
  150. config CRYPTO_DES_S390
  151. tristate "DES and Triple DES cipher algorithms"
  152. depends on S390
  153. select CRYPTO_ALGAPI
  154. select CRYPTO_SKCIPHER
  155. select CRYPTO_LIB_DES
  156. help
  157. This is the s390 hardware accelerated implementation of the
  158. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  159. As of z990 the ECB and CBC mode are hardware accelerated.
  160. As of z196 the CTR mode is hardware accelerated.
  161. config CRYPTO_AES_S390
  162. tristate "AES cipher algorithms"
  163. depends on S390
  164. select CRYPTO_ALGAPI
  165. select CRYPTO_SKCIPHER
  166. help
  167. This is the s390 hardware accelerated implementation of the
  168. AES cipher algorithms (FIPS-197).
  169. As of z9 the ECB and CBC modes are hardware accelerated
  170. for 128 bit keys.
  171. As of z10 the ECB and CBC modes are hardware accelerated
  172. for all AES key sizes.
  173. As of z196 the CTR mode is hardware accelerated for all AES
  174. key sizes and XTS mode is hardware accelerated for 256 and
  175. 512 bit keys.
  176. config S390_PRNG
  177. tristate "Pseudo random number generator device driver"
  178. depends on S390
  179. default "m"
  180. help
  181. Select this option if you want to use the s390 pseudo random number
  182. generator. The PRNG is part of the cryptographic processor functions
  183. and uses triple-DES to generate secure random numbers like the
  184. ANSI X9.17 standard. User-space programs access the
  185. pseudo-random-number device through the char device /dev/prandom.
  186. It is available as of z9.
  187. config CRYPTO_GHASH_S390
  188. tristate "GHASH hash function"
  189. depends on S390
  190. select CRYPTO_HASH
  191. help
  192. This is the s390 hardware accelerated implementation of GHASH,
  193. the hash function used in GCM (Galois/Counter mode).
  194. It is available as of z196.
  195. config CRYPTO_CRC32_S390
  196. tristate "CRC-32 algorithms"
  197. depends on S390
  198. select CRYPTO_HASH
  199. select CRC32
  200. help
  201. Select this option if you want to use hardware accelerated
  202. implementations of CRC algorithms. With this option, you
  203. can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
  204. and CRC-32C (Castagnoli).
  205. It is available with IBM z13 or later.
  206. config CRYPTO_DEV_NIAGARA2
  207. tristate "Niagara2 Stream Processing Unit driver"
  208. select CRYPTO_LIB_DES
  209. select CRYPTO_SKCIPHER
  210. select CRYPTO_HASH
  211. select CRYPTO_MD5
  212. select CRYPTO_SHA1
  213. select CRYPTO_SHA256
  214. depends on SPARC64
  215. help
  216. Each core of a Niagara2 processor contains a Stream
  217. Processing Unit, which itself contains several cryptographic
  218. sub-units. One set provides the Modular Arithmetic Unit,
  219. used for SSL offload. The other set provides the Cipher
  220. Group, which can perform encryption, decryption, hashing,
  221. checksumming, and raw copies.
  222. config CRYPTO_DEV_HIFN_795X
  223. tristate "Driver HIFN 795x crypto accelerator chips"
  224. select CRYPTO_LIB_DES
  225. select CRYPTO_SKCIPHER
  226. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  227. depends on PCI
  228. depends on !ARCH_DMA_ADDR_T_64BIT
  229. help
  230. This option allows you to have support for HIFN 795x crypto adapters.
  231. config CRYPTO_DEV_HIFN_795X_RNG
  232. bool "HIFN 795x random number generator"
  233. depends on CRYPTO_DEV_HIFN_795X
  234. help
  235. Select this option if you want to enable the random number generator
  236. on the HIFN 795x crypto adapters.
  237. source "drivers/crypto/caam/Kconfig"
  238. config CRYPTO_DEV_TALITOS
  239. tristate "Talitos Freescale Security Engine (SEC)"
  240. select CRYPTO_AEAD
  241. select CRYPTO_AUTHENC
  242. select CRYPTO_SKCIPHER
  243. select CRYPTO_HASH
  244. select CRYPTO_LIB_DES
  245. select HW_RANDOM
  246. depends on FSL_SOC
  247. help
  248. Say 'Y' here to use the Freescale Security Engine (SEC)
  249. to offload cryptographic algorithm computation.
  250. The Freescale SEC is present on PowerQUICC 'E' processors, such
  251. as the MPC8349E and MPC8548E.
  252. To compile this driver as a module, choose M here: the module
  253. will be called talitos.
  254. config CRYPTO_DEV_TALITOS1
  255. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  256. depends on CRYPTO_DEV_TALITOS
  257. depends on PPC_8xx || PPC_82xx
  258. default y
  259. help
  260. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  261. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  262. version 1.2 found on MPC8xx
  263. config CRYPTO_DEV_TALITOS2
  264. bool "SEC2+ (SEC version 2.0 or upper)"
  265. depends on CRYPTO_DEV_TALITOS
  266. default y if !PPC_8xx
  267. help
  268. Say 'Y' here to use the Freescale Security Engine (SEC)
  269. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  270. config CRYPTO_DEV_IXP4XX
  271. tristate "Driver for IXP4xx crypto hardware acceleration"
  272. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  273. select CRYPTO_LIB_DES
  274. select CRYPTO_AEAD
  275. select CRYPTO_AUTHENC
  276. select CRYPTO_SKCIPHER
  277. help
  278. Driver for the IXP4xx NPE crypto engine.
  279. config CRYPTO_DEV_PPC4XX
  280. tristate "Driver AMCC PPC4xx crypto accelerator"
  281. depends on PPC && 4xx
  282. select CRYPTO_HASH
  283. select CRYPTO_AEAD
  284. select CRYPTO_AES
  285. select CRYPTO_LIB_AES
  286. select CRYPTO_CCM
  287. select CRYPTO_CTR
  288. select CRYPTO_GCM
  289. select CRYPTO_SKCIPHER
  290. help
  291. This option allows you to have support for AMCC crypto acceleration.
  292. config HW_RANDOM_PPC4XX
  293. bool "PowerPC 4xx generic true random number generator support"
  294. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
  295. default y
  296. help
  297. This option provides the kernel-side support for the TRNG hardware
  298. found in the security function of some PowerPC 4xx SoCs.
  299. config CRYPTO_DEV_OMAP
  300. tristate "Support for OMAP crypto HW accelerators"
  301. depends on ARCH_OMAP2PLUS
  302. help
  303. OMAP processors have various crypto HW accelerators. Select this if
  304. you want to use the OMAP modules for any of the crypto algorithms.
  305. if CRYPTO_DEV_OMAP
  306. config CRYPTO_DEV_OMAP_SHAM
  307. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  308. depends on ARCH_OMAP2PLUS
  309. select CRYPTO_ENGINE
  310. select CRYPTO_SHA1
  311. select CRYPTO_MD5
  312. select CRYPTO_SHA256
  313. select CRYPTO_SHA512
  314. select CRYPTO_HMAC
  315. help
  316. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  317. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  318. config CRYPTO_DEV_OMAP_AES
  319. tristate "Support for OMAP AES hw engine"
  320. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  321. select CRYPTO_AES
  322. select CRYPTO_SKCIPHER
  323. select CRYPTO_ENGINE
  324. select CRYPTO_CBC
  325. select CRYPTO_ECB
  326. select CRYPTO_CTR
  327. select CRYPTO_AEAD
  328. help
  329. OMAP processors have AES module accelerator. Select this if you
  330. want to use the OMAP module for AES algorithms.
  331. config CRYPTO_DEV_OMAP_DES
  332. tristate "Support for OMAP DES/3DES hw engine"
  333. depends on ARCH_OMAP2PLUS
  334. select CRYPTO_LIB_DES
  335. select CRYPTO_SKCIPHER
  336. select CRYPTO_ENGINE
  337. help
  338. OMAP processors have DES/3DES module accelerator. Select this if you
  339. want to use the OMAP module for DES and 3DES algorithms. Currently
  340. the ECB and CBC modes of operation are supported by the driver. Also
  341. accesses made on unaligned boundaries are supported.
  342. endif # CRYPTO_DEV_OMAP
  343. config CRYPTO_DEV_PICOXCELL
  344. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  345. depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
  346. select CRYPTO_AEAD
  347. select CRYPTO_AES
  348. select CRYPTO_AUTHENC
  349. select CRYPTO_SKCIPHER
  350. select CRYPTO_LIB_DES
  351. select CRYPTO_CBC
  352. select CRYPTO_ECB
  353. select CRYPTO_SEQIV
  354. help
  355. This option enables support for the hardware offload engines in the
  356. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  357. and for 3gpp Layer 2 ciphering support.
  358. Saying m here will build a module named picoxcell_crypto.
  359. config CRYPTO_DEV_SAHARA
  360. tristate "Support for SAHARA crypto accelerator"
  361. depends on ARCH_MXC && OF
  362. select CRYPTO_SKCIPHER
  363. select CRYPTO_AES
  364. select CRYPTO_ECB
  365. help
  366. This option enables support for the SAHARA HW crypto accelerator
  367. found in some Freescale i.MX chips.
  368. config CRYPTO_DEV_EXYNOS_RNG
  369. tristate "Exynos HW pseudo random number generator support"
  370. depends on ARCH_EXYNOS || COMPILE_TEST
  371. depends on HAS_IOMEM
  372. select CRYPTO_RNG
  373. help
  374. This driver provides kernel-side support through the
  375. cryptographic API for the pseudo random number generator hardware
  376. found on Exynos SoCs.
  377. To compile this driver as a module, choose M here: the
  378. module will be called exynos-rng.
  379. If unsure, say Y.
  380. config CRYPTO_DEV_S5P
  381. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  382. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  383. depends on HAS_IOMEM
  384. select CRYPTO_AES
  385. select CRYPTO_SKCIPHER
  386. help
  387. This option allows you to have support for S5P crypto acceleration.
  388. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  389. algorithms execution.
  390. config CRYPTO_DEV_EXYNOS_HASH
  391. bool "Support for Samsung Exynos HASH accelerator"
  392. depends on CRYPTO_DEV_S5P
  393. depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
  394. select CRYPTO_SHA1
  395. select CRYPTO_MD5
  396. select CRYPTO_SHA256
  397. help
  398. Select this to offload Exynos from HASH MD5/SHA1/SHA256.
  399. This will select software SHA1, MD5 and SHA256 as they are
  400. needed for small and zero-size messages.
  401. HASH algorithms will be disabled if EXYNOS_RNG
  402. is enabled due to hw conflict.
  403. config CRYPTO_DEV_NX
  404. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  405. depends on PPC64
  406. help
  407. This enables support for the NX hardware cryptographic accelerator
  408. coprocessor that is in IBM PowerPC P7+ or later processors. This
  409. does not actually enable any drivers, it only allows you to select
  410. which acceleration type (encryption and/or compression) to enable.
  411. if CRYPTO_DEV_NX
  412. source "drivers/crypto/nx/Kconfig"
  413. endif
  414. config CRYPTO_DEV_UX500
  415. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  416. depends on ARCH_U8500
  417. help
  418. Driver for ST-Ericsson UX500 crypto engine.
  419. if CRYPTO_DEV_UX500
  420. source "drivers/crypto/ux500/Kconfig"
  421. endif # if CRYPTO_DEV_UX500
  422. config CRYPTO_DEV_ATMEL_AUTHENC
  423. bool "Support for Atmel IPSEC/SSL hw accelerator"
  424. depends on ARCH_AT91 || COMPILE_TEST
  425. depends on CRYPTO_DEV_ATMEL_AES
  426. help
  427. Some Atmel processors can combine the AES and SHA hw accelerators
  428. to enhance support of IPSEC/SSL.
  429. Select this if you want to use the Atmel modules for
  430. authenc(hmac(shaX),Y(cbc)) algorithms.
  431. config CRYPTO_DEV_ATMEL_AES
  432. tristate "Support for Atmel AES hw accelerator"
  433. depends on ARCH_AT91 || COMPILE_TEST
  434. select CRYPTO_AES
  435. select CRYPTO_AEAD
  436. select CRYPTO_SKCIPHER
  437. select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
  438. select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
  439. help
  440. Some Atmel processors have AES hw accelerator.
  441. Select this if you want to use the Atmel module for
  442. AES algorithms.
  443. To compile this driver as a module, choose M here: the module
  444. will be called atmel-aes.
  445. config CRYPTO_DEV_ATMEL_TDES
  446. tristate "Support for Atmel DES/TDES hw accelerator"
  447. depends on ARCH_AT91 || COMPILE_TEST
  448. select CRYPTO_LIB_DES
  449. select CRYPTO_SKCIPHER
  450. help
  451. Some Atmel processors have DES/TDES hw accelerator.
  452. Select this if you want to use the Atmel module for
  453. DES/TDES algorithms.
  454. To compile this driver as a module, choose M here: the module
  455. will be called atmel-tdes.
  456. config CRYPTO_DEV_ATMEL_SHA
  457. tristate "Support for Atmel SHA hw accelerator"
  458. depends on ARCH_AT91 || COMPILE_TEST
  459. select CRYPTO_HASH
  460. help
  461. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  462. hw accelerator.
  463. Select this if you want to use the Atmel module for
  464. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  465. To compile this driver as a module, choose M here: the module
  466. will be called atmel-sha.
  467. config CRYPTO_DEV_ATMEL_I2C
  468. tristate
  469. select BITREVERSE
  470. config CRYPTO_DEV_ATMEL_ECC
  471. tristate "Support for Microchip / Atmel ECC hw accelerator"
  472. depends on I2C
  473. select CRYPTO_DEV_ATMEL_I2C
  474. select CRYPTO_ECDH
  475. select CRC16
  476. help
  477. Microhip / Atmel ECC hw accelerator.
  478. Select this if you want to use the Microchip / Atmel module for
  479. ECDH algorithm.
  480. To compile this driver as a module, choose M here: the module
  481. will be called atmel-ecc.
  482. config CRYPTO_DEV_ATMEL_SHA204A
  483. tristate "Support for Microchip / Atmel SHA accelerator and RNG"
  484. depends on I2C
  485. select CRYPTO_DEV_ATMEL_I2C
  486. select HW_RANDOM
  487. select CRC16
  488. help
  489. Microhip / Atmel SHA accelerator and RNG.
  490. Select this if you want to use the Microchip / Atmel SHA204A
  491. module as a random number generator. (Other functions of the
  492. chip are currently not exposed by this driver)
  493. To compile this driver as a module, choose M here: the module
  494. will be called atmel-sha204a.
  495. config CRYPTO_DEV_CCP
  496. bool "Support for AMD Secure Processor"
  497. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  498. help
  499. The AMD Secure Processor provides support for the Cryptographic Coprocessor
  500. (CCP) and the Platform Security Processor (PSP) devices.
  501. if CRYPTO_DEV_CCP
  502. source "drivers/crypto/ccp/Kconfig"
  503. endif
  504. config CRYPTO_DEV_MXS_DCP
  505. tristate "Support for Freescale MXS DCP"
  506. depends on (ARCH_MXS || ARCH_MXC)
  507. select STMP_DEVICE
  508. select CRYPTO_CBC
  509. select CRYPTO_ECB
  510. select CRYPTO_AES
  511. select CRYPTO_SKCIPHER
  512. select CRYPTO_HASH
  513. help
  514. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  515. co-processor on the die.
  516. To compile this driver as a module, choose M here: the module
  517. will be called mxs-dcp.
  518. source "drivers/crypto/qat/Kconfig"
  519. source "drivers/crypto/cavium/cpt/Kconfig"
  520. source "drivers/crypto/cavium/nitrox/Kconfig"
  521. source "drivers/crypto/marvell/Kconfig"
  522. config CRYPTO_DEV_CAVIUM_ZIP
  523. tristate "Cavium ZIP driver"
  524. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  525. help
  526. Select this option if you want to enable compression/decompression
  527. acceleration on Cavium's ARM based SoCs
  528. config CRYPTO_DEV_QCE
  529. tristate "Qualcomm crypto engine accelerator"
  530. depends on ARCH_QCOM || COMPILE_TEST
  531. depends on HAS_IOMEM
  532. help
  533. This driver supports Qualcomm crypto engine accelerator
  534. hardware. To compile this driver as a module, choose M here. The
  535. module will be called qcrypto.
  536. config CRYPTO_DEV_QCE_SKCIPHER
  537. bool
  538. depends on CRYPTO_DEV_QCE
  539. select CRYPTO_AES
  540. select CRYPTO_LIB_DES
  541. select CRYPTO_ECB
  542. select CRYPTO_CBC
  543. select CRYPTO_XTS
  544. select CRYPTO_CTR
  545. select CRYPTO_SKCIPHER
  546. config CRYPTO_DEV_QCE_SHA
  547. bool
  548. depends on CRYPTO_DEV_QCE
  549. select CRYPTO_SHA1
  550. select CRYPTO_SHA256
  551. choice
  552. prompt "Algorithms enabled for QCE acceleration"
  553. default CRYPTO_DEV_QCE_ENABLE_ALL
  554. depends on CRYPTO_DEV_QCE
  555. help
  556. This option allows to choose whether to build support for all algorihtms
  557. (default), hashes-only, or skciphers-only.
  558. The QCE engine does not appear to scale as well as the CPU to handle
  559. multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
  560. QCE handles only 2 requests in parallel.
  561. Ipsec throughput seems to improve when disabling either family of
  562. algorithms, sharing the load with the CPU. Enabling skciphers-only
  563. appears to work best.
  564. config CRYPTO_DEV_QCE_ENABLE_ALL
  565. bool "All supported algorithms"
  566. select CRYPTO_DEV_QCE_SKCIPHER
  567. select CRYPTO_DEV_QCE_SHA
  568. help
  569. Enable all supported algorithms:
  570. - AES (CBC, CTR, ECB, XTS)
  571. - 3DES (CBC, ECB)
  572. - DES (CBC, ECB)
  573. - SHA1, HMAC-SHA1
  574. - SHA256, HMAC-SHA256
  575. config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
  576. bool "Symmetric-key ciphers only"
  577. select CRYPTO_DEV_QCE_SKCIPHER
  578. help
  579. Enable symmetric-key ciphers only:
  580. - AES (CBC, CTR, ECB, XTS)
  581. - 3DES (ECB, CBC)
  582. - DES (ECB, CBC)
  583. config CRYPTO_DEV_QCE_ENABLE_SHA
  584. bool "Hash/HMAC only"
  585. select CRYPTO_DEV_QCE_SHA
  586. help
  587. Enable hashes/HMAC algorithms only:
  588. - SHA1, HMAC-SHA1
  589. - SHA256, HMAC-SHA256
  590. endchoice
  591. config CRYPTO_DEV_QCE_SW_MAX_LEN
  592. int "Default maximum request size to use software for AES"
  593. depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
  594. default 512
  595. help
  596. This sets the default maximum request size to perform AES requests
  597. using software instead of the crypto engine. It can be changed by
  598. setting the aes_sw_max_len parameter.
  599. Small blocks are processed faster in software than hardware.
  600. Considering the 256-bit ciphers, software is 2-3 times faster than
  601. qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
  602. With 128-bit keys, the break-even point would be around 1024-bytes.
  603. The default is set a little lower, to 512 bytes, to balance the
  604. cost in CPU usage. The minimum recommended setting is 16-bytes
  605. (1 AES block), since AES-GCM will fail if you set it lower.
  606. Setting this to zero will send all requests to the hardware.
  607. Note that 192-bit keys are not supported by the hardware and are
  608. always processed by the software fallback, and all DES requests
  609. are done by the hardware.
  610. config CRYPTO_DEV_QCOM_RNG
  611. tristate "Qualcomm Random Number Generator Driver"
  612. depends on ARCH_QCOM || COMPILE_TEST
  613. select CRYPTO_RNG
  614. help
  615. This driver provides support for the Random Number
  616. Generator hardware found on Qualcomm SoCs.
  617. To compile this driver as a module, choose M here. The
  618. module will be called qcom-rng. If unsure, say N.
  619. config CRYPTO_DEV_VMX
  620. bool "Support for VMX cryptographic acceleration instructions"
  621. depends on PPC64 && VSX
  622. help
  623. Support for VMX cryptographic acceleration instructions.
  624. source "drivers/crypto/vmx/Kconfig"
  625. config CRYPTO_DEV_IMGTEC_HASH
  626. tristate "Imagination Technologies hardware hash accelerator"
  627. depends on MIPS || COMPILE_TEST
  628. select CRYPTO_MD5
  629. select CRYPTO_SHA1
  630. select CRYPTO_SHA256
  631. select CRYPTO_HASH
  632. help
  633. This driver interfaces with the Imagination Technologies
  634. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  635. hashing algorithms.
  636. config CRYPTO_DEV_ROCKCHIP
  637. tristate "Rockchip's Cryptographic Engine driver"
  638. depends on OF && ARCH_ROCKCHIP
  639. select CRYPTO_AES
  640. select CRYPTO_LIB_DES
  641. select CRYPTO_MD5
  642. select CRYPTO_SHA1
  643. select CRYPTO_SHA256
  644. select CRYPTO_HASH
  645. select CRYPTO_SKCIPHER
  646. help
  647. This driver interfaces with the hardware crypto accelerator.
  648. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  649. config CRYPTO_DEV_ZYNQMP_AES
  650. tristate "Support for Xilinx ZynqMP AES hw accelerator"
  651. depends on ZYNQMP_FIRMWARE || COMPILE_TEST
  652. select CRYPTO_AES
  653. select CRYPTO_ENGINE
  654. select CRYPTO_AEAD
  655. help
  656. Xilinx ZynqMP has AES-GCM engine used for symmetric key
  657. encryption and decryption. This driver interfaces with AES hw
  658. accelerator. Select this if you want to use the ZynqMP module
  659. for AES algorithms.
  660. config CRYPTO_DEV_MEDIATEK
  661. tristate "MediaTek's EIP97 Cryptographic Engine driver"
  662. depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
  663. select CRYPTO_LIB_AES
  664. select CRYPTO_AEAD
  665. select CRYPTO_SKCIPHER
  666. select CRYPTO_SHA1
  667. select CRYPTO_SHA256
  668. select CRYPTO_SHA512
  669. select CRYPTO_HMAC
  670. help
  671. This driver allows you to utilize the hardware crypto accelerator
  672. EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
  673. Select this if you want to use it for AES/SHA1/SHA2 algorithms.
  674. source "drivers/crypto/chelsio/Kconfig"
  675. source "drivers/crypto/virtio/Kconfig"
  676. config CRYPTO_DEV_BCM_SPU
  677. tristate "Broadcom symmetric crypto/hash acceleration support"
  678. depends on ARCH_BCM_IPROC
  679. depends on MAILBOX
  680. default m
  681. select CRYPTO_AUTHENC
  682. select CRYPTO_LIB_DES
  683. select CRYPTO_MD5
  684. select CRYPTO_SHA1
  685. select CRYPTO_SHA256
  686. select CRYPTO_SHA512
  687. help
  688. This driver provides support for Broadcom crypto acceleration using the
  689. Secure Processing Unit (SPU). The SPU driver registers skcipher,
  690. ahash, and aead algorithms with the kernel cryptographic API.
  691. source "drivers/crypto/stm32/Kconfig"
  692. config CRYPTO_DEV_SAFEXCEL
  693. tristate "Inside Secure's SafeXcel cryptographic engine driver"
  694. depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
  695. select CRYPTO_LIB_AES
  696. select CRYPTO_AUTHENC
  697. select CRYPTO_SKCIPHER
  698. select CRYPTO_LIB_DES
  699. select CRYPTO_HASH
  700. select CRYPTO_HMAC
  701. select CRYPTO_MD5
  702. select CRYPTO_SHA1
  703. select CRYPTO_SHA256
  704. select CRYPTO_SHA512
  705. select CRYPTO_CHACHA20POLY1305
  706. select CRYPTO_SHA3
  707. help
  708. This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
  709. engines designed by Inside Secure. It currently accelerates DES, 3DES and
  710. AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
  711. SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
  712. Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
  713. config CRYPTO_DEV_ARTPEC6
  714. tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
  715. depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
  716. depends on OF
  717. select CRYPTO_AEAD
  718. select CRYPTO_AES
  719. select CRYPTO_ALGAPI
  720. select CRYPTO_SKCIPHER
  721. select CRYPTO_CTR
  722. select CRYPTO_HASH
  723. select CRYPTO_SHA1
  724. select CRYPTO_SHA256
  725. select CRYPTO_SHA512
  726. help
  727. Enables the driver for the on-chip crypto accelerator
  728. of Axis ARTPEC SoCs.
  729. To compile this driver as a module, choose M here.
  730. config CRYPTO_DEV_CCREE
  731. tristate "Support for ARM TrustZone CryptoCell family of security processors"
  732. depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
  733. default n
  734. select CRYPTO_HASH
  735. select CRYPTO_SKCIPHER
  736. select CRYPTO_LIB_DES
  737. select CRYPTO_AEAD
  738. select CRYPTO_AUTHENC
  739. select CRYPTO_SHA1
  740. select CRYPTO_MD5
  741. select CRYPTO_SHA256
  742. select CRYPTO_SHA512
  743. select CRYPTO_HMAC
  744. select CRYPTO_AES
  745. select CRYPTO_CBC
  746. select CRYPTO_ECB
  747. select CRYPTO_CTR
  748. select CRYPTO_XTS
  749. select CRYPTO_SM4
  750. select CRYPTO_SM3
  751. help
  752. Say 'Y' to enable a driver for the REE interface of the Arm
  753. TrustZone CryptoCell family of processors. Currently the
  754. CryptoCell 713, 703, 712, 710 and 630 are supported.
  755. Choose this if you wish to use hardware acceleration of
  756. cryptographic operations on the system REE.
  757. If unsure say Y.
  758. source "drivers/crypto/hisilicon/Kconfig"
  759. source "drivers/crypto/amlogic/Kconfig"
  760. config CRYPTO_DEV_SA2UL
  761. tristate "Support for TI security accelerator"
  762. depends on ARCH_K3 || COMPILE_TEST
  763. select ARM64_CRYPTO
  764. select CRYPTO_AES
  765. select CRYPTO_AES_ARM64
  766. select CRYPTO_ALGAPI
  767. select CRYPTO_AUTHENC
  768. select CRYPTO_SHA1
  769. select CRYPTO_SHA256
  770. select CRYPTO_SHA512
  771. select HW_RANDOM
  772. select SG_SPLIT
  773. help
  774. K3 devices include a security accelerator engine that may be
  775. used for crypto offload. Select this if you want to use hardware
  776. acceleration for cryptographic algorithms on these devices.
  777. endif # CRYPTO_HW