speedstep-ich.c 9.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * (C) 2001 Dave Jones, Arjan van de ven.
  4. * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
  5. *
  6. * Based upon reverse engineered information, and on Intel documentation
  7. * for chipsets ICH2-M and ICH3-M.
  8. *
  9. * Many thanks to Ducrot Bruno for finding and fixing the last
  10. * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11. * for extensive testing.
  12. *
  13. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14. */
  15. /*********************************************************************
  16. * SPEEDSTEP - DEFINITIONS *
  17. *********************************************************************/
  18. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/pci.h>
  24. #include <linux/sched.h>
  25. #include <asm/cpu_device_id.h>
  26. #include "speedstep-lib.h"
  27. /* speedstep_chipset:
  28. * It is necessary to know which chipset is used. As accesses to
  29. * this device occur at various places in this module, we need a
  30. * static struct pci_dev * pointing to that device.
  31. */
  32. static struct pci_dev *speedstep_chipset_dev;
  33. /* speedstep_processor
  34. */
  35. static enum speedstep_processor speedstep_processor;
  36. static u32 pmbase;
  37. /*
  38. * There are only two frequency states for each processor. Values
  39. * are in kHz for the time being.
  40. */
  41. static struct cpufreq_frequency_table speedstep_freqs[] = {
  42. {0, SPEEDSTEP_HIGH, 0},
  43. {0, SPEEDSTEP_LOW, 0},
  44. {0, 0, CPUFREQ_TABLE_END},
  45. };
  46. /**
  47. * speedstep_find_register - read the PMBASE address
  48. *
  49. * Returns: -ENODEV if no register could be found
  50. */
  51. static int speedstep_find_register(void)
  52. {
  53. if (!speedstep_chipset_dev)
  54. return -ENODEV;
  55. /* get PMBASE */
  56. pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  57. if (!(pmbase & 0x01)) {
  58. pr_err("could not find speedstep register\n");
  59. return -ENODEV;
  60. }
  61. pmbase &= 0xFFFFFFFE;
  62. if (!pmbase) {
  63. pr_err("could not find speedstep register\n");
  64. return -ENODEV;
  65. }
  66. pr_debug("pmbase is 0x%x\n", pmbase);
  67. return 0;
  68. }
  69. /**
  70. * speedstep_set_state - set the SpeedStep state
  71. * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  72. *
  73. * Tries to change the SpeedStep state. Can be called from
  74. * smp_call_function_single.
  75. */
  76. static void speedstep_set_state(unsigned int state)
  77. {
  78. u8 pm2_blk;
  79. u8 value;
  80. unsigned long flags;
  81. if (state > 0x1)
  82. return;
  83. /* Disable IRQs */
  84. local_irq_save(flags);
  85. /* read state */
  86. value = inb(pmbase + 0x50);
  87. pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  88. /* write new state */
  89. value &= 0xFE;
  90. value |= state;
  91. pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
  92. /* Disable bus master arbitration */
  93. pm2_blk = inb(pmbase + 0x20);
  94. pm2_blk |= 0x01;
  95. outb(pm2_blk, (pmbase + 0x20));
  96. /* Actual transition */
  97. outb(value, (pmbase + 0x50));
  98. /* Restore bus master arbitration */
  99. pm2_blk &= 0xfe;
  100. outb(pm2_blk, (pmbase + 0x20));
  101. /* check if transition was successful */
  102. value = inb(pmbase + 0x50);
  103. /* Enable IRQs */
  104. local_irq_restore(flags);
  105. pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  106. if (state == (value & 0x1))
  107. pr_debug("change to %u MHz succeeded\n",
  108. speedstep_get_frequency(speedstep_processor) / 1000);
  109. else
  110. pr_err("change failed - I/O error\n");
  111. return;
  112. }
  113. /* Wrapper for smp_call_function_single. */
  114. static void _speedstep_set_state(void *_state)
  115. {
  116. speedstep_set_state(*(unsigned int *)_state);
  117. }
  118. /**
  119. * speedstep_activate - activate SpeedStep control in the chipset
  120. *
  121. * Tries to activate the SpeedStep status and control registers.
  122. * Returns -EINVAL on an unsupported chipset, and zero on success.
  123. */
  124. static int speedstep_activate(void)
  125. {
  126. u16 value = 0;
  127. if (!speedstep_chipset_dev)
  128. return -EINVAL;
  129. pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
  130. if (!(value & 0x08)) {
  131. value |= 0x08;
  132. pr_debug("activating SpeedStep (TM) registers\n");
  133. pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
  134. }
  135. return 0;
  136. }
  137. /**
  138. * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
  139. *
  140. * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
  141. * the LPC bridge / PM module which contains all power-management
  142. * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
  143. * chipset, or zero on failure.
  144. */
  145. static unsigned int speedstep_detect_chipset(void)
  146. {
  147. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  148. PCI_DEVICE_ID_INTEL_82801DB_12,
  149. PCI_ANY_ID, PCI_ANY_ID,
  150. NULL);
  151. if (speedstep_chipset_dev)
  152. return 4; /* 4-M */
  153. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  154. PCI_DEVICE_ID_INTEL_82801CA_12,
  155. PCI_ANY_ID, PCI_ANY_ID,
  156. NULL);
  157. if (speedstep_chipset_dev)
  158. return 3; /* 3-M */
  159. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  160. PCI_DEVICE_ID_INTEL_82801BA_10,
  161. PCI_ANY_ID, PCI_ANY_ID,
  162. NULL);
  163. if (speedstep_chipset_dev) {
  164. /* speedstep.c causes lockups on Dell Inspirons 8000 and
  165. * 8100 which use a pretty old revision of the 82815
  166. * host bridge. Abort on these systems.
  167. */
  168. struct pci_dev *hostbridge;
  169. hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  170. PCI_DEVICE_ID_INTEL_82815_MC,
  171. PCI_ANY_ID, PCI_ANY_ID,
  172. NULL);
  173. if (!hostbridge)
  174. return 2; /* 2-M */
  175. if (hostbridge->revision < 5) {
  176. pr_debug("hostbridge does not support speedstep\n");
  177. speedstep_chipset_dev = NULL;
  178. pci_dev_put(hostbridge);
  179. return 0;
  180. }
  181. pci_dev_put(hostbridge);
  182. return 2; /* 2-M */
  183. }
  184. return 0;
  185. }
  186. static void get_freq_data(void *_speed)
  187. {
  188. unsigned int *speed = _speed;
  189. *speed = speedstep_get_frequency(speedstep_processor);
  190. }
  191. static unsigned int speedstep_get(unsigned int cpu)
  192. {
  193. unsigned int speed;
  194. /* You're supposed to ensure CPU is online. */
  195. BUG_ON(smp_call_function_single(cpu, get_freq_data, &speed, 1));
  196. pr_debug("detected %u kHz as current frequency\n", speed);
  197. return speed;
  198. }
  199. /**
  200. * speedstep_target - set a new CPUFreq policy
  201. * @policy: new policy
  202. * @index: index of target frequency
  203. *
  204. * Sets a new CPUFreq policy.
  205. */
  206. static int speedstep_target(struct cpufreq_policy *policy, unsigned int index)
  207. {
  208. unsigned int policy_cpu;
  209. policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
  210. smp_call_function_single(policy_cpu, _speedstep_set_state, &index,
  211. true);
  212. return 0;
  213. }
  214. struct get_freqs {
  215. struct cpufreq_policy *policy;
  216. int ret;
  217. };
  218. static void get_freqs_on_cpu(void *_get_freqs)
  219. {
  220. struct get_freqs *get_freqs = _get_freqs;
  221. get_freqs->ret =
  222. speedstep_get_freqs(speedstep_processor,
  223. &speedstep_freqs[SPEEDSTEP_LOW].frequency,
  224. &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
  225. &get_freqs->policy->cpuinfo.transition_latency,
  226. &speedstep_set_state);
  227. }
  228. static int speedstep_cpu_init(struct cpufreq_policy *policy)
  229. {
  230. unsigned int policy_cpu;
  231. struct get_freqs gf;
  232. /* only run on CPU to be set, or on its sibling */
  233. #ifdef CONFIG_SMP
  234. cpumask_copy(policy->cpus, topology_sibling_cpumask(policy->cpu));
  235. #endif
  236. policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
  237. /* detect low and high frequency and transition latency */
  238. gf.policy = policy;
  239. smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
  240. if (gf.ret)
  241. return gf.ret;
  242. policy->freq_table = speedstep_freqs;
  243. return 0;
  244. }
  245. static struct cpufreq_driver speedstep_driver = {
  246. .name = "speedstep-ich",
  247. .verify = cpufreq_generic_frequency_table_verify,
  248. .target_index = speedstep_target,
  249. .init = speedstep_cpu_init,
  250. .get = speedstep_get,
  251. .attr = cpufreq_generic_attr,
  252. };
  253. static const struct x86_cpu_id ss_smi_ids[] = {
  254. X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0x8, 0),
  255. X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0xb, 0),
  256. X86_MATCH_VENDOR_FAM_MODEL(INTEL, 15, 0x2, 0),
  257. {}
  258. };
  259. /**
  260. * speedstep_init - initializes the SpeedStep CPUFreq driver
  261. *
  262. * Initializes the SpeedStep support. Returns -ENODEV on unsupported
  263. * devices, -EINVAL on problems during initiatization, and zero on
  264. * success.
  265. */
  266. static int __init speedstep_init(void)
  267. {
  268. if (!x86_match_cpu(ss_smi_ids))
  269. return -ENODEV;
  270. /* detect processor */
  271. speedstep_processor = speedstep_detect_processor();
  272. if (!speedstep_processor) {
  273. pr_debug("Intel(R) SpeedStep(TM) capable processor "
  274. "not found\n");
  275. return -ENODEV;
  276. }
  277. /* detect chipset */
  278. if (!speedstep_detect_chipset()) {
  279. pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
  280. "(yet) available.\n");
  281. return -ENODEV;
  282. }
  283. /* activate speedstep support */
  284. if (speedstep_activate()) {
  285. pci_dev_put(speedstep_chipset_dev);
  286. return -EINVAL;
  287. }
  288. if (speedstep_find_register())
  289. return -ENODEV;
  290. return cpufreq_register_driver(&speedstep_driver);
  291. }
  292. /**
  293. * speedstep_exit - unregisters SpeedStep support
  294. *
  295. * Unregisters SpeedStep support.
  296. */
  297. static void __exit speedstep_exit(void)
  298. {
  299. pci_dev_put(speedstep_chipset_dev);
  300. cpufreq_unregister_driver(&speedstep_driver);
  301. }
  302. MODULE_AUTHOR("Dave Jones, Dominik Brodowski <linux@brodo.de>");
  303. MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
  304. "with ICH-M southbridges.");
  305. MODULE_LICENSE("GPL");
  306. module_init(speedstep_init);
  307. module_exit(speedstep_exit);