s3c2410-cpufreq.c 3.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2006-2008 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * S3C2410 CPU Frequency scaling
  8. */
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/ioport.h>
  13. #include <linux/cpufreq.h>
  14. #include <linux/device.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/soc/samsung/s3c-cpufreq-core.h>
  19. #include <linux/soc/samsung/s3c-pm.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach/map.h>
  22. #define S3C2410_CLKDIVN_PDIVN (1<<0)
  23. #define S3C2410_CLKDIVN_HDIVN (1<<1)
  24. /* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
  25. static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
  26. {
  27. u32 clkdiv = 0;
  28. if (cfg->divs.h_divisor == 2)
  29. clkdiv |= S3C2410_CLKDIVN_HDIVN;
  30. if (cfg->divs.p_divisor != cfg->divs.h_divisor)
  31. clkdiv |= S3C2410_CLKDIVN_PDIVN;
  32. s3c24xx_write_clkdivn(clkdiv);
  33. }
  34. static int s3c2410_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
  35. {
  36. unsigned long hclk, fclk, pclk;
  37. unsigned int hdiv, pdiv;
  38. unsigned long hclk_max;
  39. fclk = cfg->freq.fclk;
  40. hclk_max = cfg->max.hclk;
  41. cfg->freq.armclk = fclk;
  42. s3c_freq_dbg("%s: fclk is %lu, max hclk %lu\n",
  43. __func__, fclk, hclk_max);
  44. hdiv = (fclk > cfg->max.hclk) ? 2 : 1;
  45. hclk = fclk / hdiv;
  46. if (hclk > cfg->max.hclk) {
  47. s3c_freq_dbg("%s: hclk too big\n", __func__);
  48. return -EINVAL;
  49. }
  50. pdiv = (hclk > cfg->max.pclk) ? 2 : 1;
  51. pclk = hclk / pdiv;
  52. if (pclk > cfg->max.pclk) {
  53. s3c_freq_dbg("%s: pclk too big\n", __func__);
  54. return -EINVAL;
  55. }
  56. pdiv *= hdiv;
  57. /* record the result */
  58. cfg->divs.p_divisor = pdiv;
  59. cfg->divs.h_divisor = hdiv;
  60. return 0;
  61. }
  62. static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
  63. .max = {
  64. .fclk = 200000000,
  65. .hclk = 100000000,
  66. .pclk = 50000000,
  67. },
  68. /* transition latency is about 5ms worst-case, so
  69. * set 10ms to be sure */
  70. .latency = 10000000,
  71. .locktime_m = 150,
  72. .locktime_u = 150,
  73. .locktime_bits = 12,
  74. .need_pll = 1,
  75. .name = "s3c2410",
  76. .calc_iotiming = s3c2410_iotiming_calc,
  77. .set_iotiming = s3c2410_iotiming_set,
  78. .get_iotiming = s3c2410_iotiming_get,
  79. .set_fvco = s3c2410_set_fvco,
  80. .set_refresh = s3c2410_cpufreq_setrefresh,
  81. .set_divs = s3c2410_cpufreq_setdivs,
  82. .calc_divs = s3c2410_cpufreq_calcdivs,
  83. .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
  84. };
  85. static int s3c2410_cpufreq_add(struct device *dev,
  86. struct subsys_interface *sif)
  87. {
  88. return s3c_cpufreq_register(&s3c2410_cpufreq_info);
  89. }
  90. static struct subsys_interface s3c2410_cpufreq_interface = {
  91. .name = "s3c2410_cpufreq",
  92. .subsys = &s3c2410_subsys,
  93. .add_dev = s3c2410_cpufreq_add,
  94. };
  95. static int __init s3c2410_cpufreq_init(void)
  96. {
  97. return subsys_interface_register(&s3c2410_cpufreq_interface);
  98. }
  99. arch_initcall(s3c2410_cpufreq_init);
  100. static int s3c2410a_cpufreq_add(struct device *dev,
  101. struct subsys_interface *sif)
  102. {
  103. /* alter the maximum freq settings for S3C2410A. If a board knows
  104. * it only has a maximum of 200, then it should register its own
  105. * limits. */
  106. s3c2410_cpufreq_info.max.fclk = 266000000;
  107. s3c2410_cpufreq_info.max.hclk = 133000000;
  108. s3c2410_cpufreq_info.max.pclk = 66500000;
  109. s3c2410_cpufreq_info.name = "s3c2410a";
  110. return s3c2410_cpufreq_add(dev, sif);
  111. }
  112. static struct subsys_interface s3c2410a_cpufreq_interface = {
  113. .name = "s3c2410a_cpufreq",
  114. .subsys = &s3c2410a_subsys,
  115. .add_dev = s3c2410a_cpufreq_add,
  116. };
  117. static int __init s3c2410a_cpufreq_init(void)
  118. {
  119. return subsys_interface_register(&s3c2410a_cpufreq_interface);
  120. }
  121. arch_initcall(s3c2410a_cpufreq_init);