pxa3xx-cpufreq.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2008 Marvell International Ltd.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/sched.h>
  8. #include <linux/init.h>
  9. #include <linux/cpufreq.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <mach/generic.h>
  13. #include <mach/pxa3xx-regs.h>
  14. #define HSS_104M (0)
  15. #define HSS_156M (1)
  16. #define HSS_208M (2)
  17. #define HSS_312M (3)
  18. #define SMCFS_78M (0)
  19. #define SMCFS_104M (2)
  20. #define SMCFS_208M (5)
  21. #define SFLFS_104M (0)
  22. #define SFLFS_156M (1)
  23. #define SFLFS_208M (2)
  24. #define SFLFS_312M (3)
  25. #define XSPCLK_156M (0)
  26. #define XSPCLK_NONE (3)
  27. #define DMCFS_26M (0)
  28. #define DMCFS_260M (3)
  29. struct pxa3xx_freq_info {
  30. unsigned int cpufreq_mhz;
  31. unsigned int core_xl : 5;
  32. unsigned int core_xn : 3;
  33. unsigned int hss : 2;
  34. unsigned int dmcfs : 2;
  35. unsigned int smcfs : 3;
  36. unsigned int sflfs : 2;
  37. unsigned int df_clkdiv : 3;
  38. int vcc_core; /* in mV */
  39. int vcc_sram; /* in mV */
  40. };
  41. #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
  42. { \
  43. .cpufreq_mhz = cpufreq, \
  44. .core_xl = _xl, \
  45. .core_xn = _xn, \
  46. .hss = HSS_##_hss##M, \
  47. .dmcfs = DMCFS_##_dmc##M, \
  48. .smcfs = SMCFS_##_smc##M, \
  49. .sflfs = SFLFS_##_sfl##M, \
  50. .df_clkdiv = _dfi, \
  51. .vcc_core = vcore, \
  52. .vcc_sram = vsram, \
  53. }
  54. static struct pxa3xx_freq_info pxa300_freqs[] = {
  55. /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  56. OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
  57. OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  58. OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  59. OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  60. };
  61. static struct pxa3xx_freq_info pxa320_freqs[] = {
  62. /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  63. OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
  64. OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  65. OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  66. OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  67. OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
  68. };
  69. static unsigned int pxa3xx_freqs_num;
  70. static struct pxa3xx_freq_info *pxa3xx_freqs;
  71. static struct cpufreq_frequency_table *pxa3xx_freqs_table;
  72. static int setup_freqs_table(struct cpufreq_policy *policy,
  73. struct pxa3xx_freq_info *freqs, int num)
  74. {
  75. struct cpufreq_frequency_table *table;
  76. int i;
  77. table = kcalloc(num + 1, sizeof(*table), GFP_KERNEL);
  78. if (table == NULL)
  79. return -ENOMEM;
  80. for (i = 0; i < num; i++) {
  81. table[i].driver_data = i;
  82. table[i].frequency = freqs[i].cpufreq_mhz * 1000;
  83. }
  84. table[num].driver_data = i;
  85. table[num].frequency = CPUFREQ_TABLE_END;
  86. pxa3xx_freqs = freqs;
  87. pxa3xx_freqs_num = num;
  88. pxa3xx_freqs_table = table;
  89. policy->freq_table = table;
  90. return 0;
  91. }
  92. static void __update_core_freq(struct pxa3xx_freq_info *info)
  93. {
  94. uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
  95. uint32_t accr = ACCR;
  96. uint32_t xclkcfg;
  97. accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
  98. accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
  99. /* No clock until core PLL is re-locked */
  100. accr |= ACCR_XSPCLK(XSPCLK_NONE);
  101. xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */
  102. ACCR = accr;
  103. __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
  104. while ((ACSR & mask) != (accr & mask))
  105. cpu_relax();
  106. }
  107. static void __update_bus_freq(struct pxa3xx_freq_info *info)
  108. {
  109. uint32_t mask;
  110. uint32_t accr = ACCR;
  111. mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
  112. ACCR_DMCFS_MASK;
  113. accr &= ~mask;
  114. accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
  115. ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
  116. ACCR = accr;
  117. while ((ACSR & mask) != (accr & mask))
  118. cpu_relax();
  119. }
  120. static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
  121. {
  122. return pxa3xx_get_clk_frequency_khz(0);
  123. }
  124. static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, unsigned int index)
  125. {
  126. struct pxa3xx_freq_info *next;
  127. unsigned long flags;
  128. if (policy->cpu != 0)
  129. return -EINVAL;
  130. next = &pxa3xx_freqs[index];
  131. local_irq_save(flags);
  132. __update_core_freq(next);
  133. __update_bus_freq(next);
  134. local_irq_restore(flags);
  135. return 0;
  136. }
  137. static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
  138. {
  139. int ret = -EINVAL;
  140. /* set default policy and cpuinfo */
  141. policy->min = policy->cpuinfo.min_freq = 104000;
  142. policy->max = policy->cpuinfo.max_freq =
  143. (cpu_is_pxa320()) ? 806000 : 624000;
  144. policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
  145. if (cpu_is_pxa300() || cpu_is_pxa310())
  146. ret = setup_freqs_table(policy, pxa300_freqs,
  147. ARRAY_SIZE(pxa300_freqs));
  148. if (cpu_is_pxa320())
  149. ret = setup_freqs_table(policy, pxa320_freqs,
  150. ARRAY_SIZE(pxa320_freqs));
  151. if (ret) {
  152. pr_err("failed to setup frequency table\n");
  153. return ret;
  154. }
  155. pr_info("CPUFREQ support for PXA3xx initialized\n");
  156. return 0;
  157. }
  158. static struct cpufreq_driver pxa3xx_cpufreq_driver = {
  159. .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
  160. .verify = cpufreq_generic_frequency_table_verify,
  161. .target_index = pxa3xx_cpufreq_set,
  162. .init = pxa3xx_cpufreq_init,
  163. .get = pxa3xx_cpufreq_get,
  164. .name = "pxa3xx-cpufreq",
  165. };
  166. static int __init cpufreq_init(void)
  167. {
  168. if (cpu_is_pxa3xx())
  169. return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
  170. return 0;
  171. }
  172. module_init(cpufreq_init);
  173. static void __exit cpufreq_exit(void)
  174. {
  175. cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
  176. }
  177. module_exit(cpufreq_exit);
  178. MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
  179. MODULE_LICENSE("GPL");