longrun.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
  4. *
  5. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/cpufreq.h>
  11. #include <linux/timex.h>
  12. #include <asm/msr.h>
  13. #include <asm/processor.h>
  14. #include <asm/cpu_device_id.h>
  15. static struct cpufreq_driver longrun_driver;
  16. /**
  17. * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
  18. * values into per cent values. In TMTA microcode, the following is valid:
  19. * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
  20. */
  21. static unsigned int longrun_low_freq, longrun_high_freq;
  22. /**
  23. * longrun_get_policy - get the current LongRun policy
  24. * @policy: struct cpufreq_policy where current policy is written into
  25. *
  26. * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
  27. * and MSR_TMTA_LONGRUN_CTRL
  28. */
  29. static void longrun_get_policy(struct cpufreq_policy *policy)
  30. {
  31. u32 msr_lo, msr_hi;
  32. rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
  33. pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
  34. if (msr_lo & 0x01)
  35. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  36. else
  37. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  38. rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
  39. pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
  40. msr_lo &= 0x0000007F;
  41. msr_hi &= 0x0000007F;
  42. if (longrun_high_freq <= longrun_low_freq) {
  43. /* Assume degenerate Longrun table */
  44. policy->min = policy->max = longrun_high_freq;
  45. } else {
  46. policy->min = longrun_low_freq + msr_lo *
  47. ((longrun_high_freq - longrun_low_freq) / 100);
  48. policy->max = longrun_low_freq + msr_hi *
  49. ((longrun_high_freq - longrun_low_freq) / 100);
  50. }
  51. policy->cpu = 0;
  52. }
  53. /**
  54. * longrun_set_policy - sets a new CPUFreq policy
  55. * @policy: new policy
  56. *
  57. * Sets a new CPUFreq policy on LongRun-capable processors. This function
  58. * has to be called with cpufreq_driver locked.
  59. */
  60. static int longrun_set_policy(struct cpufreq_policy *policy)
  61. {
  62. u32 msr_lo, msr_hi;
  63. u32 pctg_lo, pctg_hi;
  64. if (!policy)
  65. return -EINVAL;
  66. if (longrun_high_freq <= longrun_low_freq) {
  67. /* Assume degenerate Longrun table */
  68. pctg_lo = pctg_hi = 100;
  69. } else {
  70. pctg_lo = (policy->min - longrun_low_freq) /
  71. ((longrun_high_freq - longrun_low_freq) / 100);
  72. pctg_hi = (policy->max - longrun_low_freq) /
  73. ((longrun_high_freq - longrun_low_freq) / 100);
  74. }
  75. if (pctg_hi > 100)
  76. pctg_hi = 100;
  77. if (pctg_lo > pctg_hi)
  78. pctg_lo = pctg_hi;
  79. /* performance or economy mode */
  80. rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
  81. msr_lo &= 0xFFFFFFFE;
  82. switch (policy->policy) {
  83. case CPUFREQ_POLICY_PERFORMANCE:
  84. msr_lo |= 0x00000001;
  85. break;
  86. case CPUFREQ_POLICY_POWERSAVE:
  87. break;
  88. }
  89. wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
  90. /* lower and upper boundary */
  91. rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
  92. msr_lo &= 0xFFFFFF80;
  93. msr_hi &= 0xFFFFFF80;
  94. msr_lo |= pctg_lo;
  95. msr_hi |= pctg_hi;
  96. wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
  97. return 0;
  98. }
  99. /**
  100. * longrun_verify_poliy - verifies a new CPUFreq policy
  101. * @policy: the policy to verify
  102. *
  103. * Validates a new CPUFreq policy. This function has to be called with
  104. * cpufreq_driver locked.
  105. */
  106. static int longrun_verify_policy(struct cpufreq_policy_data *policy)
  107. {
  108. if (!policy)
  109. return -EINVAL;
  110. policy->cpu = 0;
  111. cpufreq_verify_within_cpu_limits(policy);
  112. return 0;
  113. }
  114. static unsigned int longrun_get(unsigned int cpu)
  115. {
  116. u32 eax, ebx, ecx, edx;
  117. if (cpu)
  118. return 0;
  119. cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
  120. pr_debug("cpuid eax is %u\n", eax);
  121. return eax * 1000;
  122. }
  123. /**
  124. * longrun_determine_freqs - determines the lowest and highest possible core frequency
  125. * @low_freq: an int to put the lowest frequency into
  126. * @high_freq: an int to put the highest frequency into
  127. *
  128. * Determines the lowest and highest possible core frequencies on this CPU.
  129. * This is necessary to calculate the performance percentage according to
  130. * TMTA rules:
  131. * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
  132. */
  133. static int longrun_determine_freqs(unsigned int *low_freq,
  134. unsigned int *high_freq)
  135. {
  136. u32 msr_lo, msr_hi;
  137. u32 save_lo, save_hi;
  138. u32 eax, ebx, ecx, edx;
  139. u32 try_hi;
  140. struct cpuinfo_x86 *c = &cpu_data(0);
  141. if (!low_freq || !high_freq)
  142. return -EINVAL;
  143. if (cpu_has(c, X86_FEATURE_LRTI)) {
  144. /* if the LongRun Table Interface is present, the
  145. * detection is a bit easier:
  146. * For minimum frequency, read out the maximum
  147. * level (msr_hi), write that into "currently
  148. * selected level", and read out the frequency.
  149. * For maximum frequency, read out level zero.
  150. */
  151. /* minimum */
  152. rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
  153. wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
  154. rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
  155. *low_freq = msr_lo * 1000; /* to kHz */
  156. /* maximum */
  157. wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
  158. rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
  159. *high_freq = msr_lo * 1000; /* to kHz */
  160. pr_debug("longrun table interface told %u - %u kHz\n",
  161. *low_freq, *high_freq);
  162. if (*low_freq > *high_freq)
  163. *low_freq = *high_freq;
  164. return 0;
  165. }
  166. /* set the upper border to the value determined during TSC init */
  167. *high_freq = (cpu_khz / 1000);
  168. *high_freq = *high_freq * 1000;
  169. pr_debug("high frequency is %u kHz\n", *high_freq);
  170. /* get current borders */
  171. rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
  172. save_lo = msr_lo & 0x0000007F;
  173. save_hi = msr_hi & 0x0000007F;
  174. /* if current perf_pctg is larger than 90%, we need to decrease the
  175. * upper limit to make the calculation more accurate.
  176. */
  177. cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
  178. /* try decreasing in 10% steps, some processors react only
  179. * on some barrier values */
  180. for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
  181. /* set to 0 to try_hi perf_pctg */
  182. msr_lo &= 0xFFFFFF80;
  183. msr_hi &= 0xFFFFFF80;
  184. msr_hi |= try_hi;
  185. wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
  186. /* read out current core MHz and current perf_pctg */
  187. cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
  188. /* restore values */
  189. wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
  190. }
  191. pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);
  192. /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
  193. * eqals
  194. * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
  195. *
  196. * high_freq * perf_pctg is stored tempoarily into "ebx".
  197. */
  198. ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
  199. if ((ecx > 95) || (ecx == 0) || (eax < ebx))
  200. return -EIO;
  201. edx = ((eax - ebx) * 100) / (100 - ecx);
  202. *low_freq = edx * 1000; /* back to kHz */
  203. pr_debug("low frequency is %u kHz\n", *low_freq);
  204. if (*low_freq > *high_freq)
  205. *low_freq = *high_freq;
  206. return 0;
  207. }
  208. static int longrun_cpu_init(struct cpufreq_policy *policy)
  209. {
  210. int result = 0;
  211. /* capability check */
  212. if (policy->cpu != 0)
  213. return -ENODEV;
  214. /* detect low and high frequency */
  215. result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
  216. if (result)
  217. return result;
  218. /* cpuinfo and default policy values */
  219. policy->cpuinfo.min_freq = longrun_low_freq;
  220. policy->cpuinfo.max_freq = longrun_high_freq;
  221. longrun_get_policy(policy);
  222. return 0;
  223. }
  224. static struct cpufreq_driver longrun_driver = {
  225. .flags = CPUFREQ_CONST_LOOPS,
  226. .verify = longrun_verify_policy,
  227. .setpolicy = longrun_set_policy,
  228. .get = longrun_get,
  229. .init = longrun_cpu_init,
  230. .name = "longrun",
  231. };
  232. static const struct x86_cpu_id longrun_ids[] = {
  233. X86_MATCH_VENDOR_FEATURE(TRANSMETA, X86_FEATURE_LONGRUN, NULL),
  234. {}
  235. };
  236. MODULE_DEVICE_TABLE(x86cpu, longrun_ids);
  237. /**
  238. * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
  239. *
  240. * Initializes the LongRun support.
  241. */
  242. static int __init longrun_init(void)
  243. {
  244. if (!x86_match_cpu(longrun_ids))
  245. return -ENODEV;
  246. return cpufreq_register_driver(&longrun_driver);
  247. }
  248. /**
  249. * longrun_exit - unregisters LongRun support
  250. */
  251. static void __exit longrun_exit(void)
  252. {
  253. cpufreq_unregister_driver(&longrun_driver);
  254. }
  255. MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
  256. MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
  257. "Efficeon processors.");
  258. MODULE_LICENSE("GPL");
  259. module_init(longrun_init);
  260. module_exit(longrun_exit);