gx-suspmod.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Cyrix MediaGX and NatSemi Geode Suspend Modulation
  4. * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  5. * (C) 2002 Hiroshi Miura <miura@da-cha.org>
  6. * All Rights Reserved
  7. *
  8. * The author(s) of this software shall not be held liable for damages
  9. * of any nature resulting due to the use of this software. This
  10. * software is provided AS-IS with no warranties.
  11. *
  12. * Theoretical note:
  13. *
  14. * (see Geode(tm) CS5530 manual (rev.4.1) page.56)
  15. *
  16. * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
  17. * are based on Suspend Modulation.
  18. *
  19. * Suspend Modulation works by asserting and de-asserting the SUSP# pin
  20. * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
  21. * the CPU enters an idle state. GX1 stops its core clock when SUSP# is
  22. * asserted then power consumption is reduced.
  23. *
  24. * Suspend Modulation's OFF/ON duration are configurable
  25. * with 'Suspend Modulation OFF Count Register'
  26. * and 'Suspend Modulation ON Count Register'.
  27. * These registers are 8bit counters that represent the number of
  28. * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
  29. * to the processor.
  30. *
  31. * These counters define a ratio which is the effective frequency
  32. * of operation of the system.
  33. *
  34. * OFF Count
  35. * F_eff = Fgx * ----------------------
  36. * OFF Count + ON Count
  37. *
  38. * 0 <= On Count, Off Count <= 255
  39. *
  40. * From these limits, we can get register values
  41. *
  42. * off_duration + on_duration <= MAX_DURATION
  43. * on_duration = off_duration * (stock_freq - freq) / freq
  44. *
  45. * off_duration = (freq * DURATION) / stock_freq
  46. * on_duration = DURATION - off_duration
  47. *
  48. *---------------------------------------------------------------------------
  49. *
  50. * ChangeLog:
  51. * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
  52. * - fix on/off register mistake
  53. * - fix cpu_khz calc when it stops cpu modulation.
  54. *
  55. * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
  56. * - rewrite for Cyrix MediaGX Cx5510/5520 and
  57. * NatSemi Geode Cs5530(A).
  58. *
  59. * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  60. * - cs5530_mod patch for 2.4.19-rc1.
  61. *
  62. *---------------------------------------------------------------------------
  63. *
  64. * Todo
  65. * Test on machines with 5510, 5530, 5530A
  66. */
  67. /************************************************************************
  68. * Suspend Modulation - Definitions *
  69. ************************************************************************/
  70. #include <linux/kernel.h>
  71. #include <linux/module.h>
  72. #include <linux/init.h>
  73. #include <linux/smp.h>
  74. #include <linux/cpufreq.h>
  75. #include <linux/pci.h>
  76. #include <linux/errno.h>
  77. #include <linux/slab.h>
  78. #include <asm/cpu_device_id.h>
  79. #include <asm/processor-cyrix.h>
  80. /* PCI config registers, all at F0 */
  81. #define PCI_PMER1 0x80 /* power management enable register 1 */
  82. #define PCI_PMER2 0x81 /* power management enable register 2 */
  83. #define PCI_PMER3 0x82 /* power management enable register 3 */
  84. #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
  85. #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
  86. #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
  87. #define PCI_MODON 0x95 /* suspend modulation ON counter register */
  88. #define PCI_SUSCFG 0x96 /* suspend configuration register */
  89. /* PMER1 bits */
  90. #define GPM (1<<0) /* global power management */
  91. #define GIT (1<<1) /* globally enable PM device idle timers */
  92. #define GTR (1<<2) /* globally enable IO traps */
  93. #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
  94. #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
  95. /* SUSCFG bits */
  96. #define SUSMOD (1<<0) /* enable/disable suspend modulation */
  97. /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
  98. #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
  99. /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
  100. #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
  101. /* the below is supported only with cs5530A */
  102. #define PWRSVE_ISA (1<<3) /* stop ISA clock */
  103. #define PWRSVE (1<<4) /* active idle */
  104. struct gxfreq_params {
  105. u8 on_duration;
  106. u8 off_duration;
  107. u8 pci_suscfg;
  108. u8 pci_pmer1;
  109. u8 pci_pmer2;
  110. struct pci_dev *cs55x0;
  111. };
  112. static struct gxfreq_params *gx_params;
  113. static int stock_freq;
  114. /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
  115. static int pci_busclk;
  116. module_param(pci_busclk, int, 0444);
  117. /* maximum duration for which the cpu may be suspended
  118. * (32us * MAX_DURATION). If no parameter is given, this defaults
  119. * to 255.
  120. * Note that this leads to a maximum of 8 ms(!) where the CPU clock
  121. * is suspended -- processing power is just 0.39% of what it used to be,
  122. * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
  123. static int max_duration = 255;
  124. module_param(max_duration, int, 0444);
  125. /* For the default policy, we want at least some processing power
  126. * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
  127. */
  128. #define POLICY_MIN_DIV 20
  129. /**
  130. * we can detect a core multiplier from dir0_lsb
  131. * from GX1 datasheet p.56,
  132. * MULT[3:0]:
  133. * 0000 = SYSCLK multiplied by 4 (test only)
  134. * 0001 = SYSCLK multiplied by 10
  135. * 0010 = SYSCLK multiplied by 4
  136. * 0011 = SYSCLK multiplied by 6
  137. * 0100 = SYSCLK multiplied by 9
  138. * 0101 = SYSCLK multiplied by 5
  139. * 0110 = SYSCLK multiplied by 7
  140. * 0111 = SYSCLK multiplied by 8
  141. * of 33.3MHz
  142. **/
  143. static int gx_freq_mult[16] = {
  144. 4, 10, 4, 6, 9, 5, 7, 8,
  145. 0, 0, 0, 0, 0, 0, 0, 0
  146. };
  147. /****************************************************************
  148. * Low Level chipset interface *
  149. ****************************************************************/
  150. static struct pci_device_id gx_chipset_tbl[] __initdata = {
  151. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
  152. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
  153. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
  154. { 0, },
  155. };
  156. MODULE_DEVICE_TABLE(pci, gx_chipset_tbl);
  157. static void gx_write_byte(int reg, int value)
  158. {
  159. pci_write_config_byte(gx_params->cs55x0, reg, value);
  160. }
  161. /**
  162. * gx_detect_chipset:
  163. *
  164. **/
  165. static struct pci_dev * __init gx_detect_chipset(void)
  166. {
  167. struct pci_dev *gx_pci = NULL;
  168. /* detect which companion chip is used */
  169. for_each_pci_dev(gx_pci) {
  170. if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
  171. return gx_pci;
  172. }
  173. pr_debug("error: no supported chipset found!\n");
  174. return NULL;
  175. }
  176. /**
  177. * gx_get_cpuspeed:
  178. *
  179. * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
  180. * Geode CPU runs.
  181. */
  182. static unsigned int gx_get_cpuspeed(unsigned int cpu)
  183. {
  184. if ((gx_params->pci_suscfg & SUSMOD) == 0)
  185. return stock_freq;
  186. return (stock_freq * gx_params->off_duration)
  187. / (gx_params->on_duration + gx_params->off_duration);
  188. }
  189. /**
  190. * gx_validate_speed:
  191. * determine current cpu speed
  192. *
  193. **/
  194. static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
  195. u8 *off_duration)
  196. {
  197. unsigned int i;
  198. u8 tmp_on, tmp_off;
  199. int old_tmp_freq = stock_freq;
  200. int tmp_freq;
  201. *off_duration = 1;
  202. *on_duration = 0;
  203. for (i = max_duration; i > 0; i--) {
  204. tmp_off = ((khz * i) / stock_freq) & 0xff;
  205. tmp_on = i - tmp_off;
  206. tmp_freq = (stock_freq * tmp_off) / i;
  207. /* if this relation is closer to khz, use this. If it's equal,
  208. * prefer it, too - lower latency */
  209. if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
  210. *on_duration = tmp_on;
  211. *off_duration = tmp_off;
  212. old_tmp_freq = tmp_freq;
  213. }
  214. }
  215. return old_tmp_freq;
  216. }
  217. /**
  218. * gx_set_cpuspeed:
  219. * set cpu speed in khz.
  220. **/
  221. static void gx_set_cpuspeed(struct cpufreq_policy *policy, unsigned int khz)
  222. {
  223. u8 suscfg, pmer1;
  224. unsigned int new_khz;
  225. unsigned long flags;
  226. struct cpufreq_freqs freqs;
  227. freqs.old = gx_get_cpuspeed(0);
  228. new_khz = gx_validate_speed(khz, &gx_params->on_duration,
  229. &gx_params->off_duration);
  230. freqs.new = new_khz;
  231. cpufreq_freq_transition_begin(policy, &freqs);
  232. local_irq_save(flags);
  233. if (new_khz != stock_freq) {
  234. /* if new khz == 100% of CPU speed, it is special case */
  235. switch (gx_params->cs55x0->device) {
  236. case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
  237. pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
  238. /* FIXME: need to test other values -- Zwane,Miura */
  239. /* typical 2 to 4ms */
  240. gx_write_byte(PCI_IRQTC, 4);
  241. /* typical 50 to 100ms */
  242. gx_write_byte(PCI_VIDTC, 100);
  243. gx_write_byte(PCI_PMER1, pmer1);
  244. if (gx_params->cs55x0->revision < 0x10) {
  245. /* CS5530(rev 1.2, 1.3) */
  246. suscfg = gx_params->pci_suscfg|SUSMOD;
  247. } else {
  248. /* CS5530A,B.. */
  249. suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
  250. }
  251. break;
  252. case PCI_DEVICE_ID_CYRIX_5520:
  253. case PCI_DEVICE_ID_CYRIX_5510:
  254. suscfg = gx_params->pci_suscfg | SUSMOD;
  255. break;
  256. default:
  257. local_irq_restore(flags);
  258. pr_debug("fatal: try to set unknown chipset.\n");
  259. return;
  260. }
  261. } else {
  262. suscfg = gx_params->pci_suscfg & ~(SUSMOD);
  263. gx_params->off_duration = 0;
  264. gx_params->on_duration = 0;
  265. pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n");
  266. }
  267. gx_write_byte(PCI_MODOFF, gx_params->off_duration);
  268. gx_write_byte(PCI_MODON, gx_params->on_duration);
  269. gx_write_byte(PCI_SUSCFG, suscfg);
  270. pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
  271. local_irq_restore(flags);
  272. gx_params->pci_suscfg = suscfg;
  273. cpufreq_freq_transition_end(policy, &freqs, 0);
  274. pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
  275. gx_params->on_duration * 32, gx_params->off_duration * 32);
  276. pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
  277. }
  278. /****************************************************************
  279. * High level functions *
  280. ****************************************************************/
  281. /*
  282. * cpufreq_gx_verify: test if frequency range is valid
  283. *
  284. * This function checks if a given frequency range in kHz is valid
  285. * for the hardware supported by the driver.
  286. */
  287. static int cpufreq_gx_verify(struct cpufreq_policy_data *policy)
  288. {
  289. unsigned int tmp_freq = 0;
  290. u8 tmp1, tmp2;
  291. if (!stock_freq || !policy)
  292. return -EINVAL;
  293. policy->cpu = 0;
  294. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  295. stock_freq);
  296. /* it needs to be assured that at least one supported frequency is
  297. * within policy->min and policy->max. If it is not, policy->max
  298. * needs to be increased until one frequency is supported.
  299. * policy->min may not be decreased, though. This way we guarantee a
  300. * specific processing capacity.
  301. */
  302. tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
  303. if (tmp_freq < policy->min)
  304. tmp_freq += stock_freq / max_duration;
  305. policy->min = tmp_freq;
  306. if (policy->min > policy->max)
  307. policy->max = tmp_freq;
  308. tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
  309. if (tmp_freq > policy->max)
  310. tmp_freq -= stock_freq / max_duration;
  311. policy->max = tmp_freq;
  312. if (policy->max < policy->min)
  313. policy->max = policy->min;
  314. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  315. stock_freq);
  316. return 0;
  317. }
  318. /*
  319. * cpufreq_gx_target:
  320. *
  321. */
  322. static int cpufreq_gx_target(struct cpufreq_policy *policy,
  323. unsigned int target_freq,
  324. unsigned int relation)
  325. {
  326. u8 tmp1, tmp2;
  327. unsigned int tmp_freq;
  328. if (!stock_freq || !policy)
  329. return -EINVAL;
  330. policy->cpu = 0;
  331. tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
  332. while (tmp_freq < policy->min) {
  333. tmp_freq += stock_freq / max_duration;
  334. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  335. }
  336. while (tmp_freq > policy->max) {
  337. tmp_freq -= stock_freq / max_duration;
  338. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  339. }
  340. gx_set_cpuspeed(policy, tmp_freq);
  341. return 0;
  342. }
  343. static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
  344. {
  345. unsigned int maxfreq;
  346. if (!policy || policy->cpu != 0)
  347. return -ENODEV;
  348. /* determine maximum frequency */
  349. if (pci_busclk)
  350. maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  351. else if (cpu_khz)
  352. maxfreq = cpu_khz;
  353. else
  354. maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  355. stock_freq = maxfreq;
  356. pr_debug("cpu max frequency is %d.\n", maxfreq);
  357. /* setup basic struct for cpufreq API */
  358. policy->cpu = 0;
  359. if (max_duration < POLICY_MIN_DIV)
  360. policy->min = maxfreq / max_duration;
  361. else
  362. policy->min = maxfreq / POLICY_MIN_DIV;
  363. policy->max = maxfreq;
  364. policy->cpuinfo.min_freq = maxfreq / max_duration;
  365. policy->cpuinfo.max_freq = maxfreq;
  366. return 0;
  367. }
  368. /*
  369. * cpufreq_gx_init:
  370. * MediaGX/Geode GX initialize cpufreq driver
  371. */
  372. static struct cpufreq_driver gx_suspmod_driver = {
  373. .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
  374. .get = gx_get_cpuspeed,
  375. .verify = cpufreq_gx_verify,
  376. .target = cpufreq_gx_target,
  377. .init = cpufreq_gx_cpu_init,
  378. .name = "gx-suspmod",
  379. };
  380. static int __init cpufreq_gx_init(void)
  381. {
  382. int ret;
  383. struct gxfreq_params *params;
  384. struct pci_dev *gx_pci;
  385. /* Test if we have the right hardware */
  386. gx_pci = gx_detect_chipset();
  387. if (gx_pci == NULL)
  388. return -ENODEV;
  389. /* check whether module parameters are sane */
  390. if (max_duration > 0xff)
  391. max_duration = 0xff;
  392. pr_debug("geode suspend modulation available.\n");
  393. params = kzalloc(sizeof(*params), GFP_KERNEL);
  394. if (params == NULL)
  395. return -ENOMEM;
  396. params->cs55x0 = gx_pci;
  397. gx_params = params;
  398. /* keep cs55x0 configurations */
  399. pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
  400. pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
  401. pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
  402. pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
  403. pci_read_config_byte(params->cs55x0, PCI_MODOFF,
  404. &(params->off_duration));
  405. ret = cpufreq_register_driver(&gx_suspmod_driver);
  406. if (ret) {
  407. kfree(params);
  408. return ret; /* register error! */
  409. }
  410. return 0;
  411. }
  412. static void __exit cpufreq_gx_exit(void)
  413. {
  414. cpufreq_unregister_driver(&gx_suspmod_driver);
  415. pci_dev_put(gx_params->cs55x0);
  416. kfree(gx_params);
  417. }
  418. MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
  419. MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
  420. MODULE_LICENSE("GPL");
  421. module_init(cpufreq_gx_init);
  422. module_exit(cpufreq_gx_exit);