timer-stm32.c 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) Maxime Coquelin 2015
  4. * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
  5. *
  6. * Inspired by time-efm32.c from Uwe Kleine-Koenig
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/clocksource.h>
  10. #include <linux/clockchips.h>
  11. #include <linux/delay.h>
  12. #include <linux/irq.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/of.h>
  15. #include <linux/of_address.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/clk.h>
  18. #include <linux/reset.h>
  19. #include <linux/sched_clock.h>
  20. #include <linux/slab.h>
  21. #include "timer-of.h"
  22. #define TIM_CR1 0x00
  23. #define TIM_DIER 0x0c
  24. #define TIM_SR 0x10
  25. #define TIM_EGR 0x14
  26. #define TIM_CNT 0x24
  27. #define TIM_PSC 0x28
  28. #define TIM_ARR 0x2c
  29. #define TIM_CCR1 0x34
  30. #define TIM_CR1_CEN BIT(0)
  31. #define TIM_CR1_UDIS BIT(1)
  32. #define TIM_CR1_OPM BIT(3)
  33. #define TIM_CR1_ARPE BIT(7)
  34. #define TIM_DIER_UIE BIT(0)
  35. #define TIM_DIER_CC1IE BIT(1)
  36. #define TIM_SR_UIF BIT(0)
  37. #define TIM_EGR_UG BIT(0)
  38. #define TIM_PSC_MAX USHRT_MAX
  39. #define TIM_PSC_CLKRATE 10000
  40. struct stm32_timer_private {
  41. int bits;
  42. };
  43. /**
  44. * stm32_timer_of_bits_set - set accessor helper
  45. * @to: a timer_of structure pointer
  46. * @bits: the number of bits (16 or 32)
  47. *
  48. * Accessor helper to set the number of bits in the timer-of private
  49. * structure.
  50. *
  51. */
  52. static void stm32_timer_of_bits_set(struct timer_of *to, int bits)
  53. {
  54. struct stm32_timer_private *pd = to->private_data;
  55. pd->bits = bits;
  56. }
  57. /**
  58. * stm32_timer_of_bits_get - get accessor helper
  59. * @to: a timer_of structure pointer
  60. *
  61. * Accessor helper to get the number of bits in the timer-of private
  62. * structure.
  63. *
  64. * Returns an integer corresponding to the number of bits.
  65. */
  66. static int stm32_timer_of_bits_get(struct timer_of *to)
  67. {
  68. struct stm32_timer_private *pd = to->private_data;
  69. return pd->bits;
  70. }
  71. static void __iomem *stm32_timer_cnt __read_mostly;
  72. static u64 notrace stm32_read_sched_clock(void)
  73. {
  74. return readl_relaxed(stm32_timer_cnt);
  75. }
  76. static struct delay_timer stm32_timer_delay;
  77. static unsigned long stm32_read_delay(void)
  78. {
  79. return readl_relaxed(stm32_timer_cnt);
  80. }
  81. static void stm32_clock_event_disable(struct timer_of *to)
  82. {
  83. writel_relaxed(0, timer_of_base(to) + TIM_DIER);
  84. }
  85. /**
  86. * stm32_timer_start - Start the counter without event
  87. * @to: a timer_of structure pointer
  88. *
  89. * Start the timer in order to have the counter reset and start
  90. * incrementing but disable interrupt event when there is a counter
  91. * overflow. By default, the counter direction is used as upcounter.
  92. */
  93. static void stm32_timer_start(struct timer_of *to)
  94. {
  95. writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1);
  96. }
  97. static int stm32_clock_event_shutdown(struct clock_event_device *clkevt)
  98. {
  99. struct timer_of *to = to_timer_of(clkevt);
  100. stm32_clock_event_disable(to);
  101. return 0;
  102. }
  103. static int stm32_clock_event_set_next_event(unsigned long evt,
  104. struct clock_event_device *clkevt)
  105. {
  106. struct timer_of *to = to_timer_of(clkevt);
  107. unsigned long now, next;
  108. next = readl_relaxed(timer_of_base(to) + TIM_CNT) + evt;
  109. writel_relaxed(next, timer_of_base(to) + TIM_CCR1);
  110. now = readl_relaxed(timer_of_base(to) + TIM_CNT);
  111. if ((next - now) > evt)
  112. return -ETIME;
  113. writel_relaxed(TIM_DIER_CC1IE, timer_of_base(to) + TIM_DIER);
  114. return 0;
  115. }
  116. static int stm32_clock_event_set_periodic(struct clock_event_device *clkevt)
  117. {
  118. struct timer_of *to = to_timer_of(clkevt);
  119. stm32_timer_start(to);
  120. return stm32_clock_event_set_next_event(timer_of_period(to), clkevt);
  121. }
  122. static int stm32_clock_event_set_oneshot(struct clock_event_device *clkevt)
  123. {
  124. struct timer_of *to = to_timer_of(clkevt);
  125. stm32_timer_start(to);
  126. return 0;
  127. }
  128. static irqreturn_t stm32_clock_event_handler(int irq, void *dev_id)
  129. {
  130. struct clock_event_device *clkevt = (struct clock_event_device *)dev_id;
  131. struct timer_of *to = to_timer_of(clkevt);
  132. writel_relaxed(0, timer_of_base(to) + TIM_SR);
  133. if (clockevent_state_periodic(clkevt))
  134. stm32_clock_event_set_periodic(clkevt);
  135. else
  136. stm32_clock_event_shutdown(clkevt);
  137. clkevt->event_handler(clkevt);
  138. return IRQ_HANDLED;
  139. }
  140. /**
  141. * stm32_timer_width - Sort out the timer width (32/16)
  142. * @to: a pointer to a timer-of structure
  143. *
  144. * Write the 32-bit max value and read/return the result. If the timer
  145. * is 32 bits wide, the result will be UINT_MAX, otherwise it will
  146. * be truncated by the 16-bit register to USHRT_MAX.
  147. *
  148. */
  149. static void __init stm32_timer_set_width(struct timer_of *to)
  150. {
  151. u32 width;
  152. writel_relaxed(UINT_MAX, timer_of_base(to) + TIM_ARR);
  153. width = readl_relaxed(timer_of_base(to) + TIM_ARR);
  154. stm32_timer_of_bits_set(to, width == UINT_MAX ? 32 : 16);
  155. }
  156. /**
  157. * stm32_timer_set_prescaler - Compute and set the prescaler register
  158. * @to: a pointer to a timer-of structure
  159. *
  160. * Depending on the timer width, compute the prescaler to always
  161. * target a 10MHz timer rate for 16 bits. 32-bit timers are
  162. * considered precise and long enough to not use the prescaler.
  163. */
  164. static void __init stm32_timer_set_prescaler(struct timer_of *to)
  165. {
  166. int prescaler = 1;
  167. if (stm32_timer_of_bits_get(to) != 32) {
  168. prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to),
  169. TIM_PSC_CLKRATE);
  170. /*
  171. * The prescaler register is an u16, the variable
  172. * can't be greater than TIM_PSC_MAX, let's cap it in
  173. * this case.
  174. */
  175. prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX;
  176. }
  177. writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC);
  178. writel_relaxed(TIM_EGR_UG, timer_of_base(to) + TIM_EGR);
  179. writel_relaxed(0, timer_of_base(to) + TIM_SR);
  180. /* Adjust rate and period given the prescaler value */
  181. to->of_clk.rate = DIV_ROUND_CLOSEST(to->of_clk.rate, prescaler);
  182. to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);
  183. }
  184. static int __init stm32_clocksource_init(struct timer_of *to)
  185. {
  186. u32 bits = stm32_timer_of_bits_get(to);
  187. const char *name = to->np->full_name;
  188. /*
  189. * This driver allows to register several timers and relies on
  190. * the generic time framework to select the right one.
  191. * However, nothing allows to do the same for the
  192. * sched_clock. We are not interested in a sched_clock for the
  193. * 16-bit timers but only for the 32-bit one, so if no 32-bit
  194. * timer is registered yet, we select this 32-bit timer as a
  195. * sched_clock.
  196. */
  197. if (bits == 32 && !stm32_timer_cnt) {
  198. /*
  199. * Start immediately the counter as we will be using
  200. * it right after.
  201. */
  202. stm32_timer_start(to);
  203. stm32_timer_cnt = timer_of_base(to) + TIM_CNT;
  204. sched_clock_register(stm32_read_sched_clock, bits, timer_of_rate(to));
  205. pr_info("%s: STM32 sched_clock registered\n", name);
  206. stm32_timer_delay.read_current_timer = stm32_read_delay;
  207. stm32_timer_delay.freq = timer_of_rate(to);
  208. register_current_timer_delay(&stm32_timer_delay);
  209. pr_info("%s: STM32 delay timer registered\n", name);
  210. }
  211. return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name,
  212. timer_of_rate(to), bits == 32 ? 250 : 100,
  213. bits, clocksource_mmio_readl_up);
  214. }
  215. static void __init stm32_clockevent_init(struct timer_of *to)
  216. {
  217. u32 bits = stm32_timer_of_bits_get(to);
  218. to->clkevt.name = to->np->full_name;
  219. to->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
  220. to->clkevt.set_state_shutdown = stm32_clock_event_shutdown;
  221. to->clkevt.set_state_periodic = stm32_clock_event_set_periodic;
  222. to->clkevt.set_state_oneshot = stm32_clock_event_set_oneshot;
  223. to->clkevt.tick_resume = stm32_clock_event_shutdown;
  224. to->clkevt.set_next_event = stm32_clock_event_set_next_event;
  225. to->clkevt.rating = bits == 32 ? 250 : 100;
  226. clockevents_config_and_register(&to->clkevt, timer_of_rate(to), 0x1,
  227. (1 << bits) - 1);
  228. pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n",
  229. to->np, bits);
  230. }
  231. static int __init stm32_timer_init(struct device_node *node)
  232. {
  233. struct reset_control *rstc;
  234. struct timer_of *to;
  235. int ret;
  236. to = kzalloc(sizeof(*to), GFP_KERNEL);
  237. if (!to)
  238. return -ENOMEM;
  239. to->flags = TIMER_OF_IRQ | TIMER_OF_CLOCK | TIMER_OF_BASE;
  240. to->of_irq.handler = stm32_clock_event_handler;
  241. ret = timer_of_init(node, to);
  242. if (ret)
  243. goto err;
  244. to->private_data = kzalloc(sizeof(struct stm32_timer_private),
  245. GFP_KERNEL);
  246. if (!to->private_data) {
  247. ret = -ENOMEM;
  248. goto deinit;
  249. }
  250. rstc = of_reset_control_get(node, NULL);
  251. if (!IS_ERR(rstc)) {
  252. reset_control_assert(rstc);
  253. reset_control_deassert(rstc);
  254. }
  255. stm32_timer_set_width(to);
  256. stm32_timer_set_prescaler(to);
  257. ret = stm32_clocksource_init(to);
  258. if (ret)
  259. goto deinit;
  260. stm32_clockevent_init(to);
  261. return 0;
  262. deinit:
  263. timer_of_cleanup(to);
  264. err:
  265. kfree(to);
  266. return ret;
  267. }
  268. TIMER_OF_DECLARE(stm32, "st,stm32-timer", stm32_timer_init);