timer-atmel-pit.c 6.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
  4. *
  5. * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
  6. * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
  7. * Converted to ClockSource/ClockEvents by David Brownell.
  8. */
  9. #define pr_fmt(fmt) "AT91: PIT: " fmt
  10. #include <linux/clk.h>
  11. #include <linux/clockchips.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/irq.h>
  14. #include <linux/kernel.h>
  15. #include <linux/of.h>
  16. #include <linux/of_address.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/slab.h>
  19. #define AT91_PIT_MR 0x00 /* Mode Register */
  20. #define AT91_PIT_PITIEN BIT(25) /* Timer Interrupt Enable */
  21. #define AT91_PIT_PITEN BIT(24) /* Timer Enabled */
  22. #define AT91_PIT_PIV GENMASK(19, 0) /* Periodic Interval Value */
  23. #define AT91_PIT_SR 0x04 /* Status Register */
  24. #define AT91_PIT_PITS BIT(0) /* Timer Status */
  25. #define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
  26. #define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
  27. #define AT91_PIT_PICNT GENMASK(31, 20) /* Interval Counter */
  28. #define AT91_PIT_CPIV GENMASK(19, 0) /* Inverval Value */
  29. #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
  30. #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
  31. struct pit_data {
  32. struct clock_event_device clkevt;
  33. struct clocksource clksrc;
  34. void __iomem *base;
  35. u32 cycle;
  36. u32 cnt;
  37. unsigned int irq;
  38. struct clk *mck;
  39. };
  40. static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc)
  41. {
  42. return container_of(clksrc, struct pit_data, clksrc);
  43. }
  44. static inline struct pit_data *clkevt_to_pit_data(struct clock_event_device *clkevt)
  45. {
  46. return container_of(clkevt, struct pit_data, clkevt);
  47. }
  48. static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset)
  49. {
  50. return readl_relaxed(base + reg_offset);
  51. }
  52. static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value)
  53. {
  54. writel_relaxed(value, base + reg_offset);
  55. }
  56. /*
  57. * Clocksource: just a monotonic counter of MCK/16 cycles.
  58. * We don't care whether or not PIT irqs are enabled.
  59. */
  60. static u64 read_pit_clk(struct clocksource *cs)
  61. {
  62. struct pit_data *data = clksrc_to_pit_data(cs);
  63. unsigned long flags;
  64. u32 elapsed;
  65. u32 t;
  66. raw_local_irq_save(flags);
  67. elapsed = data->cnt;
  68. t = pit_read(data->base, AT91_PIT_PIIR);
  69. raw_local_irq_restore(flags);
  70. elapsed += PIT_PICNT(t) * data->cycle;
  71. elapsed += PIT_CPIV(t);
  72. return elapsed;
  73. }
  74. static int pit_clkevt_shutdown(struct clock_event_device *dev)
  75. {
  76. struct pit_data *data = clkevt_to_pit_data(dev);
  77. /* disable irq, leaving the clocksource active */
  78. pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN);
  79. return 0;
  80. }
  81. /*
  82. * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
  83. */
  84. static int pit_clkevt_set_periodic(struct clock_event_device *dev)
  85. {
  86. struct pit_data *data = clkevt_to_pit_data(dev);
  87. /* update clocksource counter */
  88. data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR));
  89. pit_write(data->base, AT91_PIT_MR,
  90. (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN);
  91. return 0;
  92. }
  93. static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
  94. {
  95. struct pit_data *data = clkevt_to_pit_data(cedev);
  96. /* Disable timer */
  97. pit_write(data->base, AT91_PIT_MR, 0);
  98. }
  99. static void at91sam926x_pit_reset(struct pit_data *data)
  100. {
  101. /* Disable timer and irqs */
  102. pit_write(data->base, AT91_PIT_MR, 0);
  103. /* Clear any pending interrupts, wait for PIT to stop counting */
  104. while (PIT_CPIV(pit_read(data->base, AT91_PIT_PIVR)) != 0)
  105. cpu_relax();
  106. /* Start PIT but don't enable IRQ */
  107. pit_write(data->base, AT91_PIT_MR,
  108. (data->cycle - 1) | AT91_PIT_PITEN);
  109. }
  110. static void at91sam926x_pit_resume(struct clock_event_device *cedev)
  111. {
  112. struct pit_data *data = clkevt_to_pit_data(cedev);
  113. at91sam926x_pit_reset(data);
  114. }
  115. /*
  116. * IRQ handler for the timer.
  117. */
  118. static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
  119. {
  120. struct pit_data *data = dev_id;
  121. /* The PIT interrupt may be disabled, and is shared */
  122. if (clockevent_state_periodic(&data->clkevt) &&
  123. (pit_read(data->base, AT91_PIT_SR) & AT91_PIT_PITS)) {
  124. /* Get number of ticks performed before irq, and ack it */
  125. data->cnt += data->cycle * PIT_PICNT(pit_read(data->base,
  126. AT91_PIT_PIVR));
  127. data->clkevt.event_handler(&data->clkevt);
  128. return IRQ_HANDLED;
  129. }
  130. return IRQ_NONE;
  131. }
  132. /*
  133. * Set up both clocksource and clockevent support.
  134. */
  135. static int __init at91sam926x_pit_dt_init(struct device_node *node)
  136. {
  137. unsigned long pit_rate;
  138. unsigned bits;
  139. int ret;
  140. struct pit_data *data;
  141. data = kzalloc(sizeof(*data), GFP_KERNEL);
  142. if (!data)
  143. return -ENOMEM;
  144. data->base = of_iomap(node, 0);
  145. if (!data->base) {
  146. pr_err("Could not map PIT address\n");
  147. ret = -ENXIO;
  148. goto exit;
  149. }
  150. data->mck = of_clk_get(node, 0);
  151. if (IS_ERR(data->mck)) {
  152. pr_err("Unable to get mck clk\n");
  153. ret = PTR_ERR(data->mck);
  154. goto exit;
  155. }
  156. ret = clk_prepare_enable(data->mck);
  157. if (ret) {
  158. pr_err("Unable to enable mck\n");
  159. goto exit;
  160. }
  161. /* Get the interrupts property */
  162. data->irq = irq_of_parse_and_map(node, 0);
  163. if (!data->irq) {
  164. pr_err("Unable to get IRQ from DT\n");
  165. ret = -EINVAL;
  166. goto exit;
  167. }
  168. /*
  169. * Use our actual MCK to figure out how many MCK/16 ticks per
  170. * 1/HZ period (instead of a compile-time constant LATCH).
  171. */
  172. pit_rate = clk_get_rate(data->mck) / 16;
  173. data->cycle = DIV_ROUND_CLOSEST(pit_rate, HZ);
  174. WARN_ON(((data->cycle - 1) & ~AT91_PIT_PIV) != 0);
  175. /* Initialize and enable the timer */
  176. at91sam926x_pit_reset(data);
  177. /*
  178. * Register clocksource. The high order bits of PIV are unused,
  179. * so this isn't a 32-bit counter unless we get clockevent irqs.
  180. */
  181. bits = 12 /* PICNT */ + ilog2(data->cycle) /* PIV */;
  182. data->clksrc.mask = CLOCKSOURCE_MASK(bits);
  183. data->clksrc.name = "pit";
  184. data->clksrc.rating = 175;
  185. data->clksrc.read = read_pit_clk;
  186. data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
  187. ret = clocksource_register_hz(&data->clksrc, pit_rate);
  188. if (ret) {
  189. pr_err("Failed to register clocksource\n");
  190. goto exit;
  191. }
  192. /* Set up irq handler */
  193. ret = request_irq(data->irq, at91sam926x_pit_interrupt,
  194. IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
  195. "at91_tick", data);
  196. if (ret) {
  197. pr_err("Unable to setup IRQ\n");
  198. clocksource_unregister(&data->clksrc);
  199. goto exit;
  200. }
  201. /* Set up and register clockevents */
  202. data->clkevt.name = "pit";
  203. data->clkevt.features = CLOCK_EVT_FEAT_PERIODIC;
  204. data->clkevt.shift = 32;
  205. data->clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, data->clkevt.shift);
  206. data->clkevt.rating = 100;
  207. data->clkevt.cpumask = cpumask_of(0);
  208. data->clkevt.set_state_shutdown = pit_clkevt_shutdown;
  209. data->clkevt.set_state_periodic = pit_clkevt_set_periodic;
  210. data->clkevt.resume = at91sam926x_pit_resume;
  211. data->clkevt.suspend = at91sam926x_pit_suspend;
  212. clockevents_register_device(&data->clkevt);
  213. return 0;
  214. exit:
  215. kfree(data);
  216. return ret;
  217. }
  218. TIMER_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
  219. at91sam926x_pit_dt_init);