clkt_dflt.c 9.3 KB

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  1. /*
  2. * Default clock type
  3. *
  4. * Copyright (C) 2005-2008, 2015 Texas Instruments, Inc.
  5. * Copyright (C) 2004-2010 Nokia Corporation
  6. *
  7. * Contacts:
  8. * Richard Woodruff <r-woodruff2@ti.com>
  9. * Paul Walmsley
  10. * Tero Kristo <t-kristo@ti.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  17. * kind, whether express or implied; without even the implied warranty
  18. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/errno.h>
  23. #include <linux/clk-provider.h>
  24. #include <linux/io.h>
  25. #include <linux/clk/ti.h>
  26. #include <linux/delay.h>
  27. #include "clock.h"
  28. /*
  29. * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
  30. * for a module to indicate that it is no longer in idle
  31. */
  32. #define MAX_MODULE_ENABLE_WAIT 100000
  33. /*
  34. * CM module register offsets, used for calculating the companion
  35. * register addresses.
  36. */
  37. #define CM_FCLKEN 0x0000
  38. #define CM_ICLKEN 0x0010
  39. /**
  40. * _wait_idlest_generic - wait for a module to leave the idle state
  41. * @clk: module clock to wait for (needed for register offsets)
  42. * @reg: virtual address of module IDLEST register
  43. * @mask: value to mask against to determine if the module is active
  44. * @idlest: idle state indicator (0 or 1) for the clock
  45. * @name: name of the clock (for printk)
  46. *
  47. * Wait for a module to leave idle, where its idle-status register is
  48. * not inside the CM module. Returns 1 if the module left idle
  49. * promptly, or 0 if the module did not leave idle before the timeout
  50. * elapsed. XXX Deprecated - should be moved into drivers for the
  51. * individual IP block that the IDLEST register exists in.
  52. */
  53. static int _wait_idlest_generic(struct clk_hw_omap *clk,
  54. struct clk_omap_reg *reg,
  55. u32 mask, u8 idlest, const char *name)
  56. {
  57. int i = 0, ena = 0;
  58. ena = (idlest) ? 0 : mask;
  59. /* Wait until module enters enabled state */
  60. for (i = 0; i < MAX_MODULE_ENABLE_WAIT; i++) {
  61. if ((ti_clk_ll_ops->clk_readl(reg) & mask) == ena)
  62. break;
  63. udelay(1);
  64. }
  65. if (i < MAX_MODULE_ENABLE_WAIT)
  66. pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
  67. name, i);
  68. else
  69. pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
  70. name, MAX_MODULE_ENABLE_WAIT);
  71. return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
  72. }
  73. /**
  74. * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
  75. * @clk: struct clk * belonging to the module
  76. *
  77. * If the necessary clocks for the OMAP hardware IP block that
  78. * corresponds to clock @clk are enabled, then wait for the module to
  79. * indicate readiness (i.e., to leave IDLE). This code does not
  80. * belong in the clock code and will be moved in the medium term to
  81. * module-dependent code. No return value.
  82. */
  83. static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
  84. {
  85. struct clk_omap_reg companion_reg, idlest_reg;
  86. u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
  87. s16 prcm_mod;
  88. int r;
  89. /* Not all modules have multiple clocks that their IDLEST depends on */
  90. if (clk->ops->find_companion) {
  91. clk->ops->find_companion(clk, &companion_reg, &other_bit);
  92. if (!(ti_clk_ll_ops->clk_readl(&companion_reg) &
  93. (1 << other_bit)))
  94. return;
  95. }
  96. clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
  97. r = ti_clk_ll_ops->cm_split_idlest_reg(&idlest_reg, &prcm_mod,
  98. &idlest_reg_id);
  99. if (r) {
  100. /* IDLEST register not in the CM module */
  101. _wait_idlest_generic(clk, &idlest_reg, (1 << idlest_bit),
  102. idlest_val, clk_hw_get_name(&clk->hw));
  103. } else {
  104. ti_clk_ll_ops->cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
  105. idlest_bit);
  106. }
  107. }
  108. /**
  109. * omap2_clk_dflt_find_companion - find companion clock to @clk
  110. * @clk: struct clk * to find the companion clock of
  111. * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
  112. * @other_bit: u8 ** to return the companion clock bit shift in
  113. *
  114. * Note: We don't need special code here for INVERT_ENABLE for the
  115. * time being since INVERT_ENABLE only applies to clocks enabled by
  116. * CM_CLKEN_PLL
  117. *
  118. * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
  119. * just a matter of XORing the bits.
  120. *
  121. * Some clocks don't have companion clocks. For example, modules with
  122. * only an interface clock (such as MAILBOXES) don't have a companion
  123. * clock. Right now, this code relies on the hardware exporting a bit
  124. * in the correct companion register that indicates that the
  125. * nonexistent 'companion clock' is active. Future patches will
  126. * associate this type of code with per-module data structures to
  127. * avoid this issue, and remove the casts. No return value.
  128. */
  129. void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
  130. struct clk_omap_reg *other_reg,
  131. u8 *other_bit)
  132. {
  133. memcpy(other_reg, &clk->enable_reg, sizeof(*other_reg));
  134. /*
  135. * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
  136. * it's just a matter of XORing the bits.
  137. */
  138. other_reg->offset ^= (CM_FCLKEN ^ CM_ICLKEN);
  139. *other_bit = clk->enable_bit;
  140. }
  141. /**
  142. * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
  143. * @clk: struct clk * to find IDLEST info for
  144. * @idlest_reg: void __iomem ** to return the CM_IDLEST va in
  145. * @idlest_bit: u8 * to return the CM_IDLEST bit shift in
  146. * @idlest_val: u8 * to return the idle status indicator
  147. *
  148. * Return the CM_IDLEST register address and bit shift corresponding
  149. * to the module that "owns" this clock. This default code assumes
  150. * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
  151. * the IDLEST register address ID corresponds to the CM_*CLKEN
  152. * register address ID (e.g., that CM_FCLKEN2 corresponds to
  153. * CM_IDLEST2). This is not true for all modules. No return value.
  154. */
  155. void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
  156. struct clk_omap_reg *idlest_reg, u8 *idlest_bit,
  157. u8 *idlest_val)
  158. {
  159. memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));
  160. idlest_reg->offset &= ~0xf0;
  161. idlest_reg->offset |= 0x20;
  162. *idlest_bit = clk->enable_bit;
  163. /*
  164. * 24xx uses 0 to indicate not ready, and 1 to indicate ready.
  165. * 34xx reverses this, just to keep us on our toes
  166. * AM35xx uses both, depending on the module.
  167. */
  168. *idlest_val = ti_clk_get_features()->cm_idlest_val;
  169. }
  170. /**
  171. * omap2_dflt_clk_enable - enable a clock in the hardware
  172. * @hw: struct clk_hw * of the clock to enable
  173. *
  174. * Enable the clock @hw in the hardware. We first call into the OMAP
  175. * clockdomain code to "enable" the corresponding clockdomain if this
  176. * is the first enabled user of the clockdomain. Then program the
  177. * hardware to enable the clock. Then wait for the IP block that uses
  178. * this clock to leave idle (if applicable). Returns the error value
  179. * from clkdm_clk_enable() if it terminated with an error, or -EINVAL
  180. * if @hw has a null clock enable_reg, or zero upon success.
  181. */
  182. int omap2_dflt_clk_enable(struct clk_hw *hw)
  183. {
  184. struct clk_hw_omap *clk;
  185. u32 v;
  186. int ret = 0;
  187. bool clkdm_control;
  188. if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL)
  189. clkdm_control = false;
  190. else
  191. clkdm_control = true;
  192. clk = to_clk_hw_omap(hw);
  193. if (clkdm_control && clk->clkdm) {
  194. ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);
  195. if (ret) {
  196. WARN(1,
  197. "%s: could not enable %s's clockdomain %s: %d\n",
  198. __func__, clk_hw_get_name(hw),
  199. clk->clkdm_name, ret);
  200. return ret;
  201. }
  202. }
  203. /* FIXME should not have INVERT_ENABLE bit here */
  204. v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);
  205. if (clk->flags & INVERT_ENABLE)
  206. v &= ~(1 << clk->enable_bit);
  207. else
  208. v |= (1 << clk->enable_bit);
  209. ti_clk_ll_ops->clk_writel(v, &clk->enable_reg);
  210. v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); /* OCP barrier */
  211. if (clk->ops && clk->ops->find_idlest)
  212. _omap2_module_wait_ready(clk);
  213. return 0;
  214. }
  215. /**
  216. * omap2_dflt_clk_disable - disable a clock in the hardware
  217. * @hw: struct clk_hw * of the clock to disable
  218. *
  219. * Disable the clock @hw in the hardware, and call into the OMAP
  220. * clockdomain code to "disable" the corresponding clockdomain if all
  221. * clocks/hwmods in that clockdomain are now disabled. No return
  222. * value.
  223. */
  224. void omap2_dflt_clk_disable(struct clk_hw *hw)
  225. {
  226. struct clk_hw_omap *clk;
  227. u32 v;
  228. clk = to_clk_hw_omap(hw);
  229. v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);
  230. if (clk->flags & INVERT_ENABLE)
  231. v |= (1 << clk->enable_bit);
  232. else
  233. v &= ~(1 << clk->enable_bit);
  234. ti_clk_ll_ops->clk_writel(v, &clk->enable_reg);
  235. /* No OCP barrier needed here since it is a disable operation */
  236. if (!(ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) &&
  237. clk->clkdm)
  238. ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);
  239. }
  240. /**
  241. * omap2_dflt_clk_is_enabled - is clock enabled in the hardware?
  242. * @hw: struct clk_hw * to check
  243. *
  244. * Return 1 if the clock represented by @hw is enabled in the
  245. * hardware, or 0 otherwise. Intended for use in the struct
  246. * clk_ops.is_enabled function pointer.
  247. */
  248. int omap2_dflt_clk_is_enabled(struct clk_hw *hw)
  249. {
  250. struct clk_hw_omap *clk = to_clk_hw_omap(hw);
  251. u32 v;
  252. v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);
  253. if (clk->flags & INVERT_ENABLE)
  254. v ^= BIT(clk->enable_bit);
  255. v &= BIT(clk->enable_bit);
  256. return v ? 1 : 0;
  257. }
  258. const struct clk_hw_omap_ops clkhwops_wait = {
  259. .find_idlest = omap2_clk_dflt_find_idlest,
  260. .find_companion = omap2_clk_dflt_find_companion,
  261. };