clk.c 14 KB

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  1. /*
  2. * TI clock support
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * Tero Kristo <t-kristo@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk.h>
  18. #include <linux/clk-provider.h>
  19. #include <linux/clkdev.h>
  20. #include <linux/clk/ti.h>
  21. #include <linux/io.h>
  22. #include <linux/of.h>
  23. #include <linux/of_address.h>
  24. #include <linux/list.h>
  25. #include <linux/regmap.h>
  26. #include <linux/memblock.h>
  27. #include <linux/device.h>
  28. #include "clock.h"
  29. #undef pr_fmt
  30. #define pr_fmt(fmt) "%s: " fmt, __func__
  31. static LIST_HEAD(clk_hw_omap_clocks);
  32. struct ti_clk_ll_ops *ti_clk_ll_ops;
  33. static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
  34. struct ti_clk_features ti_clk_features;
  35. struct clk_iomap {
  36. struct regmap *regmap;
  37. void __iomem *mem;
  38. };
  39. static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
  40. static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
  41. {
  42. struct clk_iomap *io = clk_memmaps[reg->index];
  43. if (reg->ptr)
  44. writel_relaxed(val, reg->ptr);
  45. else if (io->regmap)
  46. regmap_write(io->regmap, reg->offset, val);
  47. else
  48. writel_relaxed(val, io->mem + reg->offset);
  49. }
  50. static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
  51. {
  52. u32 v;
  53. v = readl_relaxed(ptr);
  54. v &= ~mask;
  55. v |= val;
  56. writel_relaxed(v, ptr);
  57. }
  58. static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
  59. {
  60. struct clk_iomap *io = clk_memmaps[reg->index];
  61. if (reg->ptr) {
  62. _clk_rmw(val, mask, reg->ptr);
  63. } else if (io->regmap) {
  64. regmap_update_bits(io->regmap, reg->offset, mask, val);
  65. } else {
  66. _clk_rmw(val, mask, io->mem + reg->offset);
  67. }
  68. }
  69. static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
  70. {
  71. u32 val;
  72. struct clk_iomap *io = clk_memmaps[reg->index];
  73. if (reg->ptr)
  74. val = readl_relaxed(reg->ptr);
  75. else if (io->regmap)
  76. regmap_read(io->regmap, reg->offset, &val);
  77. else
  78. val = readl_relaxed(io->mem + reg->offset);
  79. return val;
  80. }
  81. /**
  82. * ti_clk_setup_ll_ops - setup low level clock operations
  83. * @ops: low level clock ops descriptor
  84. *
  85. * Sets up low level clock operations for TI clock driver. This is used
  86. * to provide various callbacks for the clock driver towards platform
  87. * specific code. Returns 0 on success, -EBUSY if ll_ops have been
  88. * registered already.
  89. */
  90. int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
  91. {
  92. if (ti_clk_ll_ops) {
  93. pr_err("Attempt to register ll_ops multiple times.\n");
  94. return -EBUSY;
  95. }
  96. ti_clk_ll_ops = ops;
  97. ops->clk_readl = clk_memmap_readl;
  98. ops->clk_writel = clk_memmap_writel;
  99. ops->clk_rmw = clk_memmap_rmw;
  100. return 0;
  101. }
  102. /**
  103. * ti_dt_clocks_register - register DT alias clocks during boot
  104. * @oclks: list of clocks to register
  105. *
  106. * Register alias or non-standard DT clock entries during boot. By
  107. * default, DT clocks are found based on their node name. If any
  108. * additional con-id / dev-id -> clock mapping is required, use this
  109. * function to list these.
  110. */
  111. void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
  112. {
  113. struct ti_dt_clk *c;
  114. struct device_node *node, *parent, *child;
  115. struct clk *clk;
  116. struct of_phandle_args clkspec;
  117. char buf[64];
  118. char *ptr;
  119. char *tags[2];
  120. int i;
  121. int num_args;
  122. int ret;
  123. static bool clkctrl_nodes_missing;
  124. static bool has_clkctrl_data;
  125. static bool compat_mode;
  126. compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
  127. for (c = oclks; c->node_name != NULL; c++) {
  128. strcpy(buf, c->node_name);
  129. ptr = buf;
  130. for (i = 0; i < 2; i++)
  131. tags[i] = NULL;
  132. num_args = 0;
  133. while (*ptr) {
  134. if (*ptr == ':') {
  135. if (num_args >= 2) {
  136. pr_warn("Bad number of tags on %s\n",
  137. c->node_name);
  138. return;
  139. }
  140. tags[num_args++] = ptr + 1;
  141. *ptr = 0;
  142. }
  143. ptr++;
  144. }
  145. if (num_args && clkctrl_nodes_missing)
  146. continue;
  147. node = of_find_node_by_name(NULL, buf);
  148. if (num_args && compat_mode) {
  149. parent = node;
  150. child = of_get_child_by_name(parent, "clock");
  151. if (!child)
  152. child = of_get_child_by_name(parent, "clk");
  153. if (child) {
  154. of_node_put(parent);
  155. node = child;
  156. }
  157. }
  158. clkspec.np = node;
  159. clkspec.args_count = num_args;
  160. for (i = 0; i < num_args; i++) {
  161. ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
  162. if (ret) {
  163. pr_warn("Bad tag in %s at %d: %s\n",
  164. c->node_name, i, tags[i]);
  165. of_node_put(node);
  166. return;
  167. }
  168. }
  169. clk = of_clk_get_from_provider(&clkspec);
  170. of_node_put(node);
  171. if (!IS_ERR(clk)) {
  172. c->lk.clk = clk;
  173. clkdev_add(&c->lk);
  174. } else {
  175. if (num_args && !has_clkctrl_data) {
  176. struct device_node *np;
  177. np = of_find_compatible_node(NULL, NULL,
  178. "ti,clkctrl");
  179. if (np) {
  180. has_clkctrl_data = true;
  181. of_node_put(np);
  182. } else {
  183. clkctrl_nodes_missing = true;
  184. pr_warn("missing clkctrl nodes, please update your dts.\n");
  185. continue;
  186. }
  187. }
  188. pr_warn("failed to lookup clock node %s, ret=%ld\n",
  189. c->node_name, PTR_ERR(clk));
  190. }
  191. }
  192. }
  193. struct clk_init_item {
  194. struct device_node *node;
  195. void *user;
  196. ti_of_clk_init_cb_t func;
  197. struct list_head link;
  198. };
  199. static LIST_HEAD(retry_list);
  200. /**
  201. * ti_clk_retry_init - retries a failed clock init at later phase
  202. * @node: device not for the clock
  203. * @user: user data pointer
  204. * @func: init function to be called for the clock
  205. *
  206. * Adds a failed clock init to the retry list. The retry list is parsed
  207. * once all the other clocks have been initialized.
  208. */
  209. int __init ti_clk_retry_init(struct device_node *node, void *user,
  210. ti_of_clk_init_cb_t func)
  211. {
  212. struct clk_init_item *retry;
  213. pr_debug("%pOFn: adding to retry list...\n", node);
  214. retry = kzalloc(sizeof(*retry), GFP_KERNEL);
  215. if (!retry)
  216. return -ENOMEM;
  217. retry->node = node;
  218. retry->func = func;
  219. retry->user = user;
  220. list_add(&retry->link, &retry_list);
  221. return 0;
  222. }
  223. /**
  224. * ti_clk_get_reg_addr - get register address for a clock register
  225. * @node: device node for the clock
  226. * @index: register index from the clock node
  227. * @reg: pointer to target register struct
  228. *
  229. * Builds clock register address from device tree information, and returns
  230. * the data via the provided output pointer @reg. Returns 0 on success,
  231. * negative error value on failure.
  232. */
  233. int ti_clk_get_reg_addr(struct device_node *node, int index,
  234. struct clk_omap_reg *reg)
  235. {
  236. u32 val;
  237. int i;
  238. for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
  239. if (clocks_node_ptr[i] == node->parent)
  240. break;
  241. }
  242. if (i == CLK_MAX_MEMMAPS) {
  243. pr_err("clk-provider not found for %pOFn!\n", node);
  244. return -ENOENT;
  245. }
  246. reg->index = i;
  247. if (of_property_read_u32_index(node, "reg", index, &val)) {
  248. pr_err("%pOFn must have reg[%d]!\n", node, index);
  249. return -EINVAL;
  250. }
  251. reg->offset = val;
  252. reg->ptr = NULL;
  253. return 0;
  254. }
  255. void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
  256. {
  257. u32 latch;
  258. if (shift < 0)
  259. return;
  260. latch = 1 << shift;
  261. ti_clk_ll_ops->clk_rmw(latch, latch, reg);
  262. ti_clk_ll_ops->clk_rmw(0, latch, reg);
  263. ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
  264. }
  265. /**
  266. * omap2_clk_provider_init - init master clock provider
  267. * @parent: master node
  268. * @index: internal index for clk_reg_ops
  269. * @syscon: syscon regmap pointer for accessing clock registers
  270. * @mem: iomem pointer for the clock provider memory area, only used if
  271. * syscon is not provided
  272. *
  273. * Initializes a master clock IP block. This basically sets up the
  274. * mapping from clocks node to the memory map index. All the clocks
  275. * are then initialized through the common of_clk_init call, and the
  276. * clocks will access their memory maps based on the node layout.
  277. * Returns 0 in success.
  278. */
  279. int __init omap2_clk_provider_init(struct device_node *parent, int index,
  280. struct regmap *syscon, void __iomem *mem)
  281. {
  282. struct device_node *clocks;
  283. struct clk_iomap *io;
  284. /* get clocks for this parent */
  285. clocks = of_get_child_by_name(parent, "clocks");
  286. if (!clocks) {
  287. pr_err("%pOFn missing 'clocks' child node.\n", parent);
  288. return -EINVAL;
  289. }
  290. /* add clocks node info */
  291. clocks_node_ptr[index] = clocks;
  292. io = kzalloc(sizeof(*io), GFP_KERNEL);
  293. if (!io)
  294. return -ENOMEM;
  295. io->regmap = syscon;
  296. io->mem = mem;
  297. clk_memmaps[index] = io;
  298. return 0;
  299. }
  300. /**
  301. * omap2_clk_legacy_provider_init - initialize a legacy clock provider
  302. * @index: index for the clock provider
  303. * @mem: iomem pointer for the clock provider memory area
  304. *
  305. * Initializes a legacy clock provider memory mapping.
  306. */
  307. void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
  308. {
  309. struct clk_iomap *io;
  310. io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);
  311. if (!io)
  312. panic("%s: Failed to allocate %zu bytes\n", __func__,
  313. sizeof(*io));
  314. io->mem = mem;
  315. clk_memmaps[index] = io;
  316. }
  317. /**
  318. * ti_dt_clk_init_retry_clks - init clocks from the retry list
  319. *
  320. * Initializes any clocks that have failed to initialize before,
  321. * reasons being missing parent node(s) during earlier init. This
  322. * typically happens only for DPLLs which need to have both of their
  323. * parent clocks ready during init.
  324. */
  325. void ti_dt_clk_init_retry_clks(void)
  326. {
  327. struct clk_init_item *retry;
  328. struct clk_init_item *tmp;
  329. int retries = 5;
  330. while (!list_empty(&retry_list) && retries) {
  331. list_for_each_entry_safe(retry, tmp, &retry_list, link) {
  332. pr_debug("retry-init: %pOFn\n", retry->node);
  333. retry->func(retry->user, retry->node);
  334. list_del(&retry->link);
  335. kfree(retry);
  336. }
  337. retries--;
  338. }
  339. }
  340. static const struct of_device_id simple_clk_match_table[] __initconst = {
  341. { .compatible = "fixed-clock" },
  342. { .compatible = "fixed-factor-clock" },
  343. { }
  344. };
  345. /**
  346. * ti_clk_add_aliases - setup clock aliases
  347. *
  348. * Sets up any missing clock aliases. No return value.
  349. */
  350. void __init ti_clk_add_aliases(void)
  351. {
  352. struct device_node *np;
  353. struct clk *clk;
  354. for_each_matching_node(np, simple_clk_match_table) {
  355. struct of_phandle_args clkspec;
  356. clkspec.np = np;
  357. clk = of_clk_get_from_provider(&clkspec);
  358. ti_clk_add_alias(NULL, clk, np->name);
  359. }
  360. }
  361. /**
  362. * ti_clk_setup_features - setup clock features flags
  363. * @features: features definition to use
  364. *
  365. * Initializes the clock driver features flags based on platform
  366. * provided data. No return value.
  367. */
  368. void __init ti_clk_setup_features(struct ti_clk_features *features)
  369. {
  370. memcpy(&ti_clk_features, features, sizeof(*features));
  371. }
  372. /**
  373. * ti_clk_get_features - get clock driver features flags
  374. *
  375. * Get TI clock driver features description. Returns a pointer
  376. * to the current feature setup.
  377. */
  378. const struct ti_clk_features *ti_clk_get_features(void)
  379. {
  380. return &ti_clk_features;
  381. }
  382. /**
  383. * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
  384. * @clk_names: ptr to an array of strings of clock names to enable
  385. * @num_clocks: number of clock names in @clk_names
  386. *
  387. * Prepare and enable a list of clocks, named by @clk_names. No
  388. * return value. XXX Deprecated; only needed until these clocks are
  389. * properly claimed and enabled by the drivers or core code that uses
  390. * them. XXX What code disables & calls clk_put on these clocks?
  391. */
  392. void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
  393. {
  394. struct clk *init_clk;
  395. int i;
  396. for (i = 0; i < num_clocks; i++) {
  397. init_clk = clk_get(NULL, clk_names[i]);
  398. if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
  399. clk_names[i]))
  400. continue;
  401. clk_prepare_enable(init_clk);
  402. }
  403. }
  404. /**
  405. * ti_clk_add_alias - add a clock alias for a TI clock
  406. * @dev: device alias for this clock
  407. * @clk: clock handle to create alias for
  408. * @con: connection ID for this clock
  409. *
  410. * Creates a clock alias for a TI clock. Allocates the clock lookup entry
  411. * and assigns the data to it. Returns 0 if successful, negative error
  412. * value otherwise.
  413. */
  414. int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
  415. {
  416. struct clk_lookup *cl;
  417. if (!clk)
  418. return 0;
  419. if (IS_ERR(clk))
  420. return PTR_ERR(clk);
  421. cl = kzalloc(sizeof(*cl), GFP_KERNEL);
  422. if (!cl)
  423. return -ENOMEM;
  424. if (dev)
  425. cl->dev_id = dev_name(dev);
  426. cl->con_id = con;
  427. cl->clk = clk;
  428. clkdev_add(cl);
  429. return 0;
  430. }
  431. /**
  432. * ti_clk_register - register a TI clock to the common clock framework
  433. * @dev: device for this clock
  434. * @hw: hardware clock handle
  435. * @con: connection ID for this clock
  436. *
  437. * Registers a TI clock to the common clock framework, and adds a clock
  438. * alias for it. Returns a handle to the registered clock if successful,
  439. * ERR_PTR value in failure.
  440. */
  441. struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
  442. const char *con)
  443. {
  444. struct clk *clk;
  445. int ret;
  446. clk = clk_register(dev, hw);
  447. if (IS_ERR(clk))
  448. return clk;
  449. ret = ti_clk_add_alias(dev, clk, con);
  450. if (ret) {
  451. clk_unregister(clk);
  452. return ERR_PTR(ret);
  453. }
  454. return clk;
  455. }
  456. /**
  457. * ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
  458. * @dev: device for this clock
  459. * @hw: hardware clock handle
  460. * @con: connection ID for this clock
  461. *
  462. * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias
  463. * for it, and adds the list to the available clk_hw_omap type clocks.
  464. * Returns a handle to the registered clock if successful, ERR_PTR value
  465. * in failure.
  466. */
  467. struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw,
  468. const char *con)
  469. {
  470. struct clk *clk;
  471. struct clk_hw_omap *oclk;
  472. clk = ti_clk_register(dev, hw, con);
  473. if (IS_ERR(clk))
  474. return clk;
  475. oclk = to_clk_hw_omap(hw);
  476. list_add(&oclk->node, &clk_hw_omap_clocks);
  477. return clk;
  478. }
  479. /**
  480. * omap2_clk_for_each - call function for each registered clk_hw_omap
  481. * @fn: pointer to a callback function
  482. *
  483. * Call @fn for each registered clk_hw_omap, passing @hw to each
  484. * function. @fn must return 0 for success or any other value for
  485. * failure. If @fn returns non-zero, the iteration across clocks
  486. * will stop and the non-zero return value will be passed to the
  487. * caller of omap2_clk_for_each().
  488. */
  489. int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))
  490. {
  491. int ret;
  492. struct clk_hw_omap *hw;
  493. list_for_each_entry(hw, &clk_hw_omap_clocks, node) {
  494. ret = (*fn)(hw);
  495. if (ret)
  496. break;
  497. }
  498. return ret;
  499. }
  500. /**
  501. * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock
  502. * @hw: clk_hw to check if it is an omap clock or not
  503. *
  504. * Checks if the provided clk_hw is OMAP clock or not. Returns true if
  505. * it is, false otherwise.
  506. */
  507. bool omap2_clk_is_hw_omap(struct clk_hw *hw)
  508. {
  509. struct clk_hw_omap *oclk;
  510. list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {
  511. if (&oclk->hw == hw)
  512. return true;
  513. }
  514. return false;
  515. }