clk-2xxx.c 9.0 KB

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  1. /*
  2. * OMAP2 Clock init
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc
  5. * Tero Kristo (t-kristo@ti.com)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation version 2.
  10. *
  11. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12. * kind, whether express or implied; without even the implied warranty
  13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/clk.h>
  19. #include <linux/clk/ti.h>
  20. #include "clock.h"
  21. static struct ti_dt_clk omap2xxx_clks[] = {
  22. DT_CLK(NULL, "func_32k_ck", "func_32k_ck"),
  23. DT_CLK(NULL, "secure_32k_ck", "secure_32k_ck"),
  24. DT_CLK(NULL, "virt_12m_ck", "virt_12m_ck"),
  25. DT_CLK(NULL, "virt_13m_ck", "virt_13m_ck"),
  26. DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"),
  27. DT_CLK(NULL, "virt_26m_ck", "virt_26m_ck"),
  28. DT_CLK(NULL, "aplls_clkin_ck", "aplls_clkin_ck"),
  29. DT_CLK(NULL, "aplls_clkin_x2_ck", "aplls_clkin_x2_ck"),
  30. DT_CLK(NULL, "osc_ck", "osc_ck"),
  31. DT_CLK(NULL, "sys_ck", "sys_ck"),
  32. DT_CLK(NULL, "alt_ck", "alt_ck"),
  33. DT_CLK(NULL, "mcbsp_clks", "mcbsp_clks"),
  34. DT_CLK(NULL, "dpll_ck", "dpll_ck"),
  35. DT_CLK(NULL, "apll96_ck", "apll96_ck"),
  36. DT_CLK(NULL, "apll54_ck", "apll54_ck"),
  37. DT_CLK(NULL, "func_54m_ck", "func_54m_ck"),
  38. DT_CLK(NULL, "core_ck", "core_ck"),
  39. DT_CLK(NULL, "func_96m_ck", "func_96m_ck"),
  40. DT_CLK(NULL, "func_48m_ck", "func_48m_ck"),
  41. DT_CLK(NULL, "func_12m_ck", "func_12m_ck"),
  42. DT_CLK(NULL, "sys_clkout_src", "sys_clkout_src"),
  43. DT_CLK(NULL, "sys_clkout", "sys_clkout"),
  44. DT_CLK(NULL, "emul_ck", "emul_ck"),
  45. DT_CLK(NULL, "mpu_ck", "mpu_ck"),
  46. DT_CLK(NULL, "dsp_fck", "dsp_fck"),
  47. DT_CLK(NULL, "gfx_3d_fck", "gfx_3d_fck"),
  48. DT_CLK(NULL, "gfx_2d_fck", "gfx_2d_fck"),
  49. DT_CLK(NULL, "gfx_ick", "gfx_ick"),
  50. DT_CLK("omapdss_dss", "ick", "dss_ick"),
  51. DT_CLK(NULL, "dss_ick", "dss_ick"),
  52. DT_CLK(NULL, "dss1_fck", "dss1_fck"),
  53. DT_CLK(NULL, "dss2_fck", "dss2_fck"),
  54. DT_CLK(NULL, "dss_54m_fck", "dss_54m_fck"),
  55. DT_CLK(NULL, "core_l3_ck", "core_l3_ck"),
  56. DT_CLK(NULL, "ssi_fck", "ssi_ssr_sst_fck"),
  57. DT_CLK(NULL, "usb_l4_ick", "usb_l4_ick"),
  58. DT_CLK(NULL, "l4_ck", "l4_ck"),
  59. DT_CLK(NULL, "ssi_l4_ick", "ssi_l4_ick"),
  60. DT_CLK(NULL, "gpt1_ick", "gpt1_ick"),
  61. DT_CLK(NULL, "gpt1_fck", "gpt1_fck"),
  62. DT_CLK(NULL, "gpt2_ick", "gpt2_ick"),
  63. DT_CLK(NULL, "gpt2_fck", "gpt2_fck"),
  64. DT_CLK(NULL, "gpt3_ick", "gpt3_ick"),
  65. DT_CLK(NULL, "gpt3_fck", "gpt3_fck"),
  66. DT_CLK(NULL, "gpt4_ick", "gpt4_ick"),
  67. DT_CLK(NULL, "gpt4_fck", "gpt4_fck"),
  68. DT_CLK(NULL, "gpt5_ick", "gpt5_ick"),
  69. DT_CLK(NULL, "gpt5_fck", "gpt5_fck"),
  70. DT_CLK(NULL, "gpt6_ick", "gpt6_ick"),
  71. DT_CLK(NULL, "gpt6_fck", "gpt6_fck"),
  72. DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
  73. DT_CLK(NULL, "gpt7_fck", "gpt7_fck"),
  74. DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
  75. DT_CLK(NULL, "gpt8_fck", "gpt8_fck"),
  76. DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
  77. DT_CLK(NULL, "gpt9_fck", "gpt9_fck"),
  78. DT_CLK(NULL, "gpt10_ick", "gpt10_ick"),
  79. DT_CLK(NULL, "gpt10_fck", "gpt10_fck"),
  80. DT_CLK(NULL, "gpt11_ick", "gpt11_ick"),
  81. DT_CLK(NULL, "gpt11_fck", "gpt11_fck"),
  82. DT_CLK(NULL, "gpt12_ick", "gpt12_ick"),
  83. DT_CLK(NULL, "gpt12_fck", "gpt12_fck"),
  84. DT_CLK("omap-mcbsp.1", "ick", "mcbsp1_ick"),
  85. DT_CLK(NULL, "mcbsp1_ick", "mcbsp1_ick"),
  86. DT_CLK(NULL, "mcbsp1_fck", "mcbsp1_fck"),
  87. DT_CLK("omap-mcbsp.2", "ick", "mcbsp2_ick"),
  88. DT_CLK(NULL, "mcbsp2_ick", "mcbsp2_ick"),
  89. DT_CLK(NULL, "mcbsp2_fck", "mcbsp2_fck"),
  90. DT_CLK("omap2_mcspi.1", "ick", "mcspi1_ick"),
  91. DT_CLK(NULL, "mcspi1_ick", "mcspi1_ick"),
  92. DT_CLK(NULL, "mcspi1_fck", "mcspi1_fck"),
  93. DT_CLK("omap2_mcspi.2", "ick", "mcspi2_ick"),
  94. DT_CLK(NULL, "mcspi2_ick", "mcspi2_ick"),
  95. DT_CLK(NULL, "mcspi2_fck", "mcspi2_fck"),
  96. DT_CLK(NULL, "uart1_ick", "uart1_ick"),
  97. DT_CLK(NULL, "uart1_fck", "uart1_fck"),
  98. DT_CLK(NULL, "uart2_ick", "uart2_ick"),
  99. DT_CLK(NULL, "uart2_fck", "uart2_fck"),
  100. DT_CLK(NULL, "uart3_ick", "uart3_ick"),
  101. DT_CLK(NULL, "uart3_fck", "uart3_fck"),
  102. DT_CLK(NULL, "gpios_ick", "gpios_ick"),
  103. DT_CLK(NULL, "gpios_fck", "gpios_fck"),
  104. DT_CLK("omap_wdt", "ick", "mpu_wdt_ick"),
  105. DT_CLK(NULL, "mpu_wdt_ick", "mpu_wdt_ick"),
  106. DT_CLK(NULL, "mpu_wdt_fck", "mpu_wdt_fck"),
  107. DT_CLK(NULL, "sync_32k_ick", "sync_32k_ick"),
  108. DT_CLK(NULL, "wdt1_ick", "wdt1_ick"),
  109. DT_CLK(NULL, "omapctrl_ick", "omapctrl_ick"),
  110. DT_CLK("omap24xxcam", "fck", "cam_fck"),
  111. DT_CLK(NULL, "cam_fck", "cam_fck"),
  112. DT_CLK("omap24xxcam", "ick", "cam_ick"),
  113. DT_CLK(NULL, "cam_ick", "cam_ick"),
  114. DT_CLK(NULL, "mailboxes_ick", "mailboxes_ick"),
  115. DT_CLK(NULL, "wdt4_ick", "wdt4_ick"),
  116. DT_CLK(NULL, "wdt4_fck", "wdt4_fck"),
  117. DT_CLK(NULL, "mspro_ick", "mspro_ick"),
  118. DT_CLK(NULL, "mspro_fck", "mspro_fck"),
  119. DT_CLK(NULL, "fac_ick", "fac_ick"),
  120. DT_CLK(NULL, "fac_fck", "fac_fck"),
  121. DT_CLK("omap_hdq.0", "ick", "hdq_ick"),
  122. DT_CLK(NULL, "hdq_ick", "hdq_ick"),
  123. DT_CLK("omap_hdq.0", "fck", "hdq_fck"),
  124. DT_CLK(NULL, "hdq_fck", "hdq_fck"),
  125. DT_CLK("omap_i2c.1", "ick", "i2c1_ick"),
  126. DT_CLK(NULL, "i2c1_ick", "i2c1_ick"),
  127. DT_CLK("omap_i2c.2", "ick", "i2c2_ick"),
  128. DT_CLK(NULL, "i2c2_ick", "i2c2_ick"),
  129. DT_CLK(NULL, "gpmc_fck", "gpmc_fck"),
  130. DT_CLK(NULL, "sdma_fck", "sdma_fck"),
  131. DT_CLK(NULL, "sdma_ick", "sdma_ick"),
  132. DT_CLK(NULL, "sdrc_ick", "sdrc_ick"),
  133. DT_CLK(NULL, "des_ick", "des_ick"),
  134. DT_CLK("omap-sham", "ick", "sha_ick"),
  135. DT_CLK(NULL, "sha_ick", "sha_ick"),
  136. DT_CLK("omap_rng", "ick", "rng_ick"),
  137. DT_CLK(NULL, "rng_ick", "rng_ick"),
  138. DT_CLK("omap-aes", "ick", "aes_ick"),
  139. DT_CLK(NULL, "aes_ick", "aes_ick"),
  140. DT_CLK(NULL, "pka_ick", "pka_ick"),
  141. DT_CLK(NULL, "usb_fck", "usb_fck"),
  142. DT_CLK(NULL, "timer_32k_ck", "func_32k_ck"),
  143. DT_CLK(NULL, "timer_sys_ck", "sys_ck"),
  144. DT_CLK(NULL, "timer_ext_ck", "alt_ck"),
  145. { .node_name = NULL },
  146. };
  147. static struct ti_dt_clk omap2420_clks[] = {
  148. DT_CLK(NULL, "sys_clkout2_src", "sys_clkout2_src"),
  149. DT_CLK(NULL, "sys_clkout2", "sys_clkout2"),
  150. DT_CLK(NULL, "dsp_ick", "dsp_ick"),
  151. DT_CLK(NULL, "iva1_ifck", "iva1_ifck"),
  152. DT_CLK(NULL, "iva1_mpu_int_ifck", "iva1_mpu_int_ifck"),
  153. DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
  154. DT_CLK(NULL, "wdt3_fck", "wdt3_fck"),
  155. DT_CLK("mmci-omap.0", "ick", "mmc_ick"),
  156. DT_CLK(NULL, "mmc_ick", "mmc_ick"),
  157. DT_CLK("mmci-omap.0", "fck", "mmc_fck"),
  158. DT_CLK(NULL, "mmc_fck", "mmc_fck"),
  159. DT_CLK(NULL, "eac_ick", "eac_ick"),
  160. DT_CLK(NULL, "eac_fck", "eac_fck"),
  161. DT_CLK(NULL, "i2c1_fck", "i2c1_fck"),
  162. DT_CLK(NULL, "i2c2_fck", "i2c2_fck"),
  163. DT_CLK(NULL, "vlynq_ick", "vlynq_ick"),
  164. DT_CLK(NULL, "vlynq_fck", "vlynq_fck"),
  165. DT_CLK("musb-hdrc", "fck", "osc_ck"),
  166. { .node_name = NULL },
  167. };
  168. static struct ti_dt_clk omap2430_clks[] = {
  169. DT_CLK("twl", "fck", "osc_ck"),
  170. DT_CLK(NULL, "iva2_1_ick", "iva2_1_ick"),
  171. DT_CLK(NULL, "mdm_ick", "mdm_ick"),
  172. DT_CLK(NULL, "mdm_osc_ck", "mdm_osc_ck"),
  173. DT_CLK("omap-mcbsp.3", "ick", "mcbsp3_ick"),
  174. DT_CLK(NULL, "mcbsp3_ick", "mcbsp3_ick"),
  175. DT_CLK(NULL, "mcbsp3_fck", "mcbsp3_fck"),
  176. DT_CLK("omap-mcbsp.4", "ick", "mcbsp4_ick"),
  177. DT_CLK(NULL, "mcbsp4_ick", "mcbsp4_ick"),
  178. DT_CLK(NULL, "mcbsp4_fck", "mcbsp4_fck"),
  179. DT_CLK("omap-mcbsp.5", "ick", "mcbsp5_ick"),
  180. DT_CLK(NULL, "mcbsp5_ick", "mcbsp5_ick"),
  181. DT_CLK(NULL, "mcbsp5_fck", "mcbsp5_fck"),
  182. DT_CLK("omap2_mcspi.3", "ick", "mcspi3_ick"),
  183. DT_CLK(NULL, "mcspi3_ick", "mcspi3_ick"),
  184. DT_CLK(NULL, "mcspi3_fck", "mcspi3_fck"),
  185. DT_CLK(NULL, "icr_ick", "icr_ick"),
  186. DT_CLK(NULL, "i2chs1_fck", "i2chs1_fck"),
  187. DT_CLK(NULL, "i2chs2_fck", "i2chs2_fck"),
  188. DT_CLK("musb-omap2430", "ick", "usbhs_ick"),
  189. DT_CLK(NULL, "usbhs_ick", "usbhs_ick"),
  190. DT_CLK("omap_hsmmc.0", "ick", "mmchs1_ick"),
  191. DT_CLK(NULL, "mmchs1_ick", "mmchs1_ick"),
  192. DT_CLK(NULL, "mmchs1_fck", "mmchs1_fck"),
  193. DT_CLK("omap_hsmmc.1", "ick", "mmchs2_ick"),
  194. DT_CLK(NULL, "mmchs2_ick", "mmchs2_ick"),
  195. DT_CLK(NULL, "mmchs2_fck", "mmchs2_fck"),
  196. DT_CLK(NULL, "gpio5_ick", "gpio5_ick"),
  197. DT_CLK(NULL, "gpio5_fck", "gpio5_fck"),
  198. DT_CLK(NULL, "mdm_intc_ick", "mdm_intc_ick"),
  199. DT_CLK("omap_hsmmc.0", "mmchsdb_fck", "mmchsdb1_fck"),
  200. DT_CLK(NULL, "mmchsdb1_fck", "mmchsdb1_fck"),
  201. DT_CLK("omap_hsmmc.1", "mmchsdb_fck", "mmchsdb2_fck"),
  202. DT_CLK(NULL, "mmchsdb2_fck", "mmchsdb2_fck"),
  203. { .node_name = NULL },
  204. };
  205. static const char *enable_init_clks[] = {
  206. "apll96_ck",
  207. "apll54_ck",
  208. "sync_32k_ick",
  209. "omapctrl_ick",
  210. "gpmc_fck",
  211. "sdrc_ick",
  212. };
  213. enum {
  214. OMAP2_SOC_OMAP2420,
  215. OMAP2_SOC_OMAP2430,
  216. };
  217. static int __init omap2xxx_dt_clk_init(int soc_type)
  218. {
  219. ti_dt_clocks_register(omap2xxx_clks);
  220. if (soc_type == OMAP2_SOC_OMAP2420)
  221. ti_dt_clocks_register(omap2420_clks);
  222. else
  223. ti_dt_clocks_register(omap2430_clks);
  224. omap2xxx_clkt_vps_init();
  225. omap2_clk_disable_autoidle_all();
  226. omap2_clk_enable_init_clocks(enable_init_clks,
  227. ARRAY_SIZE(enable_init_clks));
  228. pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
  229. (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000),
  230. (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10,
  231. (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000),
  232. (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000));
  233. return 0;
  234. }
  235. int __init omap2420_dt_clk_init(void)
  236. {
  237. return omap2xxx_dt_clk_init(OMAP2_SOC_OMAP2420);
  238. }
  239. int __init omap2430_dt_clk_init(void)
  240. {
  241. return omap2xxx_dt_clk_init(OMAP2_SOC_OMAP2430);
  242. }