clk-moxart.c 2.4 KB

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  1. /*
  2. * MOXA ART SoCs clock driver.
  3. *
  4. * Copyright (C) 2013 Jonas Jensen
  5. *
  6. * Jonas Jensen <jonas.jensen@gmail.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clk-provider.h>
  14. #include <linux/io.h>
  15. #include <linux/of_address.h>
  16. #include <linux/clkdev.h>
  17. static void __init moxart_of_pll_clk_init(struct device_node *node)
  18. {
  19. void __iomem *base;
  20. struct clk_hw *hw;
  21. struct clk *ref_clk;
  22. unsigned int mul;
  23. const char *name = node->name;
  24. const char *parent_name;
  25. of_property_read_string(node, "clock-output-names", &name);
  26. parent_name = of_clk_get_parent_name(node, 0);
  27. base = of_iomap(node, 0);
  28. if (!base) {
  29. pr_err("%pOF: of_iomap failed\n", node);
  30. return;
  31. }
  32. mul = readl(base + 0x30) >> 3 & 0x3f;
  33. iounmap(base);
  34. ref_clk = of_clk_get(node, 0);
  35. if (IS_ERR(ref_clk)) {
  36. pr_err("%pOF: of_clk_get failed\n", node);
  37. return;
  38. }
  39. hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
  40. if (IS_ERR(hw)) {
  41. pr_err("%pOF: failed to register clock\n", node);
  42. return;
  43. }
  44. clk_hw_register_clkdev(hw, NULL, name);
  45. of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
  46. }
  47. CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
  48. moxart_of_pll_clk_init);
  49. static void __init moxart_of_apb_clk_init(struct device_node *node)
  50. {
  51. void __iomem *base;
  52. struct clk_hw *hw;
  53. struct clk *pll_clk;
  54. unsigned int div, val;
  55. unsigned int div_idx[] = { 2, 3, 4, 6, 8};
  56. const char *name = node->name;
  57. const char *parent_name;
  58. of_property_read_string(node, "clock-output-names", &name);
  59. parent_name = of_clk_get_parent_name(node, 0);
  60. base = of_iomap(node, 0);
  61. if (!base) {
  62. pr_err("%pOF: of_iomap failed\n", node);
  63. return;
  64. }
  65. val = readl(base + 0xc) >> 4 & 0x7;
  66. iounmap(base);
  67. if (val > 4)
  68. val = 0;
  69. div = div_idx[val] * 2;
  70. pll_clk = of_clk_get(node, 0);
  71. if (IS_ERR(pll_clk)) {
  72. pr_err("%pOF: of_clk_get failed\n", node);
  73. return;
  74. }
  75. hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
  76. if (IS_ERR(hw)) {
  77. pr_err("%pOF: failed to register clock\n", node);
  78. return;
  79. }
  80. clk_hw_register_clkdev(hw, NULL, name);
  81. of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
  82. }
  83. CLK_OF_DECLARE(moxart_apb_clock, "moxa,moxart-apb-clock",
  84. moxart_of_apb_clk_init);