nwflash.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Flash memory interface rev.5 driver for the Intel
  4. * Flash chips used on the NetWinder.
  5. *
  6. * 20/08/2000 RMK use __ioremap to map flash into virtual memory
  7. * make a few more places use "volatile"
  8. * 22/05/2001 RMK - Lock read against write
  9. * - merge printk level changes (with mods) from Alan Cox.
  10. * - use *ppos as the file position, not file->f_pos.
  11. * - fix check for out of range pos and r/w size
  12. *
  13. * Please note that we are tampering with the only flash chip in the
  14. * machine, which contains the bootup code. We therefore have the
  15. * power to convert these machines into doorstops...
  16. */
  17. #include <linux/module.h>
  18. #include <linux/types.h>
  19. #include <linux/fs.h>
  20. #include <linux/errno.h>
  21. #include <linux/mm.h>
  22. #include <linux/delay.h>
  23. #include <linux/proc_fs.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/rwsem.h>
  27. #include <linux/init.h>
  28. #include <linux/mutex.h>
  29. #include <linux/jiffies.h>
  30. #include <asm/hardware/dec21285.h>
  31. #include <asm/io.h>
  32. #include <asm/mach-types.h>
  33. #include <linux/uaccess.h>
  34. /*****************************************************************************/
  35. #include <asm/nwflash.h>
  36. #define NWFLASH_VERSION "6.4"
  37. static DEFINE_MUTEX(flash_mutex);
  38. static void kick_open(void);
  39. static int get_flash_id(void);
  40. static int erase_block(int nBlock);
  41. static int write_block(unsigned long p, const char __user *buf, int count);
  42. #define KFLASH_SIZE 1024*1024 //1 Meg
  43. #define KFLASH_SIZE4 4*1024*1024 //4 Meg
  44. #define KFLASH_ID 0x89A6 //Intel flash
  45. #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
  46. static bool flashdebug; //if set - we will display progress msgs
  47. static int gbWriteEnable;
  48. static int gbWriteBase64Enable;
  49. static volatile unsigned char *FLASH_BASE;
  50. static int gbFlashSize = KFLASH_SIZE;
  51. static DEFINE_MUTEX(nwflash_mutex);
  52. static int get_flash_id(void)
  53. {
  54. volatile unsigned int c1, c2;
  55. /*
  56. * try to get flash chip ID
  57. */
  58. kick_open();
  59. c2 = inb(0x80);
  60. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
  61. udelay(15);
  62. c1 = *(volatile unsigned char *) FLASH_BASE;
  63. c2 = inb(0x80);
  64. /*
  65. * on 4 Meg flash the second byte is actually at offset 2...
  66. */
  67. if (c1 == 0xB0)
  68. c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
  69. else
  70. c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
  71. c2 += (c1 << 8);
  72. /*
  73. * set it back to read mode
  74. */
  75. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  76. if (c2 == KFLASH_ID4)
  77. gbFlashSize = KFLASH_SIZE4;
  78. return c2;
  79. }
  80. static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
  81. {
  82. mutex_lock(&flash_mutex);
  83. switch (cmd) {
  84. case CMD_WRITE_DISABLE:
  85. gbWriteBase64Enable = 0;
  86. gbWriteEnable = 0;
  87. break;
  88. case CMD_WRITE_ENABLE:
  89. gbWriteEnable = 1;
  90. break;
  91. case CMD_WRITE_BASE64K_ENABLE:
  92. gbWriteBase64Enable = 1;
  93. break;
  94. default:
  95. gbWriteBase64Enable = 0;
  96. gbWriteEnable = 0;
  97. mutex_unlock(&flash_mutex);
  98. return -EINVAL;
  99. }
  100. mutex_unlock(&flash_mutex);
  101. return 0;
  102. }
  103. static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
  104. loff_t *ppos)
  105. {
  106. ssize_t ret;
  107. if (flashdebug)
  108. printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
  109. "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
  110. /*
  111. * We now lock against reads and writes. --rmk
  112. */
  113. if (mutex_lock_interruptible(&nwflash_mutex))
  114. return -ERESTARTSYS;
  115. ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
  116. mutex_unlock(&nwflash_mutex);
  117. return ret;
  118. }
  119. static ssize_t flash_write(struct file *file, const char __user *buf,
  120. size_t size, loff_t * ppos)
  121. {
  122. unsigned long p = *ppos;
  123. unsigned int count = size;
  124. int written;
  125. int nBlock, temp, rc;
  126. int i, j;
  127. if (flashdebug)
  128. printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
  129. p, buf, count);
  130. if (!gbWriteEnable)
  131. return -EINVAL;
  132. if (p < 64 * 1024 && (!gbWriteBase64Enable))
  133. return -EINVAL;
  134. /*
  135. * check for out of range pos or count
  136. */
  137. if (p >= gbFlashSize)
  138. return count ? -ENXIO : 0;
  139. if (count > gbFlashSize - p)
  140. count = gbFlashSize - p;
  141. if (!access_ok(buf, count))
  142. return -EFAULT;
  143. /*
  144. * We now lock against reads and writes. --rmk
  145. */
  146. if (mutex_lock_interruptible(&nwflash_mutex))
  147. return -ERESTARTSYS;
  148. written = 0;
  149. nBlock = (int) p >> 16; //block # of 64K bytes
  150. /*
  151. * # of 64K blocks to erase and write
  152. */
  153. temp = ((int) (p + count) >> 16) - nBlock + 1;
  154. /*
  155. * write ends at exactly 64k boundary?
  156. */
  157. if (((int) (p + count) & 0xFFFF) == 0)
  158. temp -= 1;
  159. if (flashdebug)
  160. printk(KERN_DEBUG "flash_write: writing %d block(s) "
  161. "starting at %d.\n", temp, nBlock);
  162. for (; temp; temp--, nBlock++) {
  163. if (flashdebug)
  164. printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
  165. /*
  166. * first we have to erase the block(s), where we will write...
  167. */
  168. i = 0;
  169. j = 0;
  170. RetryBlock:
  171. do {
  172. rc = erase_block(nBlock);
  173. i++;
  174. } while (rc && i < 10);
  175. if (rc) {
  176. printk(KERN_ERR "flash_write: erase error %x\n", rc);
  177. break;
  178. }
  179. if (flashdebug)
  180. printk(KERN_DEBUG "flash_write: writing offset %lX, "
  181. "from buf %p, bytes left %X.\n", p, buf,
  182. count - written);
  183. /*
  184. * write_block will limit write to space left in this block
  185. */
  186. rc = write_block(p, buf, count - written);
  187. j++;
  188. /*
  189. * if somehow write verify failed? Can't happen??
  190. */
  191. if (!rc) {
  192. /*
  193. * retry up to 10 times
  194. */
  195. if (j < 10)
  196. goto RetryBlock;
  197. else
  198. /*
  199. * else quit with error...
  200. */
  201. rc = -1;
  202. }
  203. if (rc < 0) {
  204. printk(KERN_ERR "flash_write: write error %X\n", rc);
  205. break;
  206. }
  207. p += rc;
  208. buf += rc;
  209. written += rc;
  210. *ppos += rc;
  211. if (flashdebug)
  212. printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
  213. }
  214. mutex_unlock(&nwflash_mutex);
  215. return written;
  216. }
  217. /*
  218. * The memory devices use the full 32/64 bits of the offset, and so we cannot
  219. * check against negative addresses: they are ok. The return value is weird,
  220. * though, in that case (0).
  221. *
  222. * also note that seeking relative to the "end of file" isn't supported:
  223. * it has no meaning, so it returns -EINVAL.
  224. */
  225. static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
  226. {
  227. loff_t ret;
  228. mutex_lock(&flash_mutex);
  229. if (flashdebug)
  230. printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
  231. (unsigned int) offset, orig);
  232. ret = no_seek_end_llseek_size(file, offset, orig, gbFlashSize);
  233. mutex_unlock(&flash_mutex);
  234. return ret;
  235. }
  236. /*
  237. * assume that main Write routine did the parameter checking...
  238. * so just go ahead and erase, what requested!
  239. */
  240. static int erase_block(int nBlock)
  241. {
  242. volatile unsigned int c1;
  243. volatile unsigned char *pWritePtr;
  244. unsigned long timeout;
  245. int temp, temp1;
  246. /*
  247. * reset footbridge to the correct offset 0 (...0..3)
  248. */
  249. *CSR_ROMWRITEREG = 0;
  250. /*
  251. * dummy ROM read
  252. */
  253. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  254. kick_open();
  255. /*
  256. * reset status if old errors
  257. */
  258. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  259. /*
  260. * erase a block...
  261. * aim at the middle of a current block...
  262. */
  263. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
  264. /*
  265. * dummy read
  266. */
  267. c1 = *pWritePtr;
  268. kick_open();
  269. /*
  270. * erase
  271. */
  272. *(volatile unsigned char *) pWritePtr = 0x20;
  273. /*
  274. * confirm
  275. */
  276. *(volatile unsigned char *) pWritePtr = 0xD0;
  277. /*
  278. * wait 10 ms
  279. */
  280. msleep(10);
  281. /*
  282. * wait while erasing in process (up to 10 sec)
  283. */
  284. timeout = jiffies + 10 * HZ;
  285. c1 = 0;
  286. while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
  287. msleep(10);
  288. /*
  289. * read any address
  290. */
  291. c1 = *(volatile unsigned char *) (pWritePtr);
  292. // printk("Flash_erase: status=%X.\n",c1);
  293. }
  294. /*
  295. * set flash for normal read access
  296. */
  297. kick_open();
  298. // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
  299. *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
  300. /*
  301. * check if erase errors were reported
  302. */
  303. if (c1 & 0x20) {
  304. printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
  305. /*
  306. * reset error
  307. */
  308. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  309. return -2;
  310. }
  311. /*
  312. * just to make sure - verify if erased OK...
  313. */
  314. msleep(10);
  315. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
  316. for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
  317. if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
  318. printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
  319. pWritePtr, temp1);
  320. return -1;
  321. }
  322. }
  323. return 0;
  324. }
  325. /*
  326. * write_block will limit number of bytes written to the space in this block
  327. */
  328. static int write_block(unsigned long p, const char __user *buf, int count)
  329. {
  330. volatile unsigned int c1;
  331. volatile unsigned int c2;
  332. unsigned char *pWritePtr;
  333. unsigned int uAddress;
  334. unsigned int offset;
  335. unsigned long timeout;
  336. unsigned long timeout1;
  337. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  338. /*
  339. * check if write will end in this block....
  340. */
  341. offset = p & 0xFFFF;
  342. if (offset + count > 0x10000)
  343. count = 0x10000 - offset;
  344. /*
  345. * wait up to 30 sec for this block
  346. */
  347. timeout = jiffies + 30 * HZ;
  348. for (offset = 0; offset < count; offset++, pWritePtr++) {
  349. uAddress = (unsigned int) pWritePtr;
  350. uAddress &= 0xFFFFFFFC;
  351. if (__get_user(c2, buf + offset))
  352. return -EFAULT;
  353. WriteRetry:
  354. /*
  355. * dummy read
  356. */
  357. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  358. /*
  359. * kick open the write gate
  360. */
  361. kick_open();
  362. /*
  363. * program footbridge to the correct offset...0..3
  364. */
  365. *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
  366. /*
  367. * write cmd
  368. */
  369. *(volatile unsigned char *) (uAddress) = 0x40;
  370. /*
  371. * data to write
  372. */
  373. *(volatile unsigned char *) (uAddress) = c2;
  374. /*
  375. * get status
  376. */
  377. *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
  378. c1 = 0;
  379. /*
  380. * wait up to 1 sec for this byte
  381. */
  382. timeout1 = jiffies + 1 * HZ;
  383. /*
  384. * while not ready...
  385. */
  386. while (!(c1 & 0x80) && time_before(jiffies, timeout1))
  387. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  388. /*
  389. * if timeout getting status
  390. */
  391. if (time_after_eq(jiffies, timeout1)) {
  392. kick_open();
  393. /*
  394. * reset err
  395. */
  396. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  397. goto WriteRetry;
  398. }
  399. /*
  400. * switch on read access, as a default flash operation mode
  401. */
  402. kick_open();
  403. /*
  404. * read access
  405. */
  406. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  407. /*
  408. * if hardware reports an error writing, and not timeout -
  409. * reset the chip and retry
  410. */
  411. if (c1 & 0x10) {
  412. kick_open();
  413. /*
  414. * reset err
  415. */
  416. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  417. /*
  418. * before timeout?
  419. */
  420. if (time_before(jiffies, timeout)) {
  421. if (flashdebug)
  422. printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
  423. pWritePtr - FLASH_BASE);
  424. /*
  425. * wait couple ms
  426. */
  427. msleep(10);
  428. goto WriteRetry;
  429. } else {
  430. printk(KERN_ERR "write_block: timeout at 0x%X\n",
  431. pWritePtr - FLASH_BASE);
  432. /*
  433. * return error -2
  434. */
  435. return -2;
  436. }
  437. }
  438. }
  439. msleep(10);
  440. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  441. for (offset = 0; offset < count; offset++) {
  442. char c, c1;
  443. if (__get_user(c, buf))
  444. return -EFAULT;
  445. buf++;
  446. if ((c1 = *pWritePtr++) != c) {
  447. printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
  448. pWritePtr - FLASH_BASE, c1, c);
  449. return 0;
  450. }
  451. }
  452. return count;
  453. }
  454. static void kick_open(void)
  455. {
  456. unsigned long flags;
  457. /*
  458. * we want to write a bit pattern XXX1 to Xilinx to enable
  459. * the write gate, which will be open for about the next 2ms.
  460. */
  461. raw_spin_lock_irqsave(&nw_gpio_lock, flags);
  462. nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
  463. raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
  464. /*
  465. * let the ISA bus to catch on...
  466. */
  467. udelay(25);
  468. }
  469. static const struct file_operations flash_fops =
  470. {
  471. .owner = THIS_MODULE,
  472. .llseek = flash_llseek,
  473. .read = flash_read,
  474. .write = flash_write,
  475. .unlocked_ioctl = flash_ioctl,
  476. };
  477. static struct miscdevice flash_miscdev =
  478. {
  479. NWFLASH_MINOR,
  480. "nwflash",
  481. &flash_fops
  482. };
  483. static int __init nwflash_init(void)
  484. {
  485. int ret = -ENODEV;
  486. if (machine_is_netwinder()) {
  487. int id;
  488. FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
  489. if (!FLASH_BASE)
  490. goto out;
  491. id = get_flash_id();
  492. if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
  493. ret = -ENXIO;
  494. iounmap((void *)FLASH_BASE);
  495. printk("Flash: incorrect ID 0x%04X.\n", id);
  496. goto out;
  497. }
  498. printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
  499. NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
  500. ret = misc_register(&flash_miscdev);
  501. if (ret < 0) {
  502. iounmap((void *)FLASH_BASE);
  503. }
  504. }
  505. out:
  506. return ret;
  507. }
  508. static void __exit nwflash_exit(void)
  509. {
  510. misc_deregister(&flash_miscdev);
  511. iounmap((void *)FLASH_BASE);
  512. }
  513. MODULE_LICENSE("GPL");
  514. module_param(flashdebug, bool, 0644);
  515. module_init(nwflash_init);
  516. module_exit(nwflash_exit);