hci_qca.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Bluetooth Software UART Qualcomm protocol
  4. *
  5. * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
  6. * protocol extension to H4.
  7. *
  8. * Copyright (C) 2007 Texas Instruments, Inc.
  9. * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
  10. *
  11. * Acknowledgements:
  12. * This file is based on hci_ll.c, which was...
  13. * Written by Ohad Ben-Cohen <ohad@bencohen.org>
  14. * which was in turn based on hci_h4.c, which was written
  15. * by Maxim Krasnyansky and Marcel Holtmann.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/clk.h>
  19. #include <linux/completion.h>
  20. #include <linux/debugfs.h>
  21. #include <linux/delay.h>
  22. #include <linux/devcoredump.h>
  23. #include <linux/device.h>
  24. #include <linux/gpio/consumer.h>
  25. #include <linux/mod_devicetable.h>
  26. #include <linux/module.h>
  27. #include <linux/of_device.h>
  28. #include <linux/acpi.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/regulator/consumer.h>
  31. #include <linux/serdev.h>
  32. #include <linux/mutex.h>
  33. #include <asm/unaligned.h>
  34. #include <net/bluetooth/bluetooth.h>
  35. #include <net/bluetooth/hci_core.h>
  36. #include "hci_uart.h"
  37. #include "btqca.h"
  38. /* HCI_IBS protocol messages */
  39. #define HCI_IBS_SLEEP_IND 0xFE
  40. #define HCI_IBS_WAKE_IND 0xFD
  41. #define HCI_IBS_WAKE_ACK 0xFC
  42. #define HCI_MAX_IBS_SIZE 10
  43. #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
  44. #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
  45. #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
  46. #define CMD_TRANS_TIMEOUT_MS 100
  47. #define MEMDUMP_TIMEOUT_MS 8000
  48. /* susclk rate */
  49. #define SUSCLK_RATE_32KHZ 32768
  50. /* Controller debug log header */
  51. #define QCA_DEBUG_HANDLE 0x2EDC
  52. /* max retry count when init fails */
  53. #define MAX_INIT_RETRIES 3
  54. /* Controller dump header */
  55. #define QCA_SSR_DUMP_HANDLE 0x0108
  56. #define QCA_DUMP_PACKET_SIZE 255
  57. #define QCA_LAST_SEQUENCE_NUM 0xFFFF
  58. #define QCA_CRASHBYTE_PACKET_LEN 1096
  59. #define QCA_MEMDUMP_BYTE 0xFB
  60. enum qca_flags {
  61. QCA_IBS_ENABLED,
  62. QCA_DROP_VENDOR_EVENT,
  63. QCA_SUSPENDING,
  64. QCA_MEMDUMP_COLLECTION,
  65. QCA_HW_ERROR_EVENT,
  66. QCA_SSR_TRIGGERED
  67. };
  68. enum qca_capabilities {
  69. QCA_CAP_WIDEBAND_SPEECH = BIT(0),
  70. QCA_CAP_VALID_LE_STATES = BIT(1),
  71. };
  72. /* HCI_IBS transmit side sleep protocol states */
  73. enum tx_ibs_states {
  74. HCI_IBS_TX_ASLEEP,
  75. HCI_IBS_TX_WAKING,
  76. HCI_IBS_TX_AWAKE,
  77. };
  78. /* HCI_IBS receive side sleep protocol states */
  79. enum rx_states {
  80. HCI_IBS_RX_ASLEEP,
  81. HCI_IBS_RX_AWAKE,
  82. };
  83. /* HCI_IBS transmit and receive side clock state vote */
  84. enum hci_ibs_clock_state_vote {
  85. HCI_IBS_VOTE_STATS_UPDATE,
  86. HCI_IBS_TX_VOTE_CLOCK_ON,
  87. HCI_IBS_TX_VOTE_CLOCK_OFF,
  88. HCI_IBS_RX_VOTE_CLOCK_ON,
  89. HCI_IBS_RX_VOTE_CLOCK_OFF,
  90. };
  91. /* Controller memory dump states */
  92. enum qca_memdump_states {
  93. QCA_MEMDUMP_IDLE,
  94. QCA_MEMDUMP_COLLECTING,
  95. QCA_MEMDUMP_COLLECTED,
  96. QCA_MEMDUMP_TIMEOUT,
  97. };
  98. struct qca_memdump_data {
  99. char *memdump_buf_head;
  100. char *memdump_buf_tail;
  101. u32 current_seq_no;
  102. u32 received_dump;
  103. u32 ram_dump_size;
  104. };
  105. struct qca_memdump_event_hdr {
  106. __u8 evt;
  107. __u8 plen;
  108. __u16 opcode;
  109. __u16 seq_no;
  110. __u8 reserved;
  111. } __packed;
  112. struct qca_dump_size {
  113. u32 dump_size;
  114. } __packed;
  115. struct qca_data {
  116. struct hci_uart *hu;
  117. struct sk_buff *rx_skb;
  118. struct sk_buff_head txq;
  119. struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
  120. struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
  121. spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
  122. u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
  123. u8 rx_ibs_state; /* HCI_IBS receive side power state */
  124. bool tx_vote; /* Clock must be on for TX */
  125. bool rx_vote; /* Clock must be on for RX */
  126. struct timer_list tx_idle_timer;
  127. u32 tx_idle_delay;
  128. struct timer_list wake_retrans_timer;
  129. u32 wake_retrans;
  130. struct workqueue_struct *workqueue;
  131. struct work_struct ws_awake_rx;
  132. struct work_struct ws_awake_device;
  133. struct work_struct ws_rx_vote_off;
  134. struct work_struct ws_tx_vote_off;
  135. struct work_struct ctrl_memdump_evt;
  136. struct delayed_work ctrl_memdump_timeout;
  137. struct qca_memdump_data *qca_memdump;
  138. unsigned long flags;
  139. struct completion drop_ev_comp;
  140. wait_queue_head_t suspend_wait_q;
  141. enum qca_memdump_states memdump_state;
  142. struct mutex hci_memdump_lock;
  143. /* For debugging purpose */
  144. u64 ibs_sent_wacks;
  145. u64 ibs_sent_slps;
  146. u64 ibs_sent_wakes;
  147. u64 ibs_recv_wacks;
  148. u64 ibs_recv_slps;
  149. u64 ibs_recv_wakes;
  150. u64 vote_last_jif;
  151. u32 vote_on_ms;
  152. u32 vote_off_ms;
  153. u64 tx_votes_on;
  154. u64 rx_votes_on;
  155. u64 tx_votes_off;
  156. u64 rx_votes_off;
  157. u64 votes_on;
  158. u64 votes_off;
  159. };
  160. enum qca_speed_type {
  161. QCA_INIT_SPEED = 1,
  162. QCA_OPER_SPEED
  163. };
  164. /*
  165. * Voltage regulator information required for configuring the
  166. * QCA Bluetooth chipset
  167. */
  168. struct qca_vreg {
  169. const char *name;
  170. unsigned int load_uA;
  171. };
  172. struct qca_device_data {
  173. enum qca_btsoc_type soc_type;
  174. struct qca_vreg *vregs;
  175. size_t num_vregs;
  176. uint32_t capabilities;
  177. };
  178. /*
  179. * Platform data for the QCA Bluetooth power driver.
  180. */
  181. struct qca_power {
  182. struct device *dev;
  183. struct regulator_bulk_data *vreg_bulk;
  184. int num_vregs;
  185. bool vregs_on;
  186. };
  187. struct qca_serdev {
  188. struct hci_uart serdev_hu;
  189. struct gpio_desc *bt_en;
  190. struct clk *susclk;
  191. enum qca_btsoc_type btsoc_type;
  192. struct qca_power *bt_power;
  193. u32 init_speed;
  194. u32 oper_speed;
  195. const char *firmware_name;
  196. };
  197. static int qca_regulator_enable(struct qca_serdev *qcadev);
  198. static void qca_regulator_disable(struct qca_serdev *qcadev);
  199. static void qca_power_shutdown(struct hci_uart *hu);
  200. static int qca_power_off(struct hci_dev *hdev);
  201. static void qca_controller_memdump(struct work_struct *work);
  202. static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
  203. {
  204. enum qca_btsoc_type soc_type;
  205. if (hu->serdev) {
  206. struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
  207. soc_type = qsd->btsoc_type;
  208. } else {
  209. soc_type = QCA_ROME;
  210. }
  211. return soc_type;
  212. }
  213. static const char *qca_get_firmware_name(struct hci_uart *hu)
  214. {
  215. if (hu->serdev) {
  216. struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
  217. return qsd->firmware_name;
  218. } else {
  219. return NULL;
  220. }
  221. }
  222. static void __serial_clock_on(struct tty_struct *tty)
  223. {
  224. /* TODO: Some chipset requires to enable UART clock on client
  225. * side to save power consumption or manual work is required.
  226. * Please put your code to control UART clock here if needed
  227. */
  228. }
  229. static void __serial_clock_off(struct tty_struct *tty)
  230. {
  231. /* TODO: Some chipset requires to disable UART clock on client
  232. * side to save power consumption or manual work is required.
  233. * Please put your code to control UART clock off here if needed
  234. */
  235. }
  236. /* serial_clock_vote needs to be called with the ibs lock held */
  237. static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
  238. {
  239. struct qca_data *qca = hu->priv;
  240. unsigned int diff;
  241. bool old_vote = (qca->tx_vote | qca->rx_vote);
  242. bool new_vote;
  243. switch (vote) {
  244. case HCI_IBS_VOTE_STATS_UPDATE:
  245. diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
  246. if (old_vote)
  247. qca->vote_off_ms += diff;
  248. else
  249. qca->vote_on_ms += diff;
  250. return;
  251. case HCI_IBS_TX_VOTE_CLOCK_ON:
  252. qca->tx_vote = true;
  253. qca->tx_votes_on++;
  254. break;
  255. case HCI_IBS_RX_VOTE_CLOCK_ON:
  256. qca->rx_vote = true;
  257. qca->rx_votes_on++;
  258. break;
  259. case HCI_IBS_TX_VOTE_CLOCK_OFF:
  260. qca->tx_vote = false;
  261. qca->tx_votes_off++;
  262. break;
  263. case HCI_IBS_RX_VOTE_CLOCK_OFF:
  264. qca->rx_vote = false;
  265. qca->rx_votes_off++;
  266. break;
  267. default:
  268. BT_ERR("Voting irregularity");
  269. return;
  270. }
  271. new_vote = qca->rx_vote | qca->tx_vote;
  272. if (new_vote != old_vote) {
  273. if (new_vote)
  274. __serial_clock_on(hu->tty);
  275. else
  276. __serial_clock_off(hu->tty);
  277. BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
  278. vote ? "true" : "false");
  279. diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
  280. if (new_vote) {
  281. qca->votes_on++;
  282. qca->vote_off_ms += diff;
  283. } else {
  284. qca->votes_off++;
  285. qca->vote_on_ms += diff;
  286. }
  287. qca->vote_last_jif = jiffies;
  288. }
  289. }
  290. /* Builds and sends an HCI_IBS command packet.
  291. * These are very simple packets with only 1 cmd byte.
  292. */
  293. static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
  294. {
  295. int err = 0;
  296. struct sk_buff *skb = NULL;
  297. struct qca_data *qca = hu->priv;
  298. BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
  299. skb = bt_skb_alloc(1, GFP_ATOMIC);
  300. if (!skb) {
  301. BT_ERR("Failed to allocate memory for HCI_IBS packet");
  302. return -ENOMEM;
  303. }
  304. /* Assign HCI_IBS type */
  305. skb_put_u8(skb, cmd);
  306. skb_queue_tail(&qca->txq, skb);
  307. return err;
  308. }
  309. static void qca_wq_awake_device(struct work_struct *work)
  310. {
  311. struct qca_data *qca = container_of(work, struct qca_data,
  312. ws_awake_device);
  313. struct hci_uart *hu = qca->hu;
  314. unsigned long retrans_delay;
  315. unsigned long flags;
  316. BT_DBG("hu %p wq awake device", hu);
  317. /* Vote for serial clock */
  318. serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
  319. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  320. /* Send wake indication to device */
  321. if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
  322. BT_ERR("Failed to send WAKE to device");
  323. qca->ibs_sent_wakes++;
  324. /* Start retransmit timer */
  325. retrans_delay = msecs_to_jiffies(qca->wake_retrans);
  326. mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
  327. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  328. /* Actually send the packets */
  329. hci_uart_tx_wakeup(hu);
  330. }
  331. static void qca_wq_awake_rx(struct work_struct *work)
  332. {
  333. struct qca_data *qca = container_of(work, struct qca_data,
  334. ws_awake_rx);
  335. struct hci_uart *hu = qca->hu;
  336. unsigned long flags;
  337. BT_DBG("hu %p wq awake rx", hu);
  338. serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
  339. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  340. qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
  341. /* Always acknowledge device wake up,
  342. * sending IBS message doesn't count as TX ON.
  343. */
  344. if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
  345. BT_ERR("Failed to acknowledge device wake up");
  346. qca->ibs_sent_wacks++;
  347. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  348. /* Actually send the packets */
  349. hci_uart_tx_wakeup(hu);
  350. }
  351. static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
  352. {
  353. struct qca_data *qca = container_of(work, struct qca_data,
  354. ws_rx_vote_off);
  355. struct hci_uart *hu = qca->hu;
  356. BT_DBG("hu %p rx clock vote off", hu);
  357. serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
  358. }
  359. static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
  360. {
  361. struct qca_data *qca = container_of(work, struct qca_data,
  362. ws_tx_vote_off);
  363. struct hci_uart *hu = qca->hu;
  364. BT_DBG("hu %p tx clock vote off", hu);
  365. /* Run HCI tx handling unlocked */
  366. hci_uart_tx_wakeup(hu);
  367. /* Now that message queued to tty driver, vote for tty clocks off.
  368. * It is up to the tty driver to pend the clocks off until tx done.
  369. */
  370. serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
  371. }
  372. static void hci_ibs_tx_idle_timeout(struct timer_list *t)
  373. {
  374. struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
  375. struct hci_uart *hu = qca->hu;
  376. unsigned long flags;
  377. BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
  378. spin_lock_irqsave_nested(&qca->hci_ibs_lock,
  379. flags, SINGLE_DEPTH_NESTING);
  380. switch (qca->tx_ibs_state) {
  381. case HCI_IBS_TX_AWAKE:
  382. /* TX_IDLE, go to SLEEP */
  383. if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
  384. BT_ERR("Failed to send SLEEP to device");
  385. break;
  386. }
  387. qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
  388. qca->ibs_sent_slps++;
  389. queue_work(qca->workqueue, &qca->ws_tx_vote_off);
  390. break;
  391. case HCI_IBS_TX_ASLEEP:
  392. case HCI_IBS_TX_WAKING:
  393. default:
  394. BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
  395. break;
  396. }
  397. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  398. }
  399. static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
  400. {
  401. struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
  402. struct hci_uart *hu = qca->hu;
  403. unsigned long flags, retrans_delay;
  404. bool retransmit = false;
  405. BT_DBG("hu %p wake retransmit timeout in %d state",
  406. hu, qca->tx_ibs_state);
  407. spin_lock_irqsave_nested(&qca->hci_ibs_lock,
  408. flags, SINGLE_DEPTH_NESTING);
  409. /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
  410. if (test_bit(QCA_SUSPENDING, &qca->flags)) {
  411. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  412. return;
  413. }
  414. switch (qca->tx_ibs_state) {
  415. case HCI_IBS_TX_WAKING:
  416. /* No WAKE_ACK, retransmit WAKE */
  417. retransmit = true;
  418. if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
  419. BT_ERR("Failed to acknowledge device wake up");
  420. break;
  421. }
  422. qca->ibs_sent_wakes++;
  423. retrans_delay = msecs_to_jiffies(qca->wake_retrans);
  424. mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
  425. break;
  426. case HCI_IBS_TX_ASLEEP:
  427. case HCI_IBS_TX_AWAKE:
  428. default:
  429. BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
  430. break;
  431. }
  432. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  433. if (retransmit)
  434. hci_uart_tx_wakeup(hu);
  435. }
  436. static void qca_controller_memdump_timeout(struct work_struct *work)
  437. {
  438. struct qca_data *qca = container_of(work, struct qca_data,
  439. ctrl_memdump_timeout.work);
  440. struct hci_uart *hu = qca->hu;
  441. mutex_lock(&qca->hci_memdump_lock);
  442. if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
  443. qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
  444. if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
  445. /* Inject hw error event to reset the device
  446. * and driver.
  447. */
  448. hci_reset_dev(hu->hdev);
  449. }
  450. }
  451. mutex_unlock(&qca->hci_memdump_lock);
  452. }
  453. /* Initialize protocol */
  454. static int qca_open(struct hci_uart *hu)
  455. {
  456. struct qca_serdev *qcadev;
  457. struct qca_data *qca;
  458. BT_DBG("hu %p qca_open", hu);
  459. if (!hci_uart_has_flow_control(hu))
  460. return -EOPNOTSUPP;
  461. qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
  462. if (!qca)
  463. return -ENOMEM;
  464. skb_queue_head_init(&qca->txq);
  465. skb_queue_head_init(&qca->tx_wait_q);
  466. skb_queue_head_init(&qca->rx_memdump_q);
  467. spin_lock_init(&qca->hci_ibs_lock);
  468. mutex_init(&qca->hci_memdump_lock);
  469. qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
  470. if (!qca->workqueue) {
  471. BT_ERR("QCA Workqueue not initialized properly");
  472. kfree(qca);
  473. return -ENOMEM;
  474. }
  475. INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
  476. INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
  477. INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
  478. INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
  479. INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
  480. INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
  481. qca_controller_memdump_timeout);
  482. init_waitqueue_head(&qca->suspend_wait_q);
  483. qca->hu = hu;
  484. init_completion(&qca->drop_ev_comp);
  485. /* Assume we start with both sides asleep -- extra wakes OK */
  486. qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
  487. qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
  488. qca->vote_last_jif = jiffies;
  489. hu->priv = qca;
  490. if (hu->serdev) {
  491. qcadev = serdev_device_get_drvdata(hu->serdev);
  492. if (qca_is_wcn399x(qcadev->btsoc_type))
  493. hu->init_speed = qcadev->init_speed;
  494. if (qcadev->oper_speed)
  495. hu->oper_speed = qcadev->oper_speed;
  496. }
  497. timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
  498. qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
  499. timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
  500. qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
  501. BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
  502. qca->tx_idle_delay, qca->wake_retrans);
  503. return 0;
  504. }
  505. static void qca_debugfs_init(struct hci_dev *hdev)
  506. {
  507. struct hci_uart *hu = hci_get_drvdata(hdev);
  508. struct qca_data *qca = hu->priv;
  509. struct dentry *ibs_dir;
  510. umode_t mode;
  511. if (!hdev->debugfs)
  512. return;
  513. ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
  514. /* read only */
  515. mode = S_IRUGO;
  516. debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
  517. debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
  518. debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
  519. &qca->ibs_sent_slps);
  520. debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
  521. &qca->ibs_sent_wakes);
  522. debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
  523. &qca->ibs_sent_wacks);
  524. debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
  525. &qca->ibs_recv_slps);
  526. debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
  527. &qca->ibs_recv_wakes);
  528. debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
  529. &qca->ibs_recv_wacks);
  530. debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
  531. debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
  532. debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
  533. debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
  534. debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
  535. debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
  536. debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
  537. debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
  538. debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
  539. debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
  540. /* read/write */
  541. mode = S_IRUGO | S_IWUSR;
  542. debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
  543. debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
  544. &qca->tx_idle_delay);
  545. }
  546. /* Flush protocol data */
  547. static int qca_flush(struct hci_uart *hu)
  548. {
  549. struct qca_data *qca = hu->priv;
  550. BT_DBG("hu %p qca flush", hu);
  551. skb_queue_purge(&qca->tx_wait_q);
  552. skb_queue_purge(&qca->txq);
  553. return 0;
  554. }
  555. /* Close protocol */
  556. static int qca_close(struct hci_uart *hu)
  557. {
  558. struct qca_data *qca = hu->priv;
  559. BT_DBG("hu %p qca close", hu);
  560. serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
  561. skb_queue_purge(&qca->tx_wait_q);
  562. skb_queue_purge(&qca->txq);
  563. skb_queue_purge(&qca->rx_memdump_q);
  564. del_timer(&qca->tx_idle_timer);
  565. del_timer(&qca->wake_retrans_timer);
  566. destroy_workqueue(qca->workqueue);
  567. qca->hu = NULL;
  568. kfree_skb(qca->rx_skb);
  569. hu->priv = NULL;
  570. kfree(qca);
  571. return 0;
  572. }
  573. /* Called upon a wake-up-indication from the device.
  574. */
  575. static void device_want_to_wakeup(struct hci_uart *hu)
  576. {
  577. unsigned long flags;
  578. struct qca_data *qca = hu->priv;
  579. BT_DBG("hu %p want to wake up", hu);
  580. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  581. qca->ibs_recv_wakes++;
  582. /* Don't wake the rx up when suspending. */
  583. if (test_bit(QCA_SUSPENDING, &qca->flags)) {
  584. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  585. return;
  586. }
  587. switch (qca->rx_ibs_state) {
  588. case HCI_IBS_RX_ASLEEP:
  589. /* Make sure clock is on - we may have turned clock off since
  590. * receiving the wake up indicator awake rx clock.
  591. */
  592. queue_work(qca->workqueue, &qca->ws_awake_rx);
  593. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  594. return;
  595. case HCI_IBS_RX_AWAKE:
  596. /* Always acknowledge device wake up,
  597. * sending IBS message doesn't count as TX ON.
  598. */
  599. if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
  600. BT_ERR("Failed to acknowledge device wake up");
  601. break;
  602. }
  603. qca->ibs_sent_wacks++;
  604. break;
  605. default:
  606. /* Any other state is illegal */
  607. BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
  608. qca->rx_ibs_state);
  609. break;
  610. }
  611. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  612. /* Actually send the packets */
  613. hci_uart_tx_wakeup(hu);
  614. }
  615. /* Called upon a sleep-indication from the device.
  616. */
  617. static void device_want_to_sleep(struct hci_uart *hu)
  618. {
  619. unsigned long flags;
  620. struct qca_data *qca = hu->priv;
  621. BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
  622. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  623. qca->ibs_recv_slps++;
  624. switch (qca->rx_ibs_state) {
  625. case HCI_IBS_RX_AWAKE:
  626. /* Update state */
  627. qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
  628. /* Vote off rx clock under workqueue */
  629. queue_work(qca->workqueue, &qca->ws_rx_vote_off);
  630. break;
  631. case HCI_IBS_RX_ASLEEP:
  632. break;
  633. default:
  634. /* Any other state is illegal */
  635. BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
  636. qca->rx_ibs_state);
  637. break;
  638. }
  639. wake_up_interruptible(&qca->suspend_wait_q);
  640. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  641. }
  642. /* Called upon wake-up-acknowledgement from the device
  643. */
  644. static void device_woke_up(struct hci_uart *hu)
  645. {
  646. unsigned long flags, idle_delay;
  647. struct qca_data *qca = hu->priv;
  648. struct sk_buff *skb = NULL;
  649. BT_DBG("hu %p woke up", hu);
  650. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  651. qca->ibs_recv_wacks++;
  652. /* Don't react to the wake-up-acknowledgment when suspending. */
  653. if (test_bit(QCA_SUSPENDING, &qca->flags)) {
  654. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  655. return;
  656. }
  657. switch (qca->tx_ibs_state) {
  658. case HCI_IBS_TX_AWAKE:
  659. /* Expect one if we send 2 WAKEs */
  660. BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
  661. qca->tx_ibs_state);
  662. break;
  663. case HCI_IBS_TX_WAKING:
  664. /* Send pending packets */
  665. while ((skb = skb_dequeue(&qca->tx_wait_q)))
  666. skb_queue_tail(&qca->txq, skb);
  667. /* Switch timers and change state to HCI_IBS_TX_AWAKE */
  668. del_timer(&qca->wake_retrans_timer);
  669. idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
  670. mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
  671. qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
  672. break;
  673. case HCI_IBS_TX_ASLEEP:
  674. default:
  675. BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
  676. qca->tx_ibs_state);
  677. break;
  678. }
  679. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  680. /* Actually send the packets */
  681. hci_uart_tx_wakeup(hu);
  682. }
  683. /* Enqueue frame for transmittion (padding, crc, etc) may be called from
  684. * two simultaneous tasklets.
  685. */
  686. static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
  687. {
  688. unsigned long flags = 0, idle_delay;
  689. struct qca_data *qca = hu->priv;
  690. BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
  691. qca->tx_ibs_state);
  692. if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
  693. /* As SSR is in progress, ignore the packets */
  694. bt_dev_dbg(hu->hdev, "SSR is in progress");
  695. kfree_skb(skb);
  696. return 0;
  697. }
  698. /* Prepend skb with frame type */
  699. memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
  700. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  701. /* Don't go to sleep in middle of patch download or
  702. * Out-Of-Band(GPIOs control) sleep is selected.
  703. * Don't wake the device up when suspending.
  704. */
  705. if (!test_bit(QCA_IBS_ENABLED, &qca->flags) ||
  706. test_bit(QCA_SUSPENDING, &qca->flags)) {
  707. skb_queue_tail(&qca->txq, skb);
  708. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  709. return 0;
  710. }
  711. /* Act according to current state */
  712. switch (qca->tx_ibs_state) {
  713. case HCI_IBS_TX_AWAKE:
  714. BT_DBG("Device awake, sending normally");
  715. skb_queue_tail(&qca->txq, skb);
  716. idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
  717. mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
  718. break;
  719. case HCI_IBS_TX_ASLEEP:
  720. BT_DBG("Device asleep, waking up and queueing packet");
  721. /* Save packet for later */
  722. skb_queue_tail(&qca->tx_wait_q, skb);
  723. qca->tx_ibs_state = HCI_IBS_TX_WAKING;
  724. /* Schedule a work queue to wake up device */
  725. queue_work(qca->workqueue, &qca->ws_awake_device);
  726. break;
  727. case HCI_IBS_TX_WAKING:
  728. BT_DBG("Device waking up, queueing packet");
  729. /* Transient state; just keep packet for later */
  730. skb_queue_tail(&qca->tx_wait_q, skb);
  731. break;
  732. default:
  733. BT_ERR("Illegal tx state: %d (losing packet)",
  734. qca->tx_ibs_state);
  735. kfree_skb(skb);
  736. break;
  737. }
  738. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  739. return 0;
  740. }
  741. static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
  742. {
  743. struct hci_uart *hu = hci_get_drvdata(hdev);
  744. BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
  745. device_want_to_sleep(hu);
  746. kfree_skb(skb);
  747. return 0;
  748. }
  749. static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
  750. {
  751. struct hci_uart *hu = hci_get_drvdata(hdev);
  752. BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
  753. device_want_to_wakeup(hu);
  754. kfree_skb(skb);
  755. return 0;
  756. }
  757. static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
  758. {
  759. struct hci_uart *hu = hci_get_drvdata(hdev);
  760. BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
  761. device_woke_up(hu);
  762. kfree_skb(skb);
  763. return 0;
  764. }
  765. static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
  766. {
  767. /* We receive debug logs from chip as an ACL packets.
  768. * Instead of sending the data to ACL to decode the
  769. * received data, we are pushing them to the above layers
  770. * as a diagnostic packet.
  771. */
  772. if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
  773. return hci_recv_diag(hdev, skb);
  774. return hci_recv_frame(hdev, skb);
  775. }
  776. static void qca_controller_memdump(struct work_struct *work)
  777. {
  778. struct qca_data *qca = container_of(work, struct qca_data,
  779. ctrl_memdump_evt);
  780. struct hci_uart *hu = qca->hu;
  781. struct sk_buff *skb;
  782. struct qca_memdump_event_hdr *cmd_hdr;
  783. struct qca_memdump_data *qca_memdump = qca->qca_memdump;
  784. struct qca_dump_size *dump;
  785. char *memdump_buf;
  786. char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };
  787. u16 seq_no;
  788. u32 dump_size;
  789. u32 rx_size;
  790. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  791. while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
  792. mutex_lock(&qca->hci_memdump_lock);
  793. /* Skip processing the received packets if timeout detected
  794. * or memdump collection completed.
  795. */
  796. if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
  797. qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
  798. mutex_unlock(&qca->hci_memdump_lock);
  799. return;
  800. }
  801. if (!qca_memdump) {
  802. qca_memdump = kzalloc(sizeof(struct qca_memdump_data),
  803. GFP_ATOMIC);
  804. if (!qca_memdump) {
  805. mutex_unlock(&qca->hci_memdump_lock);
  806. return;
  807. }
  808. qca->qca_memdump = qca_memdump;
  809. }
  810. qca->memdump_state = QCA_MEMDUMP_COLLECTING;
  811. cmd_hdr = (void *) skb->data;
  812. seq_no = __le16_to_cpu(cmd_hdr->seq_no);
  813. skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
  814. if (!seq_no) {
  815. /* This is the first frame of memdump packet from
  816. * the controller, Disable IBS to recevie dump
  817. * with out any interruption, ideally time required for
  818. * the controller to send the dump is 8 seconds. let us
  819. * start timer to handle this asynchronous activity.
  820. */
  821. clear_bit(QCA_IBS_ENABLED, &qca->flags);
  822. set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
  823. dump = (void *) skb->data;
  824. dump_size = __le32_to_cpu(dump->dump_size);
  825. if (!(dump_size)) {
  826. bt_dev_err(hu->hdev, "Rx invalid memdump size");
  827. kfree(qca_memdump);
  828. kfree_skb(skb);
  829. qca->qca_memdump = NULL;
  830. mutex_unlock(&qca->hci_memdump_lock);
  831. return;
  832. }
  833. bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
  834. dump_size);
  835. queue_delayed_work(qca->workqueue,
  836. &qca->ctrl_memdump_timeout,
  837. msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)
  838. );
  839. skb_pull(skb, sizeof(dump_size));
  840. memdump_buf = vmalloc(dump_size);
  841. qca_memdump->ram_dump_size = dump_size;
  842. qca_memdump->memdump_buf_head = memdump_buf;
  843. qca_memdump->memdump_buf_tail = memdump_buf;
  844. }
  845. memdump_buf = qca_memdump->memdump_buf_tail;
  846. /* If sequence no 0 is missed then there is no point in
  847. * accepting the other sequences.
  848. */
  849. if (!memdump_buf) {
  850. bt_dev_err(hu->hdev, "QCA: Discarding other packets");
  851. kfree(qca_memdump);
  852. kfree_skb(skb);
  853. qca->qca_memdump = NULL;
  854. mutex_unlock(&qca->hci_memdump_lock);
  855. return;
  856. }
  857. /* There could be chance of missing some packets from
  858. * the controller. In such cases let us store the dummy
  859. * packets in the buffer.
  860. */
  861. /* For QCA6390, controller does not lost packets but
  862. * sequence number field of packat sometimes has error
  863. * bits, so skip this checking for missing packet.
  864. */
  865. while ((seq_no > qca_memdump->current_seq_no + 1) &&
  866. (soc_type != QCA_QCA6390) &&
  867. seq_no != QCA_LAST_SEQUENCE_NUM) {
  868. bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
  869. qca_memdump->current_seq_no);
  870. rx_size = qca_memdump->received_dump;
  871. rx_size += QCA_DUMP_PACKET_SIZE;
  872. if (rx_size > qca_memdump->ram_dump_size) {
  873. bt_dev_err(hu->hdev,
  874. "QCA memdump received %d, no space for missed packet",
  875. qca_memdump->received_dump);
  876. break;
  877. }
  878. memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);
  879. memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;
  880. qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
  881. qca_memdump->current_seq_no++;
  882. }
  883. rx_size = qca_memdump->received_dump + skb->len;
  884. if (rx_size <= qca_memdump->ram_dump_size) {
  885. if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
  886. (seq_no != qca_memdump->current_seq_no))
  887. bt_dev_err(hu->hdev,
  888. "QCA memdump unexpected packet %d",
  889. seq_no);
  890. bt_dev_dbg(hu->hdev,
  891. "QCA memdump packet %d with length %d",
  892. seq_no, skb->len);
  893. memcpy(memdump_buf, (unsigned char *)skb->data,
  894. skb->len);
  895. memdump_buf = memdump_buf + skb->len;
  896. qca_memdump->memdump_buf_tail = memdump_buf;
  897. qca_memdump->current_seq_no = seq_no + 1;
  898. qca_memdump->received_dump += skb->len;
  899. } else {
  900. bt_dev_err(hu->hdev,
  901. "QCA memdump received %d, no space for packet %d",
  902. qca_memdump->received_dump, seq_no);
  903. }
  904. qca->qca_memdump = qca_memdump;
  905. kfree_skb(skb);
  906. if (seq_no == QCA_LAST_SEQUENCE_NUM) {
  907. bt_dev_info(hu->hdev,
  908. "QCA memdump Done, received %d, total %d",
  909. qca_memdump->received_dump,
  910. qca_memdump->ram_dump_size);
  911. memdump_buf = qca_memdump->memdump_buf_head;
  912. dev_coredumpv(&hu->serdev->dev, memdump_buf,
  913. qca_memdump->received_dump, GFP_KERNEL);
  914. cancel_delayed_work(&qca->ctrl_memdump_timeout);
  915. kfree(qca->qca_memdump);
  916. qca->qca_memdump = NULL;
  917. qca->memdump_state = QCA_MEMDUMP_COLLECTED;
  918. clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
  919. }
  920. mutex_unlock(&qca->hci_memdump_lock);
  921. }
  922. }
  923. static int qca_controller_memdump_event(struct hci_dev *hdev,
  924. struct sk_buff *skb)
  925. {
  926. struct hci_uart *hu = hci_get_drvdata(hdev);
  927. struct qca_data *qca = hu->priv;
  928. set_bit(QCA_SSR_TRIGGERED, &qca->flags);
  929. skb_queue_tail(&qca->rx_memdump_q, skb);
  930. queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
  931. return 0;
  932. }
  933. static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
  934. {
  935. struct hci_uart *hu = hci_get_drvdata(hdev);
  936. struct qca_data *qca = hu->priv;
  937. if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
  938. struct hci_event_hdr *hdr = (void *)skb->data;
  939. /* For the WCN3990 the vendor command for a baudrate change
  940. * isn't sent as synchronous HCI command, because the
  941. * controller sends the corresponding vendor event with the
  942. * new baudrate. The event is received and properly decoded
  943. * after changing the baudrate of the host port. It needs to
  944. * be dropped, otherwise it can be misinterpreted as
  945. * response to a later firmware download command (also a
  946. * vendor command).
  947. */
  948. if (hdr->evt == HCI_EV_VENDOR)
  949. complete(&qca->drop_ev_comp);
  950. kfree_skb(skb);
  951. return 0;
  952. }
  953. /* We receive chip memory dump as an event packet, With a dedicated
  954. * handler followed by a hardware error event. When this event is
  955. * received we store dump into a file before closing hci. This
  956. * dump will help in triaging the issues.
  957. */
  958. if ((skb->data[0] == HCI_VENDOR_PKT) &&
  959. (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
  960. return qca_controller_memdump_event(hdev, skb);
  961. return hci_recv_frame(hdev, skb);
  962. }
  963. #define QCA_IBS_SLEEP_IND_EVENT \
  964. .type = HCI_IBS_SLEEP_IND, \
  965. .hlen = 0, \
  966. .loff = 0, \
  967. .lsize = 0, \
  968. .maxlen = HCI_MAX_IBS_SIZE
  969. #define QCA_IBS_WAKE_IND_EVENT \
  970. .type = HCI_IBS_WAKE_IND, \
  971. .hlen = 0, \
  972. .loff = 0, \
  973. .lsize = 0, \
  974. .maxlen = HCI_MAX_IBS_SIZE
  975. #define QCA_IBS_WAKE_ACK_EVENT \
  976. .type = HCI_IBS_WAKE_ACK, \
  977. .hlen = 0, \
  978. .loff = 0, \
  979. .lsize = 0, \
  980. .maxlen = HCI_MAX_IBS_SIZE
  981. static const struct h4_recv_pkt qca_recv_pkts[] = {
  982. { H4_RECV_ACL, .recv = qca_recv_acl_data },
  983. { H4_RECV_SCO, .recv = hci_recv_frame },
  984. { H4_RECV_EVENT, .recv = qca_recv_event },
  985. { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
  986. { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
  987. { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
  988. };
  989. static int qca_recv(struct hci_uart *hu, const void *data, int count)
  990. {
  991. struct qca_data *qca = hu->priv;
  992. if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
  993. return -EUNATCH;
  994. qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
  995. qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
  996. if (IS_ERR(qca->rx_skb)) {
  997. int err = PTR_ERR(qca->rx_skb);
  998. bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
  999. qca->rx_skb = NULL;
  1000. return err;
  1001. }
  1002. return count;
  1003. }
  1004. static struct sk_buff *qca_dequeue(struct hci_uart *hu)
  1005. {
  1006. struct qca_data *qca = hu->priv;
  1007. return skb_dequeue(&qca->txq);
  1008. }
  1009. static uint8_t qca_get_baudrate_value(int speed)
  1010. {
  1011. switch (speed) {
  1012. case 9600:
  1013. return QCA_BAUDRATE_9600;
  1014. case 19200:
  1015. return QCA_BAUDRATE_19200;
  1016. case 38400:
  1017. return QCA_BAUDRATE_38400;
  1018. case 57600:
  1019. return QCA_BAUDRATE_57600;
  1020. case 115200:
  1021. return QCA_BAUDRATE_115200;
  1022. case 230400:
  1023. return QCA_BAUDRATE_230400;
  1024. case 460800:
  1025. return QCA_BAUDRATE_460800;
  1026. case 500000:
  1027. return QCA_BAUDRATE_500000;
  1028. case 921600:
  1029. return QCA_BAUDRATE_921600;
  1030. case 1000000:
  1031. return QCA_BAUDRATE_1000000;
  1032. case 2000000:
  1033. return QCA_BAUDRATE_2000000;
  1034. case 3000000:
  1035. return QCA_BAUDRATE_3000000;
  1036. case 3200000:
  1037. return QCA_BAUDRATE_3200000;
  1038. case 3500000:
  1039. return QCA_BAUDRATE_3500000;
  1040. default:
  1041. return QCA_BAUDRATE_115200;
  1042. }
  1043. }
  1044. static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
  1045. {
  1046. struct hci_uart *hu = hci_get_drvdata(hdev);
  1047. struct qca_data *qca = hu->priv;
  1048. struct sk_buff *skb;
  1049. u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
  1050. if (baudrate > QCA_BAUDRATE_3200000)
  1051. return -EINVAL;
  1052. cmd[4] = baudrate;
  1053. skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
  1054. if (!skb) {
  1055. bt_dev_err(hdev, "Failed to allocate baudrate packet");
  1056. return -ENOMEM;
  1057. }
  1058. /* Assign commands to change baudrate and packet type. */
  1059. skb_put_data(skb, cmd, sizeof(cmd));
  1060. hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
  1061. skb_queue_tail(&qca->txq, skb);
  1062. hci_uart_tx_wakeup(hu);
  1063. /* Wait for the baudrate change request to be sent */
  1064. while (!skb_queue_empty(&qca->txq))
  1065. usleep_range(100, 200);
  1066. if (hu->serdev)
  1067. serdev_device_wait_until_sent(hu->serdev,
  1068. msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
  1069. /* Give the controller time to process the request */
  1070. if (qca_is_wcn399x(qca_soc_type(hu)))
  1071. msleep(10);
  1072. else
  1073. msleep(300);
  1074. return 0;
  1075. }
  1076. static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
  1077. {
  1078. if (hu->serdev)
  1079. serdev_device_set_baudrate(hu->serdev, speed);
  1080. else
  1081. hci_uart_set_baudrate(hu, speed);
  1082. }
  1083. static int qca_send_power_pulse(struct hci_uart *hu, bool on)
  1084. {
  1085. int ret;
  1086. int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
  1087. u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
  1088. /* These power pulses are single byte command which are sent
  1089. * at required baudrate to wcn3990. On wcn3990, we have an external
  1090. * circuit at Tx pin which decodes the pulse sent at specific baudrate.
  1091. * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
  1092. * and also we use the same power inputs to turn on and off for
  1093. * Wi-Fi/BT. Powering up the power sources will not enable BT, until
  1094. * we send a power on pulse at 115200 bps. This algorithm will help to
  1095. * save power. Disabling hardware flow control is mandatory while
  1096. * sending power pulses to SoC.
  1097. */
  1098. bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
  1099. serdev_device_write_flush(hu->serdev);
  1100. hci_uart_set_flow_control(hu, true);
  1101. ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
  1102. if (ret < 0) {
  1103. bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
  1104. return ret;
  1105. }
  1106. serdev_device_wait_until_sent(hu->serdev, timeout);
  1107. hci_uart_set_flow_control(hu, false);
  1108. /* Give to controller time to boot/shutdown */
  1109. if (on)
  1110. msleep(100);
  1111. else
  1112. msleep(10);
  1113. return 0;
  1114. }
  1115. static unsigned int qca_get_speed(struct hci_uart *hu,
  1116. enum qca_speed_type speed_type)
  1117. {
  1118. unsigned int speed = 0;
  1119. if (speed_type == QCA_INIT_SPEED) {
  1120. if (hu->init_speed)
  1121. speed = hu->init_speed;
  1122. else if (hu->proto->init_speed)
  1123. speed = hu->proto->init_speed;
  1124. } else {
  1125. if (hu->oper_speed)
  1126. speed = hu->oper_speed;
  1127. else if (hu->proto->oper_speed)
  1128. speed = hu->proto->oper_speed;
  1129. }
  1130. return speed;
  1131. }
  1132. static int qca_check_speeds(struct hci_uart *hu)
  1133. {
  1134. if (qca_is_wcn399x(qca_soc_type(hu))) {
  1135. if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
  1136. !qca_get_speed(hu, QCA_OPER_SPEED))
  1137. return -EINVAL;
  1138. } else {
  1139. if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
  1140. !qca_get_speed(hu, QCA_OPER_SPEED))
  1141. return -EINVAL;
  1142. }
  1143. return 0;
  1144. }
  1145. static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
  1146. {
  1147. unsigned int speed, qca_baudrate;
  1148. struct qca_data *qca = hu->priv;
  1149. int ret = 0;
  1150. if (speed_type == QCA_INIT_SPEED) {
  1151. speed = qca_get_speed(hu, QCA_INIT_SPEED);
  1152. if (speed)
  1153. host_set_baudrate(hu, speed);
  1154. } else {
  1155. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  1156. speed = qca_get_speed(hu, QCA_OPER_SPEED);
  1157. if (!speed)
  1158. return 0;
  1159. /* Disable flow control for wcn3990 to deassert RTS while
  1160. * changing the baudrate of chip and host.
  1161. */
  1162. if (qca_is_wcn399x(soc_type))
  1163. hci_uart_set_flow_control(hu, true);
  1164. if (soc_type == QCA_WCN3990) {
  1165. reinit_completion(&qca->drop_ev_comp);
  1166. set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
  1167. }
  1168. qca_baudrate = qca_get_baudrate_value(speed);
  1169. bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
  1170. ret = qca_set_baudrate(hu->hdev, qca_baudrate);
  1171. if (ret)
  1172. goto error;
  1173. host_set_baudrate(hu, speed);
  1174. error:
  1175. if (qca_is_wcn399x(soc_type))
  1176. hci_uart_set_flow_control(hu, false);
  1177. if (soc_type == QCA_WCN3990) {
  1178. /* Wait for the controller to send the vendor event
  1179. * for the baudrate change command.
  1180. */
  1181. if (!wait_for_completion_timeout(&qca->drop_ev_comp,
  1182. msecs_to_jiffies(100))) {
  1183. bt_dev_err(hu->hdev,
  1184. "Failed to change controller baudrate\n");
  1185. ret = -ETIMEDOUT;
  1186. }
  1187. clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
  1188. }
  1189. }
  1190. return ret;
  1191. }
  1192. static int qca_send_crashbuffer(struct hci_uart *hu)
  1193. {
  1194. struct qca_data *qca = hu->priv;
  1195. struct sk_buff *skb;
  1196. skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
  1197. if (!skb) {
  1198. bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
  1199. return -ENOMEM;
  1200. }
  1201. /* We forcefully crash the controller, by sending 0xfb byte for
  1202. * 1024 times. We also might have chance of losing data, To be
  1203. * on safer side we send 1096 bytes to the SoC.
  1204. */
  1205. memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
  1206. QCA_CRASHBYTE_PACKET_LEN);
  1207. hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
  1208. bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
  1209. skb_queue_tail(&qca->txq, skb);
  1210. hci_uart_tx_wakeup(hu);
  1211. return 0;
  1212. }
  1213. static void qca_wait_for_dump_collection(struct hci_dev *hdev)
  1214. {
  1215. struct hci_uart *hu = hci_get_drvdata(hdev);
  1216. struct qca_data *qca = hu->priv;
  1217. wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
  1218. TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
  1219. clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
  1220. }
  1221. static void qca_hw_error(struct hci_dev *hdev, u8 code)
  1222. {
  1223. struct hci_uart *hu = hci_get_drvdata(hdev);
  1224. struct qca_data *qca = hu->priv;
  1225. set_bit(QCA_SSR_TRIGGERED, &qca->flags);
  1226. set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
  1227. bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
  1228. if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
  1229. /* If hardware error event received for other than QCA
  1230. * soc memory dump event, then we need to crash the SOC
  1231. * and wait here for 8 seconds to get the dump packets.
  1232. * This will block main thread to be on hold until we
  1233. * collect dump.
  1234. */
  1235. set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
  1236. qca_send_crashbuffer(hu);
  1237. qca_wait_for_dump_collection(hdev);
  1238. } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
  1239. /* Let us wait here until memory dump collected or
  1240. * memory dump timer expired.
  1241. */
  1242. bt_dev_info(hdev, "waiting for dump to complete");
  1243. qca_wait_for_dump_collection(hdev);
  1244. }
  1245. mutex_lock(&qca->hci_memdump_lock);
  1246. if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
  1247. bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
  1248. if (qca->qca_memdump) {
  1249. vfree(qca->qca_memdump->memdump_buf_head);
  1250. kfree(qca->qca_memdump);
  1251. qca->qca_memdump = NULL;
  1252. }
  1253. qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
  1254. cancel_delayed_work(&qca->ctrl_memdump_timeout);
  1255. }
  1256. mutex_unlock(&qca->hci_memdump_lock);
  1257. if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
  1258. qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
  1259. cancel_work_sync(&qca->ctrl_memdump_evt);
  1260. skb_queue_purge(&qca->rx_memdump_q);
  1261. }
  1262. clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
  1263. }
  1264. static void qca_cmd_timeout(struct hci_dev *hdev)
  1265. {
  1266. struct hci_uart *hu = hci_get_drvdata(hdev);
  1267. struct qca_data *qca = hu->priv;
  1268. set_bit(QCA_SSR_TRIGGERED, &qca->flags);
  1269. if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
  1270. set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
  1271. qca_send_crashbuffer(hu);
  1272. qca_wait_for_dump_collection(hdev);
  1273. } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
  1274. /* Let us wait here until memory dump collected or
  1275. * memory dump timer expired.
  1276. */
  1277. bt_dev_info(hdev, "waiting for dump to complete");
  1278. qca_wait_for_dump_collection(hdev);
  1279. }
  1280. mutex_lock(&qca->hci_memdump_lock);
  1281. if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
  1282. qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
  1283. if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
  1284. /* Inject hw error event to reset the device
  1285. * and driver.
  1286. */
  1287. hci_reset_dev(hu->hdev);
  1288. }
  1289. }
  1290. mutex_unlock(&qca->hci_memdump_lock);
  1291. }
  1292. static int qca_wcn3990_init(struct hci_uart *hu)
  1293. {
  1294. struct qca_serdev *qcadev;
  1295. int ret;
  1296. /* Check for vregs status, may be hci down has turned
  1297. * off the voltage regulator.
  1298. */
  1299. qcadev = serdev_device_get_drvdata(hu->serdev);
  1300. if (!qcadev->bt_power->vregs_on) {
  1301. serdev_device_close(hu->serdev);
  1302. ret = qca_regulator_enable(qcadev);
  1303. if (ret)
  1304. return ret;
  1305. ret = serdev_device_open(hu->serdev);
  1306. if (ret) {
  1307. bt_dev_err(hu->hdev, "failed to open port");
  1308. return ret;
  1309. }
  1310. }
  1311. /* Forcefully enable wcn3990 to enter in to boot mode. */
  1312. host_set_baudrate(hu, 2400);
  1313. ret = qca_send_power_pulse(hu, false);
  1314. if (ret)
  1315. return ret;
  1316. qca_set_speed(hu, QCA_INIT_SPEED);
  1317. ret = qca_send_power_pulse(hu, true);
  1318. if (ret)
  1319. return ret;
  1320. /* Now the device is in ready state to communicate with host.
  1321. * To sync host with device we need to reopen port.
  1322. * Without this, we will have RTS and CTS synchronization
  1323. * issues.
  1324. */
  1325. serdev_device_close(hu->serdev);
  1326. ret = serdev_device_open(hu->serdev);
  1327. if (ret) {
  1328. bt_dev_err(hu->hdev, "failed to open port");
  1329. return ret;
  1330. }
  1331. hci_uart_set_flow_control(hu, false);
  1332. return 0;
  1333. }
  1334. static int qca_power_on(struct hci_dev *hdev)
  1335. {
  1336. struct hci_uart *hu = hci_get_drvdata(hdev);
  1337. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  1338. struct qca_serdev *qcadev;
  1339. int ret = 0;
  1340. /* Non-serdev device usually is powered by external power
  1341. * and don't need additional action in driver for power on
  1342. */
  1343. if (!hu->serdev)
  1344. return 0;
  1345. if (qca_is_wcn399x(soc_type)) {
  1346. ret = qca_wcn3990_init(hu);
  1347. } else {
  1348. qcadev = serdev_device_get_drvdata(hu->serdev);
  1349. if (qcadev->bt_en) {
  1350. gpiod_set_value_cansleep(qcadev->bt_en, 1);
  1351. /* Controller needs time to bootup. */
  1352. msleep(150);
  1353. }
  1354. }
  1355. return ret;
  1356. }
  1357. static int qca_setup(struct hci_uart *hu)
  1358. {
  1359. struct hci_dev *hdev = hu->hdev;
  1360. struct qca_data *qca = hu->priv;
  1361. unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
  1362. unsigned int retries = 0;
  1363. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  1364. const char *firmware_name = qca_get_firmware_name(hu);
  1365. int ret;
  1366. int soc_ver = 0;
  1367. ret = qca_check_speeds(hu);
  1368. if (ret)
  1369. return ret;
  1370. /* Patch downloading has to be done without IBS mode */
  1371. clear_bit(QCA_IBS_ENABLED, &qca->flags);
  1372. /* Enable controller to do both LE scan and BR/EDR inquiry
  1373. * simultaneously.
  1374. */
  1375. set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
  1376. bt_dev_info(hdev, "setting up %s",
  1377. qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME/QCA6390");
  1378. qca->memdump_state = QCA_MEMDUMP_IDLE;
  1379. retry:
  1380. ret = qca_power_on(hdev);
  1381. if (ret)
  1382. return ret;
  1383. clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
  1384. if (qca_is_wcn399x(soc_type)) {
  1385. set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  1386. ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
  1387. if (ret)
  1388. return ret;
  1389. } else {
  1390. qca_set_speed(hu, QCA_INIT_SPEED);
  1391. }
  1392. /* Setup user speed if needed */
  1393. speed = qca_get_speed(hu, QCA_OPER_SPEED);
  1394. if (speed) {
  1395. ret = qca_set_speed(hu, QCA_OPER_SPEED);
  1396. if (ret)
  1397. return ret;
  1398. qca_baudrate = qca_get_baudrate_value(speed);
  1399. }
  1400. if (!qca_is_wcn399x(soc_type)) {
  1401. /* Get QCA version information */
  1402. ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
  1403. if (ret)
  1404. return ret;
  1405. }
  1406. bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver);
  1407. /* Setup patch / NVM configurations */
  1408. ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver,
  1409. firmware_name);
  1410. if (!ret) {
  1411. set_bit(QCA_IBS_ENABLED, &qca->flags);
  1412. qca_debugfs_init(hdev);
  1413. hu->hdev->hw_error = qca_hw_error;
  1414. hu->hdev->cmd_timeout = qca_cmd_timeout;
  1415. } else if (ret == -ENOENT) {
  1416. /* No patch/nvm-config found, run with original fw/config */
  1417. ret = 0;
  1418. } else if (ret == -EAGAIN) {
  1419. /*
  1420. * Userspace firmware loader will return -EAGAIN in case no
  1421. * patch/nvm-config is found, so run with original fw/config.
  1422. */
  1423. ret = 0;
  1424. } else {
  1425. if (retries < MAX_INIT_RETRIES) {
  1426. qca_power_shutdown(hu);
  1427. if (hu->serdev) {
  1428. serdev_device_close(hu->serdev);
  1429. ret = serdev_device_open(hu->serdev);
  1430. if (ret) {
  1431. bt_dev_err(hdev, "failed to open port");
  1432. return ret;
  1433. }
  1434. }
  1435. retries++;
  1436. goto retry;
  1437. }
  1438. }
  1439. /* Setup bdaddr */
  1440. if (soc_type == QCA_ROME)
  1441. hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
  1442. else
  1443. hu->hdev->set_bdaddr = qca_set_bdaddr;
  1444. return ret;
  1445. }
  1446. static const struct hci_uart_proto qca_proto = {
  1447. .id = HCI_UART_QCA,
  1448. .name = "QCA",
  1449. .manufacturer = 29,
  1450. .init_speed = 115200,
  1451. .oper_speed = 3000000,
  1452. .open = qca_open,
  1453. .close = qca_close,
  1454. .flush = qca_flush,
  1455. .setup = qca_setup,
  1456. .recv = qca_recv,
  1457. .enqueue = qca_enqueue,
  1458. .dequeue = qca_dequeue,
  1459. };
  1460. static const struct qca_device_data qca_soc_data_wcn3990 = {
  1461. .soc_type = QCA_WCN3990,
  1462. .vregs = (struct qca_vreg []) {
  1463. { "vddio", 15000 },
  1464. { "vddxo", 80000 },
  1465. { "vddrf", 300000 },
  1466. { "vddch0", 450000 },
  1467. },
  1468. .num_vregs = 4,
  1469. };
  1470. static const struct qca_device_data qca_soc_data_wcn3991 = {
  1471. .soc_type = QCA_WCN3991,
  1472. .vregs = (struct qca_vreg []) {
  1473. { "vddio", 15000 },
  1474. { "vddxo", 80000 },
  1475. { "vddrf", 300000 },
  1476. { "vddch0", 450000 },
  1477. },
  1478. .num_vregs = 4,
  1479. .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
  1480. };
  1481. static const struct qca_device_data qca_soc_data_wcn3998 = {
  1482. .soc_type = QCA_WCN3998,
  1483. .vregs = (struct qca_vreg []) {
  1484. { "vddio", 10000 },
  1485. { "vddxo", 80000 },
  1486. { "vddrf", 300000 },
  1487. { "vddch0", 450000 },
  1488. },
  1489. .num_vregs = 4,
  1490. };
  1491. static const struct qca_device_data qca_soc_data_qca6390 = {
  1492. .soc_type = QCA_QCA6390,
  1493. .num_vregs = 0,
  1494. };
  1495. static void qca_power_shutdown(struct hci_uart *hu)
  1496. {
  1497. struct qca_serdev *qcadev;
  1498. struct qca_data *qca = hu->priv;
  1499. unsigned long flags;
  1500. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  1501. /* From this point we go into power off state. But serial port is
  1502. * still open, stop queueing the IBS data and flush all the buffered
  1503. * data in skb's.
  1504. */
  1505. spin_lock_irqsave(&qca->hci_ibs_lock, flags);
  1506. clear_bit(QCA_IBS_ENABLED, &qca->flags);
  1507. qca_flush(hu);
  1508. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  1509. /* Non-serdev device usually is powered by external power
  1510. * and don't need additional action in driver for power down
  1511. */
  1512. if (!hu->serdev)
  1513. return;
  1514. qcadev = serdev_device_get_drvdata(hu->serdev);
  1515. if (qca_is_wcn399x(soc_type)) {
  1516. host_set_baudrate(hu, 2400);
  1517. qca_send_power_pulse(hu, false);
  1518. qca_regulator_disable(qcadev);
  1519. } else if (qcadev->bt_en) {
  1520. gpiod_set_value_cansleep(qcadev->bt_en, 0);
  1521. }
  1522. }
  1523. static int qca_power_off(struct hci_dev *hdev)
  1524. {
  1525. struct hci_uart *hu = hci_get_drvdata(hdev);
  1526. struct qca_data *qca = hu->priv;
  1527. enum qca_btsoc_type soc_type = qca_soc_type(hu);
  1528. hu->hdev->hw_error = NULL;
  1529. hu->hdev->cmd_timeout = NULL;
  1530. del_timer_sync(&qca->wake_retrans_timer);
  1531. del_timer_sync(&qca->tx_idle_timer);
  1532. /* Stop sending shutdown command if soc crashes. */
  1533. if (soc_type != QCA_ROME
  1534. && qca->memdump_state == QCA_MEMDUMP_IDLE) {
  1535. qca_send_pre_shutdown_cmd(hdev);
  1536. usleep_range(8000, 10000);
  1537. }
  1538. qca_power_shutdown(hu);
  1539. return 0;
  1540. }
  1541. static int qca_regulator_enable(struct qca_serdev *qcadev)
  1542. {
  1543. struct qca_power *power = qcadev->bt_power;
  1544. int ret;
  1545. /* Already enabled */
  1546. if (power->vregs_on)
  1547. return 0;
  1548. BT_DBG("enabling %d regulators)", power->num_vregs);
  1549. ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
  1550. if (ret)
  1551. return ret;
  1552. power->vregs_on = true;
  1553. ret = clk_prepare_enable(qcadev->susclk);
  1554. if (ret)
  1555. qca_regulator_disable(qcadev);
  1556. return ret;
  1557. }
  1558. static void qca_regulator_disable(struct qca_serdev *qcadev)
  1559. {
  1560. struct qca_power *power;
  1561. if (!qcadev)
  1562. return;
  1563. power = qcadev->bt_power;
  1564. /* Already disabled? */
  1565. if (!power->vregs_on)
  1566. return;
  1567. regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
  1568. power->vregs_on = false;
  1569. clk_disable_unprepare(qcadev->susclk);
  1570. }
  1571. static int qca_init_regulators(struct qca_power *qca,
  1572. const struct qca_vreg *vregs, size_t num_vregs)
  1573. {
  1574. struct regulator_bulk_data *bulk;
  1575. int ret;
  1576. int i;
  1577. bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
  1578. if (!bulk)
  1579. return -ENOMEM;
  1580. for (i = 0; i < num_vregs; i++)
  1581. bulk[i].supply = vregs[i].name;
  1582. ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
  1583. if (ret < 0)
  1584. return ret;
  1585. for (i = 0; i < num_vregs; i++) {
  1586. ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
  1587. if (ret)
  1588. return ret;
  1589. }
  1590. qca->vreg_bulk = bulk;
  1591. qca->num_vregs = num_vregs;
  1592. return 0;
  1593. }
  1594. static int qca_serdev_probe(struct serdev_device *serdev)
  1595. {
  1596. struct qca_serdev *qcadev;
  1597. struct hci_dev *hdev;
  1598. const struct qca_device_data *data;
  1599. int err;
  1600. bool power_ctrl_enabled = true;
  1601. qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
  1602. if (!qcadev)
  1603. return -ENOMEM;
  1604. qcadev->serdev_hu.serdev = serdev;
  1605. data = device_get_match_data(&serdev->dev);
  1606. serdev_device_set_drvdata(serdev, qcadev);
  1607. device_property_read_string(&serdev->dev, "firmware-name",
  1608. &qcadev->firmware_name);
  1609. device_property_read_u32(&serdev->dev, "max-speed",
  1610. &qcadev->oper_speed);
  1611. if (!qcadev->oper_speed)
  1612. BT_DBG("UART will pick default operating speed");
  1613. if (data && qca_is_wcn399x(data->soc_type)) {
  1614. qcadev->btsoc_type = data->soc_type;
  1615. qcadev->bt_power = devm_kzalloc(&serdev->dev,
  1616. sizeof(struct qca_power),
  1617. GFP_KERNEL);
  1618. if (!qcadev->bt_power)
  1619. return -ENOMEM;
  1620. qcadev->bt_power->dev = &serdev->dev;
  1621. err = qca_init_regulators(qcadev->bt_power, data->vregs,
  1622. data->num_vregs);
  1623. if (err) {
  1624. BT_ERR("Failed to init regulators:%d", err);
  1625. return err;
  1626. }
  1627. qcadev->bt_power->vregs_on = false;
  1628. qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
  1629. if (IS_ERR(qcadev->susclk)) {
  1630. dev_err(&serdev->dev, "failed to acquire clk\n");
  1631. return PTR_ERR(qcadev->susclk);
  1632. }
  1633. err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
  1634. if (err) {
  1635. BT_ERR("wcn3990 serdev registration failed");
  1636. return err;
  1637. }
  1638. } else {
  1639. if (data)
  1640. qcadev->btsoc_type = data->soc_type;
  1641. else
  1642. qcadev->btsoc_type = QCA_ROME;
  1643. qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
  1644. GPIOD_OUT_LOW);
  1645. if (IS_ERR_OR_NULL(qcadev->bt_en)) {
  1646. dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
  1647. power_ctrl_enabled = false;
  1648. }
  1649. qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
  1650. if (IS_ERR(qcadev->susclk)) {
  1651. dev_warn(&serdev->dev, "failed to acquire clk\n");
  1652. return PTR_ERR(qcadev->susclk);
  1653. }
  1654. err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
  1655. if (err)
  1656. return err;
  1657. err = clk_prepare_enable(qcadev->susclk);
  1658. if (err)
  1659. return err;
  1660. err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
  1661. if (err) {
  1662. BT_ERR("Rome serdev registration failed");
  1663. clk_disable_unprepare(qcadev->susclk);
  1664. return err;
  1665. }
  1666. }
  1667. hdev = qcadev->serdev_hu.hdev;
  1668. if (power_ctrl_enabled) {
  1669. set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
  1670. hdev->shutdown = qca_power_off;
  1671. }
  1672. if (data) {
  1673. /* Wideband speech support must be set per driver since it can't
  1674. * be queried via hci. Same with the valid le states quirk.
  1675. */
  1676. if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
  1677. set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
  1678. &hdev->quirks);
  1679. if (data->capabilities & QCA_CAP_VALID_LE_STATES)
  1680. set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
  1681. }
  1682. return 0;
  1683. }
  1684. static void qca_serdev_remove(struct serdev_device *serdev)
  1685. {
  1686. struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
  1687. struct qca_power *power = qcadev->bt_power;
  1688. if (qca_is_wcn399x(qcadev->btsoc_type) && power->vregs_on)
  1689. qca_power_shutdown(&qcadev->serdev_hu);
  1690. else if (qcadev->susclk)
  1691. clk_disable_unprepare(qcadev->susclk);
  1692. hci_uart_unregister_device(&qcadev->serdev_hu);
  1693. }
  1694. static void qca_serdev_shutdown(struct device *dev)
  1695. {
  1696. int ret;
  1697. int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
  1698. struct serdev_device *serdev = to_serdev_device(dev);
  1699. struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
  1700. const u8 ibs_wake_cmd[] = { 0xFD };
  1701. const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
  1702. if (qcadev->btsoc_type == QCA_QCA6390) {
  1703. serdev_device_write_flush(serdev);
  1704. ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
  1705. sizeof(ibs_wake_cmd));
  1706. if (ret < 0) {
  1707. BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
  1708. return;
  1709. }
  1710. serdev_device_wait_until_sent(serdev, timeout);
  1711. usleep_range(8000, 10000);
  1712. serdev_device_write_flush(serdev);
  1713. ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
  1714. sizeof(edl_reset_soc_cmd));
  1715. if (ret < 0) {
  1716. BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
  1717. return;
  1718. }
  1719. serdev_device_wait_until_sent(serdev, timeout);
  1720. usleep_range(8000, 10000);
  1721. }
  1722. }
  1723. static int __maybe_unused qca_suspend(struct device *dev)
  1724. {
  1725. struct serdev_device *serdev = to_serdev_device(dev);
  1726. struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
  1727. struct hci_uart *hu = &qcadev->serdev_hu;
  1728. struct qca_data *qca = hu->priv;
  1729. unsigned long flags;
  1730. bool tx_pending = false;
  1731. int ret = 0;
  1732. u8 cmd;
  1733. set_bit(QCA_SUSPENDING, &qca->flags);
  1734. /* Device is downloading patch or doesn't support in-band sleep. */
  1735. if (!test_bit(QCA_IBS_ENABLED, &qca->flags))
  1736. return 0;
  1737. cancel_work_sync(&qca->ws_awake_device);
  1738. cancel_work_sync(&qca->ws_awake_rx);
  1739. spin_lock_irqsave_nested(&qca->hci_ibs_lock,
  1740. flags, SINGLE_DEPTH_NESTING);
  1741. switch (qca->tx_ibs_state) {
  1742. case HCI_IBS_TX_WAKING:
  1743. del_timer(&qca->wake_retrans_timer);
  1744. fallthrough;
  1745. case HCI_IBS_TX_AWAKE:
  1746. del_timer(&qca->tx_idle_timer);
  1747. serdev_device_write_flush(hu->serdev);
  1748. cmd = HCI_IBS_SLEEP_IND;
  1749. ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
  1750. if (ret < 0) {
  1751. BT_ERR("Failed to send SLEEP to device");
  1752. break;
  1753. }
  1754. qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
  1755. qca->ibs_sent_slps++;
  1756. tx_pending = true;
  1757. break;
  1758. case HCI_IBS_TX_ASLEEP:
  1759. break;
  1760. default:
  1761. BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
  1762. ret = -EINVAL;
  1763. break;
  1764. }
  1765. spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
  1766. if (ret < 0)
  1767. goto error;
  1768. if (tx_pending) {
  1769. serdev_device_wait_until_sent(hu->serdev,
  1770. msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
  1771. serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
  1772. }
  1773. /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
  1774. * to sleep, so that the packet does not wake the system later.
  1775. */
  1776. ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
  1777. qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
  1778. msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
  1779. if (ret == 0) {
  1780. ret = -ETIMEDOUT;
  1781. goto error;
  1782. }
  1783. return 0;
  1784. error:
  1785. clear_bit(QCA_SUSPENDING, &qca->flags);
  1786. return ret;
  1787. }
  1788. static int __maybe_unused qca_resume(struct device *dev)
  1789. {
  1790. struct serdev_device *serdev = to_serdev_device(dev);
  1791. struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
  1792. struct hci_uart *hu = &qcadev->serdev_hu;
  1793. struct qca_data *qca = hu->priv;
  1794. clear_bit(QCA_SUSPENDING, &qca->flags);
  1795. return 0;
  1796. }
  1797. static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
  1798. #ifdef CONFIG_OF
  1799. static const struct of_device_id qca_bluetooth_of_match[] = {
  1800. { .compatible = "qcom,qca6174-bt" },
  1801. { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
  1802. { .compatible = "qcom,qca9377-bt" },
  1803. { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
  1804. { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
  1805. { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
  1806. { /* sentinel */ }
  1807. };
  1808. MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
  1809. #endif
  1810. #ifdef CONFIG_ACPI
  1811. static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
  1812. { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
  1813. { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
  1814. { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
  1815. { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
  1816. { },
  1817. };
  1818. MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
  1819. #endif
  1820. static struct serdev_device_driver qca_serdev_driver = {
  1821. .probe = qca_serdev_probe,
  1822. .remove = qca_serdev_remove,
  1823. .driver = {
  1824. .name = "hci_uart_qca",
  1825. .of_match_table = of_match_ptr(qca_bluetooth_of_match),
  1826. .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
  1827. .shutdown = qca_serdev_shutdown,
  1828. .pm = &qca_pm_ops,
  1829. },
  1830. };
  1831. int __init qca_init(void)
  1832. {
  1833. serdev_device_driver_register(&qca_serdev_driver);
  1834. return hci_uart_register_proto(&qca_proto);
  1835. }
  1836. int __exit qca_deinit(void)
  1837. {
  1838. serdev_device_driver_unregister(&qca_serdev_driver);
  1839. return hci_uart_unregister_proto(&qca_proto);
  1840. }