skd_s1120.h 9.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright 2012 STEC, Inc.
  4. * Copyright (c) 2017 Western Digital Corporation or its affiliates.
  5. */
  6. #ifndef SKD_S1120_H
  7. #define SKD_S1120_H
  8. /*
  9. * Q-channel, 64-bit r/w
  10. */
  11. #define FIT_Q_COMMAND 0x400u
  12. #define FIT_QCMD_QID_MASK (0x3 << 1)
  13. #define FIT_QCMD_QID0 (0x0 << 1)
  14. #define FIT_QCMD_QID_NORMAL FIT_QCMD_QID0
  15. #define FIT_QCMD_QID1 (0x1 << 1)
  16. #define FIT_QCMD_QID2 (0x2 << 1)
  17. #define FIT_QCMD_QID3 (0x3 << 1)
  18. #define FIT_QCMD_FLUSH_QUEUE (0ull) /* add QID */
  19. #define FIT_QCMD_MSGSIZE_MASK (0x3 << 4)
  20. #define FIT_QCMD_MSGSIZE_64 (0x0 << 4)
  21. #define FIT_QCMD_MSGSIZE_128 (0x1 << 4)
  22. #define FIT_QCMD_MSGSIZE_256 (0x2 << 4)
  23. #define FIT_QCMD_MSGSIZE_512 (0x3 << 4)
  24. #define FIT_QCMD_ALIGN L1_CACHE_BYTES
  25. /*
  26. * Control, 32-bit r/w
  27. */
  28. #define FIT_CONTROL 0x500u
  29. #define FIT_CR_HARD_RESET (1u << 0u)
  30. #define FIT_CR_SOFT_RESET (1u << 1u)
  31. #define FIT_CR_DIS_TIMESTAMPS (1u << 6u)
  32. #define FIT_CR_ENABLE_INTERRUPTS (1u << 7u)
  33. /*
  34. * Status, 32-bit, r/o
  35. */
  36. #define FIT_STATUS 0x510u
  37. #define FIT_SR_DRIVE_STATE_MASK 0x000000FFu
  38. #define FIT_SR_SIGNATURE (0xFF << 8)
  39. #define FIT_SR_PIO_DMA (1 << 16)
  40. #define FIT_SR_DRIVE_OFFLINE 0x00
  41. #define FIT_SR_DRIVE_INIT 0x01
  42. /* #define FIT_SR_DRIVE_READY 0x02 */
  43. #define FIT_SR_DRIVE_ONLINE 0x03
  44. #define FIT_SR_DRIVE_BUSY 0x04
  45. #define FIT_SR_DRIVE_FAULT 0x05
  46. #define FIT_SR_DRIVE_DEGRADED 0x06
  47. #define FIT_SR_PCIE_LINK_DOWN 0x07
  48. #define FIT_SR_DRIVE_SOFT_RESET 0x08
  49. #define FIT_SR_DRIVE_INIT_FAULT 0x09
  50. #define FIT_SR_DRIVE_BUSY_SANITIZE 0x0A
  51. #define FIT_SR_DRIVE_BUSY_ERASE 0x0B
  52. #define FIT_SR_DRIVE_FW_BOOTING 0x0C
  53. #define FIT_SR_DRIVE_NEED_FW_DOWNLOAD 0xFE
  54. #define FIT_SR_DEVICE_MISSING 0xFF
  55. #define FIT_SR__RESERVED 0xFFFFFF00u
  56. /*
  57. * FIT_STATUS - Status register data definition
  58. */
  59. #define FIT_SR_STATE_MASK (0xFF << 0)
  60. #define FIT_SR_SIGNATURE (0xFF << 8)
  61. #define FIT_SR_PIO_DMA (1 << 16)
  62. /*
  63. * Interrupt status, 32-bit r/w1c (w1c ==> write 1 to clear)
  64. */
  65. #define FIT_INT_STATUS_HOST 0x520u
  66. #define FIT_ISH_FW_STATE_CHANGE (1u << 0u)
  67. #define FIT_ISH_COMPLETION_POSTED (1u << 1u)
  68. #define FIT_ISH_MSG_FROM_DEV (1u << 2u)
  69. #define FIT_ISH_UNDEFINED_3 (1u << 3u)
  70. #define FIT_ISH_UNDEFINED_4 (1u << 4u)
  71. #define FIT_ISH_Q0_FULL (1u << 5u)
  72. #define FIT_ISH_Q1_FULL (1u << 6u)
  73. #define FIT_ISH_Q2_FULL (1u << 7u)
  74. #define FIT_ISH_Q3_FULL (1u << 8u)
  75. #define FIT_ISH_QCMD_FIFO_OVERRUN (1u << 9u)
  76. #define FIT_ISH_BAD_EXP_ROM_READ (1u << 10u)
  77. #define FIT_INT_DEF_MASK \
  78. (FIT_ISH_FW_STATE_CHANGE | \
  79. FIT_ISH_COMPLETION_POSTED | \
  80. FIT_ISH_MSG_FROM_DEV | \
  81. FIT_ISH_Q0_FULL | \
  82. FIT_ISH_Q1_FULL | \
  83. FIT_ISH_Q2_FULL | \
  84. FIT_ISH_Q3_FULL | \
  85. FIT_ISH_QCMD_FIFO_OVERRUN | \
  86. FIT_ISH_BAD_EXP_ROM_READ)
  87. #define FIT_INT_QUEUE_FULL \
  88. (FIT_ISH_Q0_FULL | \
  89. FIT_ISH_Q1_FULL | \
  90. FIT_ISH_Q2_FULL | \
  91. FIT_ISH_Q3_FULL)
  92. #define MSI_MSG_NWL_ERROR_0 0x00000000
  93. #define MSI_MSG_NWL_ERROR_1 0x00000001
  94. #define MSI_MSG_NWL_ERROR_2 0x00000002
  95. #define MSI_MSG_NWL_ERROR_3 0x00000003
  96. #define MSI_MSG_STATE_CHANGE 0x00000004
  97. #define MSI_MSG_COMPLETION_POSTED 0x00000005
  98. #define MSI_MSG_MSG_FROM_DEV 0x00000006
  99. #define MSI_MSG_RESERVED_0 0x00000007
  100. #define MSI_MSG_RESERVED_1 0x00000008
  101. #define MSI_MSG_QUEUE_0_FULL 0x00000009
  102. #define MSI_MSG_QUEUE_1_FULL 0x0000000A
  103. #define MSI_MSG_QUEUE_2_FULL 0x0000000B
  104. #define MSI_MSG_QUEUE_3_FULL 0x0000000C
  105. #define FIT_INT_RESERVED_MASK \
  106. (FIT_ISH_UNDEFINED_3 | \
  107. FIT_ISH_UNDEFINED_4)
  108. /*
  109. * Interrupt mask, 32-bit r/w
  110. * Bit definitions are the same as FIT_INT_STATUS_HOST
  111. */
  112. #define FIT_INT_MASK_HOST 0x528u
  113. /*
  114. * Message to device, 32-bit r/w
  115. */
  116. #define FIT_MSG_TO_DEVICE 0x540u
  117. /*
  118. * Message from device, 32-bit, r/o
  119. */
  120. #define FIT_MSG_FROM_DEVICE 0x548u
  121. /*
  122. * 32-bit messages to/from device, composition/extraction macros
  123. */
  124. #define FIT_MXD_CONS(TYPE, PARAM, DATA) \
  125. ((((TYPE) & 0xFFu) << 24u) | \
  126. (((PARAM) & 0xFFu) << 16u) | \
  127. (((DATA) & 0xFFFFu) << 0u))
  128. #define FIT_MXD_TYPE(MXD) (((MXD) >> 24u) & 0xFFu)
  129. #define FIT_MXD_PARAM(MXD) (((MXD) >> 16u) & 0xFFu)
  130. #define FIT_MXD_DATA(MXD) (((MXD) >> 0u) & 0xFFFFu)
  131. /*
  132. * Types of messages to/from device
  133. */
  134. #define FIT_MTD_FITFW_INIT 0x01u
  135. #define FIT_MTD_GET_CMDQ_DEPTH 0x02u
  136. #define FIT_MTD_SET_COMPQ_DEPTH 0x03u
  137. #define FIT_MTD_SET_COMPQ_ADDR 0x04u
  138. #define FIT_MTD_ARM_QUEUE 0x05u
  139. #define FIT_MTD_CMD_LOG_HOST_ID 0x07u
  140. #define FIT_MTD_CMD_LOG_TIME_STAMP_LO 0x08u
  141. #define FIT_MTD_CMD_LOG_TIME_STAMP_HI 0x09u
  142. #define FIT_MFD_SMART_EXCEEDED 0x10u
  143. #define FIT_MFD_POWER_DOWN 0x11u
  144. #define FIT_MFD_OFFLINE 0x12u
  145. #define FIT_MFD_ONLINE 0x13u
  146. #define FIT_MFD_FW_RESTARTING 0x14u
  147. #define FIT_MFD_PM_ACTIVE 0x15u
  148. #define FIT_MFD_PM_STANDBY 0x16u
  149. #define FIT_MFD_PM_SLEEP 0x17u
  150. #define FIT_MFD_CMD_PROGRESS 0x18u
  151. #define FIT_MTD_DEBUG 0xFEu
  152. #define FIT_MFD_DEBUG 0xFFu
  153. #define FIT_MFD_MASK (0xFFu)
  154. #define FIT_MFD_DATA_MASK (0xFFu)
  155. #define FIT_MFD_MSG(x) (((x) >> 24) & FIT_MFD_MASK)
  156. #define FIT_MFD_DATA(x) ((x) & FIT_MFD_MASK)
  157. /*
  158. * Extra arg to FIT_MSG_TO_DEVICE, 64-bit r/w
  159. * Used to set completion queue address (FIT_MTD_SET_COMPQ_ADDR)
  160. * (was Response buffer in docs)
  161. */
  162. #define FIT_MSG_TO_DEVICE_ARG 0x580u
  163. /*
  164. * Hardware (ASIC) version, 32-bit r/o
  165. */
  166. #define FIT_HW_VERSION 0x588u
  167. /*
  168. * Scatter/gather list descriptor.
  169. * 32-bytes and must be aligned on a 32-byte boundary.
  170. * All fields are in little endian order.
  171. */
  172. struct fit_sg_descriptor {
  173. uint32_t control;
  174. uint32_t byte_count;
  175. uint64_t host_side_addr;
  176. uint64_t dev_side_addr;
  177. uint64_t next_desc_ptr;
  178. };
  179. #define FIT_SGD_CONTROL_NOT_LAST 0x000u
  180. #define FIT_SGD_CONTROL_LAST 0x40Eu
  181. /*
  182. * Header at the beginning of a FIT message. The header
  183. * is followed by SSDI requests each 64 bytes.
  184. * A FIT message can be up to 512 bytes long and must start
  185. * on a 64-byte boundary.
  186. */
  187. struct fit_msg_hdr {
  188. uint8_t protocol_id;
  189. uint8_t num_protocol_cmds_coalesced;
  190. uint8_t _reserved[62];
  191. };
  192. #define FIT_PROTOCOL_ID_FIT 1
  193. #define FIT_PROTOCOL_ID_SSDI 2
  194. #define FIT_PROTOCOL_ID_SOFIT 3
  195. #define FIT_PROTOCOL_MINOR_VER(mtd_val) ((mtd_val >> 16) & 0xF)
  196. #define FIT_PROTOCOL_MAJOR_VER(mtd_val) ((mtd_val >> 20) & 0xF)
  197. /*
  198. * Format of a completion entry. The completion queue is circular
  199. * and must have at least as many entries as the maximum number
  200. * of commands that may be issued to the device.
  201. *
  202. * There are no head/tail pointers. The cycle value is used to
  203. * infer the presence of new completion records.
  204. * Initially the cycle in all entries is 0, the index is 0, and
  205. * the cycle value to expect is 1. When completions are added
  206. * their cycle values are set to 1. When the index wraps the
  207. * cycle value to expect is incremented.
  208. *
  209. * Command_context is opaque and taken verbatim from the SSDI command.
  210. * All other fields are big endian.
  211. */
  212. #define FIT_PROTOCOL_VERSION_0 0
  213. /*
  214. * Protocol major version 1 completion entry.
  215. * The major protocol version is found in bits
  216. * 20-23 of the FIT_MTD_FITFW_INIT response.
  217. */
  218. struct fit_completion_entry_v1 {
  219. __be32 num_returned_bytes;
  220. uint16_t tag;
  221. uint8_t status; /* SCSI status */
  222. uint8_t cycle;
  223. };
  224. #define FIT_PROTOCOL_VERSION_1 1
  225. #define FIT_PROTOCOL_VERSION_CURRENT FIT_PROTOCOL_VERSION_1
  226. struct fit_comp_error_info {
  227. uint8_t type:7; /* 00: Bits0-6 indicates the type of sense data. */
  228. uint8_t valid:1; /* 00: Bit 7 := 1 ==> info field is valid. */
  229. uint8_t reserved0; /* 01: Obsolete field */
  230. uint8_t key:4; /* 02: Bits0-3 indicate the sense key. */
  231. uint8_t reserved2:1; /* 02: Reserved bit. */
  232. uint8_t bad_length:1; /* 02: Incorrect Length Indicator */
  233. uint8_t end_medium:1; /* 02: End of Medium */
  234. uint8_t file_mark:1; /* 02: Filemark */
  235. uint8_t info[4]; /* 03: */
  236. uint8_t reserved1; /* 07: Additional Sense Length */
  237. uint8_t cmd_spec[4]; /* 08: Command Specific Information */
  238. uint8_t code; /* 0C: Additional Sense Code */
  239. uint8_t qual; /* 0D: Additional Sense Code Qualifier */
  240. uint8_t fruc; /* 0E: Field Replaceable Unit Code */
  241. uint8_t sks_high:7; /* 0F: Sense Key Specific (MSB) */
  242. uint8_t sks_valid:1; /* 0F: Sense Key Specific Valid */
  243. uint16_t sks_low; /* 10: Sense Key Specific (LSW) */
  244. uint16_t reserved3; /* 12: Part of additional sense bytes (unused) */
  245. uint16_t uec; /* 14: Additional Sense Bytes */
  246. uint64_t per __packed; /* 16: Additional Sense Bytes */
  247. uint8_t reserved4[2]; /* 1E: Additional Sense Bytes (unused) */
  248. };
  249. /* Task management constants */
  250. #define SOFT_TASK_SIMPLE 0x00
  251. #define SOFT_TASK_HEAD_OF_QUEUE 0x01
  252. #define SOFT_TASK_ORDERED 0x02
  253. /* Version zero has the last 32 bits reserved,
  254. * Version one has the last 32 bits sg_list_len_bytes;
  255. */
  256. struct skd_command_header {
  257. __be64 sg_list_dma_address;
  258. uint16_t tag;
  259. uint8_t attribute;
  260. uint8_t add_cdb_len; /* In 32 bit words */
  261. __be32 sg_list_len_bytes;
  262. };
  263. struct skd_scsi_request {
  264. struct skd_command_header hdr;
  265. unsigned char cdb[16];
  266. /* unsigned char _reserved[16]; */
  267. };
  268. struct driver_inquiry_data {
  269. uint8_t peripheral_device_type:5;
  270. uint8_t qualifier:3;
  271. uint8_t page_code;
  272. __be16 page_length;
  273. __be16 pcie_bus_number;
  274. uint8_t pcie_device_number;
  275. uint8_t pcie_function_number;
  276. uint8_t pcie_link_speed;
  277. uint8_t pcie_link_lanes;
  278. __be16 pcie_vendor_id;
  279. __be16 pcie_device_id;
  280. __be16 pcie_subsystem_vendor_id;
  281. __be16 pcie_subsystem_device_id;
  282. uint8_t reserved1[2];
  283. uint8_t reserved2[3];
  284. uint8_t driver_version_length;
  285. uint8_t driver_version[0x14];
  286. };
  287. #endif /* SKD_S1120_H */