mtip32xx.h 12 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * mtip32xx.h - Header file for the P320 SSD Block Driver
  4. * Copyright (C) 2011 Micron Technology, Inc.
  5. *
  6. * Portions of this code were derived from works subjected to the
  7. * following copyright:
  8. * Copyright (C) 2009 Integrated Device Technology, Inc.
  9. */
  10. #ifndef __MTIP32XX_H__
  11. #define __MTIP32XX_H__
  12. #include <linux/spinlock.h>
  13. #include <linux/rwsem.h>
  14. #include <linux/ata.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/genhd.h>
  17. /* Offset of Subsystem Device ID in pci confoguration space */
  18. #define PCI_SUBSYSTEM_DEVICEID 0x2E
  19. /* offset of Device Control register in PCIe extended capabilites space */
  20. #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
  21. /* check for erase mode support during secure erase */
  22. #define MTIP_SEC_ERASE_MODE 0x2
  23. /* # of times to retry timed out/failed IOs */
  24. #define MTIP_MAX_RETRIES 2
  25. /* Various timeout values in ms */
  26. #define MTIP_NCQ_CMD_TIMEOUT_MS 15000
  27. #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
  28. #define MTIP_INT_CMD_TIMEOUT_MS 5000
  29. #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
  30. (MTIP_MAX_RETRIES + 1))
  31. /* check for timeouts every 500ms */
  32. #define MTIP_TIMEOUT_CHECK_PERIOD 500
  33. /* ftl rebuild */
  34. #define MTIP_FTL_REBUILD_OFFSET 142
  35. #define MTIP_FTL_REBUILD_MAGIC 0xED51
  36. #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
  37. /* unaligned IO handling */
  38. #define MTIP_MAX_UNALIGNED_SLOTS 2
  39. /* Macro to extract the tag bit number from a tag value. */
  40. #define MTIP_TAG_BIT(tag) (tag & 0x1F)
  41. /*
  42. * Macro to extract the tag index from a tag value. The index
  43. * is used to access the correct s_active/Command Issue register based
  44. * on the tag value.
  45. */
  46. #define MTIP_TAG_INDEX(tag) (tag >> 5)
  47. /*
  48. * Maximum number of scatter gather entries
  49. * a single command may have.
  50. */
  51. #define MTIP_MAX_SG 504
  52. /*
  53. * Maximum number of slot groups (Command Issue & s_active registers)
  54. * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  55. */
  56. #define MTIP_MAX_SLOT_GROUPS 8
  57. /* Internal command tag. */
  58. #define MTIP_TAG_INTERNAL 0
  59. /* Micron Vendor ID & P320x SSD Device ID */
  60. #define PCI_VENDOR_ID_MICRON 0x1344
  61. #define P320H_DEVICE_ID 0x5150
  62. #define P320M_DEVICE_ID 0x5151
  63. #define P320S_DEVICE_ID 0x5152
  64. #define P325M_DEVICE_ID 0x5153
  65. #define P420H_DEVICE_ID 0x5160
  66. #define P420M_DEVICE_ID 0x5161
  67. #define P425M_DEVICE_ID 0x5163
  68. /* Driver name and version strings */
  69. #define MTIP_DRV_NAME "mtip32xx"
  70. #define MTIP_DRV_VERSION "1.3.1"
  71. /* Maximum number of minor device numbers per device. */
  72. #define MTIP_MAX_MINORS 16
  73. /* Maximum number of supported command slots. */
  74. #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
  75. /*
  76. * Per-tag bitfield size in longs.
  77. * Linux bit manipulation functions
  78. * (i.e. test_and_set_bit, find_next_zero_bit)
  79. * manipulate memory in longs, so we try to make the math work.
  80. * take the slot groups and find the number of longs, rounding up.
  81. * Careful! i386 and x86_64 use different size longs!
  82. */
  83. #define U32_PER_LONG (sizeof(long) / sizeof(u32))
  84. #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
  85. (U32_PER_LONG-1))/U32_PER_LONG)
  86. /* BAR number used to access the HBA registers. */
  87. #define MTIP_ABAR 5
  88. #ifdef DEBUG
  89. #define dbg_printk(format, arg...) \
  90. printk(pr_fmt(format), ##arg);
  91. #else
  92. #define dbg_printk(format, arg...)
  93. #endif
  94. #define MTIP_DFS_MAX_BUF_SIZE 1024
  95. enum {
  96. /* below are bit numbers in 'flags' defined in mtip_port */
  97. MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
  98. MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
  99. MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
  100. MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
  101. MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */
  102. MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
  103. (1 << MTIP_PF_EH_ACTIVE_BIT) |
  104. (1 << MTIP_PF_SE_ACTIVE_BIT) |
  105. (1 << MTIP_PF_DM_ACTIVE_BIT) |
  106. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  107. MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */
  108. MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
  109. MTIP_PF_ISSUE_CMDS_BIT = 5,
  110. MTIP_PF_REBUILD_BIT = 6,
  111. MTIP_PF_SVC_THD_STOP_BIT = 8,
  112. MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
  113. (1 << MTIP_PF_ISSUE_CMDS_BIT) |
  114. (1 << MTIP_PF_REBUILD_BIT) |
  115. (1 << MTIP_PF_SVC_THD_STOP_BIT) |
  116. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  117. /* below are bit numbers in 'dd_flag' defined in driver_data */
  118. MTIP_DDF_SEC_LOCK_BIT = 0,
  119. MTIP_DDF_REMOVE_PENDING_BIT = 1,
  120. MTIP_DDF_OVER_TEMP_BIT = 2,
  121. MTIP_DDF_WRITE_PROTECT_BIT = 3,
  122. MTIP_DDF_CLEANUP_BIT = 5,
  123. MTIP_DDF_RESUME_BIT = 6,
  124. MTIP_DDF_INIT_DONE_BIT = 7,
  125. MTIP_DDF_REBUILD_FAILED_BIT = 8,
  126. MTIP_DDF_REMOVAL_BIT = 9,
  127. MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
  128. (1 << MTIP_DDF_SEC_LOCK_BIT) |
  129. (1 << MTIP_DDF_OVER_TEMP_BIT) |
  130. (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
  131. (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
  132. };
  133. struct smart_attr {
  134. u8 attr_id;
  135. __le16 flags;
  136. u8 cur;
  137. u8 worst;
  138. __le32 data;
  139. u8 res[3];
  140. } __packed;
  141. struct mtip_work {
  142. struct work_struct work;
  143. void *port;
  144. int cpu_binding;
  145. u32 completed;
  146. } ____cacheline_aligned_in_smp;
  147. #define DEFINE_HANDLER(group) \
  148. void mtip_workq_sdbf##group(struct work_struct *work) \
  149. { \
  150. struct mtip_work *w = (struct mtip_work *) work; \
  151. mtip_workq_sdbfx(w->port, group, w->completed); \
  152. }
  153. /* Register Frame Information Structure (FIS), host to device. */
  154. struct host_to_dev_fis {
  155. /*
  156. * FIS type.
  157. * - 27h Register FIS, host to device.
  158. * - 34h Register FIS, device to host.
  159. * - 39h DMA Activate FIS, device to host.
  160. * - 41h DMA Setup FIS, bi-directional.
  161. * - 46h Data FIS, bi-directional.
  162. * - 58h BIST Activate FIS, bi-directional.
  163. * - 5Fh PIO Setup FIS, device to host.
  164. * - A1h Set Device Bits FIS, device to host.
  165. */
  166. unsigned char type;
  167. unsigned char opts;
  168. unsigned char command;
  169. unsigned char features;
  170. union {
  171. unsigned char lba_low;
  172. unsigned char sector;
  173. };
  174. union {
  175. unsigned char lba_mid;
  176. unsigned char cyl_low;
  177. };
  178. union {
  179. unsigned char lba_hi;
  180. unsigned char cyl_hi;
  181. };
  182. union {
  183. unsigned char device;
  184. unsigned char head;
  185. };
  186. union {
  187. unsigned char lba_low_ex;
  188. unsigned char sector_ex;
  189. };
  190. union {
  191. unsigned char lba_mid_ex;
  192. unsigned char cyl_low_ex;
  193. };
  194. union {
  195. unsigned char lba_hi_ex;
  196. unsigned char cyl_hi_ex;
  197. };
  198. unsigned char features_ex;
  199. unsigned char sect_count;
  200. unsigned char sect_cnt_ex;
  201. unsigned char res2;
  202. unsigned char control;
  203. unsigned int res3;
  204. };
  205. /* Command header structure. */
  206. struct mtip_cmd_hdr {
  207. /*
  208. * Command options.
  209. * - Bits 31:16 Number of PRD entries.
  210. * - Bits 15:8 Unused in this implementation.
  211. * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
  212. * - Bit 6 Write bit, should be set when writing data to the device.
  213. * - Bit 5 Unused in this implementation.
  214. * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
  215. */
  216. __le32 opts;
  217. /* This field is unsed when using NCQ. */
  218. union {
  219. __le32 byte_count;
  220. __le32 status;
  221. };
  222. /*
  223. * Lower 32 bits of the command table address associated with this
  224. * header. The command table addresses must be 128 byte aligned.
  225. */
  226. __le32 ctba;
  227. /*
  228. * If 64 bit addressing is used this field is the upper 32 bits
  229. * of the command table address associated with this command.
  230. */
  231. __le32 ctbau;
  232. /* Reserved and unused. */
  233. u32 res[4];
  234. };
  235. /* Command scatter gather structure (PRD). */
  236. struct mtip_cmd_sg {
  237. /*
  238. * Low 32 bits of the data buffer address. For P320 this
  239. * address must be 8 byte aligned signified by bits 2:0 being
  240. * set to 0.
  241. */
  242. __le32 dba;
  243. /*
  244. * When 64 bit addressing is used this field is the upper
  245. * 32 bits of the data buffer address.
  246. */
  247. __le32 dba_upper;
  248. /* Unused. */
  249. __le32 reserved;
  250. /*
  251. * Bit 31: interrupt when this data block has been transferred.
  252. * Bits 30..22: reserved
  253. * Bits 21..0: byte count (minus 1). For P320 the byte count must be
  254. * 8 byte aligned signified by bits 2:0 being set to 1.
  255. */
  256. __le32 info;
  257. };
  258. struct mtip_port;
  259. struct mtip_int_cmd;
  260. /* Structure used to describe a command. */
  261. struct mtip_cmd {
  262. void *command; /* ptr to command table entry */
  263. dma_addr_t command_dma; /* corresponding physical address */
  264. int scatter_ents; /* Number of scatter list entries used */
  265. int unaligned; /* command is unaligned on 4k boundary */
  266. union {
  267. struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
  268. struct mtip_int_cmd *icmd;
  269. };
  270. int retries; /* The number of retries left for this command. */
  271. int direction; /* Data transfer direction */
  272. blk_status_t status;
  273. };
  274. /* Structure used to describe a port. */
  275. struct mtip_port {
  276. /* Pointer back to the driver data for this port. */
  277. struct driver_data *dd;
  278. /*
  279. * Used to determine if the data pointed to by the
  280. * identify field is valid.
  281. */
  282. unsigned long identify_valid;
  283. /* Base address of the memory mapped IO for the port. */
  284. void __iomem *mmio;
  285. /* Array of pointers to the memory mapped s_active registers. */
  286. void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
  287. /* Array of pointers to the memory mapped completed registers. */
  288. void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
  289. /* Array of pointers to the memory mapped Command Issue registers. */
  290. void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
  291. /*
  292. * Pointer to the beginning of the command header memory as used
  293. * by the driver.
  294. */
  295. void *command_list;
  296. /*
  297. * Pointer to the beginning of the command header memory as used
  298. * by the DMA.
  299. */
  300. dma_addr_t command_list_dma;
  301. /*
  302. * Pointer to the beginning of the RX FIS memory as used
  303. * by the driver.
  304. */
  305. void *rxfis;
  306. /*
  307. * Pointer to the beginning of the RX FIS memory as used
  308. * by the DMA.
  309. */
  310. dma_addr_t rxfis_dma;
  311. /*
  312. * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
  313. */
  314. void *block1;
  315. /*
  316. * DMA address of region for RX Fis, Identify, RLE10, and SMART
  317. */
  318. dma_addr_t block1_dma;
  319. /*
  320. * Pointer to the beginning of the identify data memory as used
  321. * by the driver.
  322. */
  323. u16 *identify;
  324. /*
  325. * Pointer to the beginning of the identify data memory as used
  326. * by the DMA.
  327. */
  328. dma_addr_t identify_dma;
  329. /*
  330. * Pointer to the beginning of a sector buffer that is used
  331. * by the driver when issuing internal commands.
  332. */
  333. u16 *sector_buffer;
  334. /*
  335. * Pointer to the beginning of a sector buffer that is used
  336. * by the DMA when the driver issues internal commands.
  337. */
  338. dma_addr_t sector_buffer_dma;
  339. u16 *log_buf;
  340. dma_addr_t log_buf_dma;
  341. u8 *smart_buf;
  342. dma_addr_t smart_buf_dma;
  343. /*
  344. * used to queue commands when an internal command is in progress
  345. * or error handling is active
  346. */
  347. unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
  348. /* Used by mtip_service_thread to wait for an event */
  349. wait_queue_head_t svc_wait;
  350. /*
  351. * indicates the state of the port. Also, helps the service thread
  352. * to determine its action on wake up.
  353. */
  354. unsigned long flags;
  355. /*
  356. * Timer used to complete commands that have been active for too long.
  357. */
  358. unsigned long ic_pause_timer;
  359. /* Counter to control queue depth of unaligned IOs */
  360. atomic_t cmd_slot_unal;
  361. /* Spinlock for working around command-issue bug. */
  362. spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
  363. };
  364. /*
  365. * Driver private data structure.
  366. *
  367. * One structure is allocated per probed device.
  368. */
  369. struct driver_data {
  370. void __iomem *mmio; /* Base address of the HBA registers. */
  371. int major; /* Major device number. */
  372. int instance; /* Instance number. First device probed is 0, ... */
  373. struct gendisk *disk; /* Pointer to our gendisk structure. */
  374. struct pci_dev *pdev; /* Pointer to the PCI device structure. */
  375. struct request_queue *queue; /* Our request queue. */
  376. struct blk_mq_tag_set tags; /* blk_mq tags */
  377. struct mtip_port *port; /* Pointer to the port data structure. */
  378. unsigned product_type; /* magic value declaring the product type */
  379. unsigned slot_groups; /* number of slot groups the product supports */
  380. unsigned long index; /* Index to determine the disk name */
  381. unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
  382. struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
  383. struct dentry *dfs_node;
  384. bool sr;
  385. int numa_node; /* NUMA support */
  386. char workq_name[32];
  387. struct workqueue_struct *isr_workq;
  388. atomic_t irq_workers_active;
  389. struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
  390. int isr_binding;
  391. struct block_device *bdev;
  392. struct list_head online_list; /* linkage for online list */
  393. struct list_head remove_list; /* linkage for removing list */
  394. int unal_qdepth; /* qdepth of unaligned IO queue */
  395. };
  396. #endif