pata_radisys.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_radisys.c - Intel PATA/SATA controllers
  4. *
  5. * (C) 2006 Red Hat <alan@lxorguk.ukuu.org.uk>
  6. *
  7. * Some parts based on ata_piix.c by Jeff Garzik and others.
  8. *
  9. * A PIIX relative, this device has a single ATA channel and no
  10. * slave timings, SITRE or PPE. In that sense it is a close relative
  11. * of the original PIIX. It does however support UDMA 33/66 per channel
  12. * although no other modes/timings. Also lacking is 32bit I/O on the ATA
  13. * port.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/pci.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <linux/device.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #include <linux/ata.h>
  24. #define DRV_NAME "pata_radisys"
  25. #define DRV_VERSION "0.4.4"
  26. /**
  27. * radisys_set_piomode - Initialize host controller PATA PIO timings
  28. * @ap: ATA port
  29. * @adev: Device whose timings we are configuring
  30. *
  31. * Set PIO mode for device, in host controller PCI config space.
  32. *
  33. * LOCKING:
  34. * None (inherited from caller).
  35. */
  36. static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
  37. {
  38. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  39. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  40. u16 idetm_data;
  41. int control = 0;
  42. /*
  43. * See Intel Document 298600-004 for the timing programing rules
  44. * for PIIX/ICH. Note that the early PIIX does not have the slave
  45. * timing port at 0x44. The Radisys is a relative of the PIIX
  46. * but not the same so be careful.
  47. */
  48. static const /* ISP RTC */
  49. u8 timings[][2] = { { 0, 0 }, /* Check me */
  50. { 0, 0 },
  51. { 1, 1 },
  52. { 2, 2 },
  53. { 3, 3 }, };
  54. if (pio > 0)
  55. control |= 1; /* TIME1 enable */
  56. if (ata_pio_need_iordy(adev))
  57. control |= 2; /* IE IORDY */
  58. pci_read_config_word(dev, 0x40, &idetm_data);
  59. /* Enable IE and TIME as appropriate. Clear the other
  60. drive timing bits */
  61. idetm_data &= 0xCCCC;
  62. idetm_data |= (control << (4 * adev->devno));
  63. idetm_data |= (timings[pio][0] << 12) |
  64. (timings[pio][1] << 8);
  65. pci_write_config_word(dev, 0x40, idetm_data);
  66. /* Track which port is configured */
  67. ap->private_data = adev;
  68. }
  69. /**
  70. * radisys_set_dmamode - Initialize host controller PATA DMA timings
  71. * @ap: Port whose timings we are configuring
  72. * @adev: Device to program
  73. *
  74. * Set MWDMA mode for device, in host controller PCI config space.
  75. *
  76. * LOCKING:
  77. * None (inherited from caller).
  78. */
  79. static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
  80. {
  81. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  82. u16 idetm_data;
  83. u8 udma_enable;
  84. static const /* ISP RTC */
  85. u8 timings[][2] = { { 0, 0 },
  86. { 0, 0 },
  87. { 1, 1 },
  88. { 2, 2 },
  89. { 3, 3 }, };
  90. /*
  91. * MWDMA is driven by the PIO timings. We must also enable
  92. * IORDY unconditionally.
  93. */
  94. pci_read_config_word(dev, 0x40, &idetm_data);
  95. pci_read_config_byte(dev, 0x48, &udma_enable);
  96. if (adev->dma_mode < XFER_UDMA_0) {
  97. unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
  98. const unsigned int needed_pio[3] = {
  99. XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
  100. };
  101. int pio = needed_pio[mwdma] - XFER_PIO_0;
  102. int control = 3; /* IORDY|TIME0 */
  103. /* If the drive MWDMA is faster than it can do PIO then
  104. we must force PIO0 for PIO cycles. */
  105. if (adev->pio_mode < needed_pio[mwdma])
  106. control = 1;
  107. /* Mask out the relevant control and timing bits we will load. Also
  108. clear the other drive TIME register as a precaution */
  109. idetm_data &= 0xCCCC;
  110. idetm_data |= control << (4 * adev->devno);
  111. idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
  112. udma_enable &= ~(1 << adev->devno);
  113. } else {
  114. u8 udma_mode;
  115. /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
  116. pci_read_config_byte(dev, 0x4A, &udma_mode);
  117. if (adev->xfer_mode == XFER_UDMA_2)
  118. udma_mode &= ~(2 << (adev->devno * 4));
  119. else /* UDMA 4 */
  120. udma_mode |= (2 << (adev->devno * 4));
  121. pci_write_config_byte(dev, 0x4A, udma_mode);
  122. udma_enable |= (1 << adev->devno);
  123. }
  124. pci_write_config_word(dev, 0x40, idetm_data);
  125. pci_write_config_byte(dev, 0x48, udma_enable);
  126. /* Track which port is configured */
  127. ap->private_data = adev;
  128. }
  129. /**
  130. * radisys_qc_issue - command issue
  131. * @qc: command pending
  132. *
  133. * Called when the libata layer is about to issue a command. We wrap
  134. * this interface so that we can load the correct ATA timings if
  135. * necessary. Our logic also clears TIME0/TIME1 for the other device so
  136. * that, even if we get this wrong, cycles to the other device will
  137. * be made PIO0.
  138. */
  139. static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc)
  140. {
  141. struct ata_port *ap = qc->ap;
  142. struct ata_device *adev = qc->dev;
  143. if (adev != ap->private_data) {
  144. /* UDMA timing is not shared */
  145. if (adev->dma_mode < XFER_UDMA_0) {
  146. if (adev->dma_mode)
  147. radisys_set_dmamode(ap, adev);
  148. else if (adev->pio_mode)
  149. radisys_set_piomode(ap, adev);
  150. }
  151. }
  152. return ata_bmdma_qc_issue(qc);
  153. }
  154. static struct scsi_host_template radisys_sht = {
  155. ATA_BMDMA_SHT(DRV_NAME),
  156. };
  157. static struct ata_port_operations radisys_pata_ops = {
  158. .inherits = &ata_bmdma_port_ops,
  159. .qc_issue = radisys_qc_issue,
  160. .cable_detect = ata_cable_unknown,
  161. .set_piomode = radisys_set_piomode,
  162. .set_dmamode = radisys_set_dmamode,
  163. };
  164. /**
  165. * radisys_init_one - Register PIIX ATA PCI device with kernel services
  166. * @pdev: PCI device to register
  167. * @ent: Entry in radisys_pci_tbl matching with @pdev
  168. *
  169. * Called from kernel PCI layer. We probe for combined mode (sigh),
  170. * and then hand over control to libata, for it to do the rest.
  171. *
  172. * LOCKING:
  173. * Inherited from PCI layer (may sleep).
  174. *
  175. * RETURNS:
  176. * Zero on success, or -ERRNO value.
  177. */
  178. static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  179. {
  180. static const struct ata_port_info info = {
  181. .flags = ATA_FLAG_SLAVE_POSS,
  182. .pio_mask = ATA_PIO4,
  183. .mwdma_mask = ATA_MWDMA12_ONLY,
  184. .udma_mask = ATA_UDMA24_ONLY,
  185. .port_ops = &radisys_pata_ops,
  186. };
  187. const struct ata_port_info *ppi[] = { &info, NULL };
  188. ata_print_version_once(&pdev->dev, DRV_VERSION);
  189. return ata_pci_bmdma_init_one(pdev, ppi, &radisys_sht, NULL, 0);
  190. }
  191. static const struct pci_device_id radisys_pci_tbl[] = {
  192. { PCI_VDEVICE(RADISYS, 0x8201), },
  193. { } /* terminate list */
  194. };
  195. static struct pci_driver radisys_pci_driver = {
  196. .name = DRV_NAME,
  197. .id_table = radisys_pci_tbl,
  198. .probe = radisys_init_one,
  199. .remove = ata_pci_remove_one,
  200. #ifdef CONFIG_PM_SLEEP
  201. .suspend = ata_pci_device_suspend,
  202. .resume = ata_pci_device_resume,
  203. #endif
  204. };
  205. module_pci_driver(radisys_pci_driver);
  206. MODULE_AUTHOR("Alan Cox");
  207. MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
  208. MODULE_LICENSE("GPL");
  209. MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
  210. MODULE_VERSION(DRV_VERSION);