pata_oldpiix.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_oldpiix.c - Intel PATA/SATA controllers
  4. *
  5. * (C) 2005 Red Hat
  6. *
  7. * Some parts based on ata_piix.c by Jeff Garzik and others.
  8. *
  9. * Early PIIX differs significantly from the later PIIX as it lacks
  10. * SITRE and the slave timing registers. This means that you have to
  11. * set timing per channel, or be clever. Libata tells us whenever it
  12. * does drive selection and we use this to reload the timings.
  13. *
  14. * Because of these behaviour differences PIIX gets its own driver module.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/pci.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/delay.h>
  21. #include <linux/device.h>
  22. #include <scsi/scsi_host.h>
  23. #include <linux/libata.h>
  24. #include <linux/ata.h>
  25. #define DRV_NAME "pata_oldpiix"
  26. #define DRV_VERSION "0.5.5"
  27. /**
  28. * oldpiix_pre_reset - probe begin
  29. * @link: ATA link
  30. * @deadline: deadline jiffies for the operation
  31. *
  32. * Set up cable type and use generic probe init
  33. */
  34. static int oldpiix_pre_reset(struct ata_link *link, unsigned long deadline)
  35. {
  36. struct ata_port *ap = link->ap;
  37. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  38. static const struct pci_bits oldpiix_enable_bits[] = {
  39. { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
  40. { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
  41. };
  42. if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no]))
  43. return -ENOENT;
  44. return ata_sff_prereset(link, deadline);
  45. }
  46. /**
  47. * oldpiix_set_piomode - Initialize host controller PATA PIO timings
  48. * @ap: Port whose timings we are configuring
  49. * @adev: Device whose timings we are configuring
  50. *
  51. * Set PIO mode for device, in host controller PCI config space.
  52. *
  53. * LOCKING:
  54. * None (inherited from caller).
  55. */
  56. static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev)
  57. {
  58. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  59. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  60. unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
  61. u16 idetm_data;
  62. int control = 0;
  63. /*
  64. * See Intel Document 298600-004 for the timing programing rules
  65. * for PIIX/ICH. Note that the early PIIX does not have the slave
  66. * timing port at 0x44.
  67. */
  68. static const /* ISP RTC */
  69. u8 timings[][2] = { { 0, 0 },
  70. { 0, 0 },
  71. { 1, 0 },
  72. { 2, 1 },
  73. { 2, 3 }, };
  74. if (pio > 1)
  75. control |= 1; /* TIME */
  76. if (ata_pio_need_iordy(adev))
  77. control |= 2; /* IE */
  78. /* Intel specifies that the prefetch/posting is for disk only */
  79. if (adev->class == ATA_DEV_ATA)
  80. control |= 4; /* PPE */
  81. pci_read_config_word(dev, idetm_port, &idetm_data);
  82. /*
  83. * Set PPE, IE and TIME as appropriate.
  84. * Clear the other drive's timing bits.
  85. */
  86. if (adev->devno == 0) {
  87. idetm_data &= 0xCCE0;
  88. idetm_data |= control;
  89. } else {
  90. idetm_data &= 0xCC0E;
  91. idetm_data |= (control << 4);
  92. }
  93. idetm_data |= (timings[pio][0] << 12) |
  94. (timings[pio][1] << 8);
  95. pci_write_config_word(dev, idetm_port, idetm_data);
  96. /* Track which port is configured */
  97. ap->private_data = adev;
  98. }
  99. /**
  100. * oldpiix_set_dmamode - Initialize host controller PATA DMA timings
  101. * @ap: Port whose timings we are configuring
  102. * @adev: Device to program
  103. *
  104. * Set MWDMA mode for device, in host controller PCI config space.
  105. *
  106. * LOCKING:
  107. * None (inherited from caller).
  108. */
  109. static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
  110. {
  111. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  112. u8 idetm_port = ap->port_no ? 0x42 : 0x40;
  113. u16 idetm_data;
  114. static const /* ISP RTC */
  115. u8 timings[][2] = { { 0, 0 },
  116. { 0, 0 },
  117. { 1, 0 },
  118. { 2, 1 },
  119. { 2, 3 }, };
  120. /*
  121. * MWDMA is driven by the PIO timings. We must also enable
  122. * IORDY unconditionally along with TIME1. PPE has already
  123. * been set when the PIO timing was set.
  124. */
  125. unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
  126. unsigned int control;
  127. const unsigned int needed_pio[3] = {
  128. XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
  129. };
  130. int pio = needed_pio[mwdma] - XFER_PIO_0;
  131. pci_read_config_word(dev, idetm_port, &idetm_data);
  132. control = 3; /* IORDY|TIME0 */
  133. /* Intel specifies that the PPE functionality is for disk only */
  134. if (adev->class == ATA_DEV_ATA)
  135. control |= 4; /* PPE enable */
  136. /* If the drive MWDMA is faster than it can do PIO then
  137. we must force PIO into PIO0 */
  138. if (adev->pio_mode < needed_pio[mwdma])
  139. /* Enable DMA timing only */
  140. control |= 8; /* PIO cycles in PIO0 */
  141. /* Mask out the relevant control and timing bits we will load. Also
  142. clear the other drive TIME register as a precaution */
  143. if (adev->devno == 0) {
  144. idetm_data &= 0xCCE0;
  145. idetm_data |= control;
  146. } else {
  147. idetm_data &= 0xCC0E;
  148. idetm_data |= (control << 4);
  149. }
  150. idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
  151. pci_write_config_word(dev, idetm_port, idetm_data);
  152. /* Track which port is configured */
  153. ap->private_data = adev;
  154. }
  155. /**
  156. * oldpiix_qc_issue - command issue
  157. * @qc: command pending
  158. *
  159. * Called when the libata layer is about to issue a command. We wrap
  160. * this interface so that we can load the correct ATA timings if
  161. * necessary. Our logic also clears TIME0/TIME1 for the other device so
  162. * that, even if we get this wrong, cycles to the other device will
  163. * be made PIO0.
  164. */
  165. static unsigned int oldpiix_qc_issue(struct ata_queued_cmd *qc)
  166. {
  167. struct ata_port *ap = qc->ap;
  168. struct ata_device *adev = qc->dev;
  169. if (adev != ap->private_data) {
  170. oldpiix_set_piomode(ap, adev);
  171. if (ata_dma_enabled(adev))
  172. oldpiix_set_dmamode(ap, adev);
  173. }
  174. return ata_bmdma_qc_issue(qc);
  175. }
  176. static struct scsi_host_template oldpiix_sht = {
  177. ATA_BMDMA_SHT(DRV_NAME),
  178. };
  179. static struct ata_port_operations oldpiix_pata_ops = {
  180. .inherits = &ata_bmdma_port_ops,
  181. .qc_issue = oldpiix_qc_issue,
  182. .cable_detect = ata_cable_40wire,
  183. .set_piomode = oldpiix_set_piomode,
  184. .set_dmamode = oldpiix_set_dmamode,
  185. .prereset = oldpiix_pre_reset,
  186. };
  187. /**
  188. * oldpiix_init_one - Register PIIX ATA PCI device with kernel services
  189. * @pdev: PCI device to register
  190. * @ent: Entry in oldpiix_pci_tbl matching with @pdev
  191. *
  192. * Called from kernel PCI layer. We probe for combined mode (sigh),
  193. * and then hand over control to libata, for it to do the rest.
  194. *
  195. * LOCKING:
  196. * Inherited from PCI layer (may sleep).
  197. *
  198. * RETURNS:
  199. * Zero on success, or -ERRNO value.
  200. */
  201. static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  202. {
  203. static const struct ata_port_info info = {
  204. .flags = ATA_FLAG_SLAVE_POSS,
  205. .pio_mask = ATA_PIO4,
  206. .mwdma_mask = ATA_MWDMA12_ONLY,
  207. .port_ops = &oldpiix_pata_ops,
  208. };
  209. const struct ata_port_info *ppi[] = { &info, NULL };
  210. ata_print_version_once(&pdev->dev, DRV_VERSION);
  211. return ata_pci_bmdma_init_one(pdev, ppi, &oldpiix_sht, NULL, 0);
  212. }
  213. static const struct pci_device_id oldpiix_pci_tbl[] = {
  214. { PCI_VDEVICE(INTEL, 0x1230), },
  215. { } /* terminate list */
  216. };
  217. static struct pci_driver oldpiix_pci_driver = {
  218. .name = DRV_NAME,
  219. .id_table = oldpiix_pci_tbl,
  220. .probe = oldpiix_init_one,
  221. .remove = ata_pci_remove_one,
  222. #ifdef CONFIG_PM_SLEEP
  223. .suspend = ata_pci_device_suspend,
  224. .resume = ata_pci_device_resume,
  225. #endif
  226. };
  227. module_pci_driver(oldpiix_pci_driver);
  228. MODULE_AUTHOR("Alan Cox");
  229. MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers");
  230. MODULE_LICENSE("GPL");
  231. MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl);
  232. MODULE_VERSION(DRV_VERSION);