pata_it8213.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_it8213.c - iTE Tech. Inc. IT8213 PATA driver
  4. *
  5. * The IT8213 is a very Intel ICH like device for timing purposes, having
  6. * a similar register layout and the same split clock arrangement. Cable
  7. * detection is different, and it does not have slave channels or all the
  8. * clutter of later ICH/SATA setups.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/pci.h>
  13. #include <linux/blkdev.h>
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <scsi/scsi_host.h>
  17. #include <linux/libata.h>
  18. #include <linux/ata.h>
  19. #define DRV_NAME "pata_it8213"
  20. #define DRV_VERSION "0.0.3"
  21. /**
  22. * it8213_pre_reset - probe begin
  23. * @link: link
  24. * @deadline: deadline jiffies for the operation
  25. *
  26. * Filter out ports by the enable bits before doing the normal reset
  27. * and probe.
  28. */
  29. static int it8213_pre_reset(struct ata_link *link, unsigned long deadline)
  30. {
  31. static const struct pci_bits it8213_enable_bits[] = {
  32. { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
  33. };
  34. struct ata_port *ap = link->ap;
  35. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  36. if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no]))
  37. return -ENOENT;
  38. return ata_sff_prereset(link, deadline);
  39. }
  40. /**
  41. * it8213_cable_detect - check for 40/80 pin
  42. * @ap: Port
  43. *
  44. * Perform cable detection for the 8213 ATA interface. This is
  45. * different to the PIIX arrangement
  46. */
  47. static int it8213_cable_detect(struct ata_port *ap)
  48. {
  49. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  50. u8 tmp;
  51. pci_read_config_byte(pdev, 0x42, &tmp);
  52. if (tmp & 2) /* The initial docs are incorrect */
  53. return ATA_CBL_PATA40;
  54. return ATA_CBL_PATA80;
  55. }
  56. /**
  57. * it8213_set_piomode - Initialize host controller PATA PIO timings
  58. * @ap: Port whose timings we are configuring
  59. * @adev: Device whose timings we are configuring
  60. *
  61. * Set PIO mode for device, in host controller PCI config space.
  62. *
  63. * LOCKING:
  64. * None (inherited from caller).
  65. */
  66. static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
  67. {
  68. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  69. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  70. unsigned int master_port = ap->port_no ? 0x42 : 0x40;
  71. u16 master_data;
  72. int control = 0;
  73. /*
  74. * See Intel Document 298600-004 for the timing programing rules
  75. * for PIIX/ICH. The 8213 is a clone so very similar
  76. */
  77. static const /* ISP RTC */
  78. u8 timings[][2] = { { 0, 0 },
  79. { 0, 0 },
  80. { 1, 0 },
  81. { 2, 1 },
  82. { 2, 3 }, };
  83. if (pio > 1)
  84. control |= 1; /* TIME */
  85. if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */
  86. control |= 2; /* IE */
  87. /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
  88. if (adev->class != ATA_DEV_ATA)
  89. control |= 4; /* PPE */
  90. pci_read_config_word(dev, master_port, &master_data);
  91. /* Set PPE, IE, and TIME as appropriate */
  92. if (adev->devno == 0) {
  93. master_data &= 0xCCF0;
  94. master_data |= control;
  95. master_data |= (timings[pio][0] << 12) |
  96. (timings[pio][1] << 8);
  97. } else {
  98. u8 slave_data;
  99. master_data &= 0xFF0F;
  100. master_data |= (control << 4);
  101. /* Slave timing in separate register */
  102. pci_read_config_byte(dev, 0x44, &slave_data);
  103. slave_data &= 0xF0;
  104. slave_data |= (timings[pio][0] << 2) | timings[pio][1];
  105. pci_write_config_byte(dev, 0x44, slave_data);
  106. }
  107. master_data |= 0x4000; /* Ensure SITRE is set */
  108. pci_write_config_word(dev, master_port, master_data);
  109. }
  110. /**
  111. * it8213_set_dmamode - Initialize host controller PATA DMA timings
  112. * @ap: Port whose timings we are configuring
  113. * @adev: Device to program
  114. *
  115. * Set UDMA/MWDMA mode for device, in host controller PCI config space.
  116. * This device is basically an ICH alike.
  117. *
  118. * LOCKING:
  119. * None (inherited from caller).
  120. */
  121. static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
  122. {
  123. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  124. u16 master_data;
  125. u8 speed = adev->dma_mode;
  126. int devid = adev->devno;
  127. u8 udma_enable;
  128. static const /* ISP RTC */
  129. u8 timings[][2] = { { 0, 0 },
  130. { 0, 0 },
  131. { 1, 0 },
  132. { 2, 1 },
  133. { 2, 3 }, };
  134. pci_read_config_word(dev, 0x40, &master_data);
  135. pci_read_config_byte(dev, 0x48, &udma_enable);
  136. if (speed >= XFER_UDMA_0) {
  137. unsigned int udma = adev->dma_mode - XFER_UDMA_0;
  138. u16 udma_timing;
  139. u16 ideconf;
  140. int u_clock, u_speed;
  141. /* Clocks follow the PIIX style */
  142. u_speed = min(2 - (udma & 1), udma);
  143. if (udma > 4)
  144. u_clock = 0x1000; /* 100Mhz */
  145. else if (udma > 2)
  146. u_clock = 1; /* 66Mhz */
  147. else
  148. u_clock = 0; /* 33Mhz */
  149. udma_enable |= (1 << devid);
  150. /* Load the UDMA cycle time */
  151. pci_read_config_word(dev, 0x4A, &udma_timing);
  152. udma_timing &= ~(3 << (4 * devid));
  153. udma_timing |= u_speed << (4 * devid);
  154. pci_write_config_word(dev, 0x4A, udma_timing);
  155. /* Load the clock selection */
  156. pci_read_config_word(dev, 0x54, &ideconf);
  157. ideconf &= ~(0x1001 << devid);
  158. ideconf |= u_clock << devid;
  159. pci_write_config_word(dev, 0x54, ideconf);
  160. } else {
  161. /*
  162. * MWDMA is driven by the PIO timings. We must also enable
  163. * IORDY unconditionally along with TIME1. PPE has already
  164. * been set when the PIO timing was set.
  165. */
  166. unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
  167. unsigned int control;
  168. u8 slave_data;
  169. static const unsigned int needed_pio[3] = {
  170. XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
  171. };
  172. int pio = needed_pio[mwdma] - XFER_PIO_0;
  173. control = 3; /* IORDY|TIME1 */
  174. /* If the drive MWDMA is faster than it can do PIO then
  175. we must force PIO into PIO0 */
  176. if (adev->pio_mode < needed_pio[mwdma])
  177. /* Enable DMA timing only */
  178. control |= 8; /* PIO cycles in PIO0 */
  179. if (devid) { /* Slave */
  180. master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */
  181. master_data |= control << 4;
  182. pci_read_config_byte(dev, 0x44, &slave_data);
  183. slave_data &= 0xF0;
  184. /* Load the matching timing */
  185. slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
  186. pci_write_config_byte(dev, 0x44, slave_data);
  187. } else { /* Master */
  188. master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY
  189. and master timing bits */
  190. master_data |= control;
  191. master_data |=
  192. (timings[pio][0] << 12) |
  193. (timings[pio][1] << 8);
  194. }
  195. udma_enable &= ~(1 << devid);
  196. pci_write_config_word(dev, 0x40, master_data);
  197. }
  198. pci_write_config_byte(dev, 0x48, udma_enable);
  199. }
  200. static struct scsi_host_template it8213_sht = {
  201. ATA_BMDMA_SHT(DRV_NAME),
  202. };
  203. static struct ata_port_operations it8213_ops = {
  204. .inherits = &ata_bmdma_port_ops,
  205. .cable_detect = it8213_cable_detect,
  206. .set_piomode = it8213_set_piomode,
  207. .set_dmamode = it8213_set_dmamode,
  208. .prereset = it8213_pre_reset,
  209. };
  210. /**
  211. * it8213_init_one - Register 8213 ATA PCI device with kernel services
  212. * @pdev: PCI device to register
  213. * @ent: Entry in it8213_pci_tbl matching with @pdev
  214. *
  215. * Called from kernel PCI layer.
  216. *
  217. * LOCKING:
  218. * Inherited from PCI layer (may sleep).
  219. *
  220. * RETURNS:
  221. * Zero on success, or -ERRNO value.
  222. */
  223. static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  224. {
  225. static const struct ata_port_info info = {
  226. .flags = ATA_FLAG_SLAVE_POSS,
  227. .pio_mask = ATA_PIO4,
  228. .mwdma_mask = ATA_MWDMA12_ONLY,
  229. .udma_mask = ATA_UDMA6,
  230. .port_ops = &it8213_ops,
  231. };
  232. /* Current IT8213 stuff is single port */
  233. const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
  234. ata_print_version_once(&pdev->dev, DRV_VERSION);
  235. return ata_pci_bmdma_init_one(pdev, ppi, &it8213_sht, NULL, 0);
  236. }
  237. static const struct pci_device_id it8213_pci_tbl[] = {
  238. { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), },
  239. { } /* terminate list */
  240. };
  241. static struct pci_driver it8213_pci_driver = {
  242. .name = DRV_NAME,
  243. .id_table = it8213_pci_tbl,
  244. .probe = it8213_init_one,
  245. .remove = ata_pci_remove_one,
  246. #ifdef CONFIG_PM_SLEEP
  247. .suspend = ata_pci_device_suspend,
  248. .resume = ata_pci_device_resume,
  249. #endif
  250. };
  251. module_pci_driver(it8213_pci_driver);
  252. MODULE_AUTHOR("Alan Cox");
  253. MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
  254. MODULE_LICENSE("GPL");
  255. MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
  256. MODULE_VERSION(DRV_VERSION);