ata_generic.c 8.0 KB

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  1. /*
  2. * ata_generic.c - Generic PATA/SATA controller driver.
  3. * Copyright 2005 Red Hat Inc, all rights reserved.
  4. *
  5. * Elements from ide/pci/generic.c
  6. * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
  7. * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com>
  8. *
  9. * May be copied or modified under the terms of the GNU General Public License
  10. *
  11. * Driver for PCI IDE interfaces implementing the standard bus mastering
  12. * interface functionality. This assumes the BIOS did the drive set up and
  13. * tuning for us. By default we do not grab all IDE class devices as they
  14. * may have other drivers or need fixups to avoid problems. Instead we keep
  15. * a default list of stuff without documentation/driver that appears to
  16. * work.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/pci.h>
  21. #include <linux/blkdev.h>
  22. #include <linux/delay.h>
  23. #include <scsi/scsi_host.h>
  24. #include <linux/libata.h>
  25. #define DRV_NAME "ata_generic"
  26. #define DRV_VERSION "0.2.15"
  27. /*
  28. * A generic parallel ATA driver using libata
  29. */
  30. enum {
  31. ATA_GEN_CLASS_MATCH = (1 << 0),
  32. ATA_GEN_FORCE_DMA = (1 << 1),
  33. ATA_GEN_INTEL_IDER = (1 << 2),
  34. };
  35. /**
  36. * generic_set_mode - mode setting
  37. * @link: link to set up
  38. * @unused: returned device on error
  39. *
  40. * Use a non standard set_mode function. We don't want to be tuned.
  41. * The BIOS configured everything. Our job is not to fiddle. We
  42. * read the dma enabled bits from the PCI configuration of the device
  43. * and respect them.
  44. */
  45. static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
  46. {
  47. struct ata_port *ap = link->ap;
  48. const struct pci_device_id *id = ap->host->private_data;
  49. int dma_enabled = 0;
  50. struct ata_device *dev;
  51. if (id->driver_data & ATA_GEN_FORCE_DMA) {
  52. dma_enabled = 0xff;
  53. } else if (ap->ioaddr.bmdma_addr) {
  54. /* Bits 5 and 6 indicate if DMA is active on master/slave */
  55. dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
  56. }
  57. ata_for_each_dev(dev, link, ENABLED) {
  58. /* We don't really care */
  59. dev->pio_mode = XFER_PIO_0;
  60. dev->dma_mode = XFER_MW_DMA_0;
  61. /* We do need the right mode information for DMA or PIO
  62. and this comes from the current configuration flags */
  63. if (dma_enabled & (1 << (5 + dev->devno))) {
  64. unsigned int xfer_mask = ata_id_xfermask(dev->id);
  65. const char *name;
  66. if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
  67. name = ata_mode_string(xfer_mask);
  68. else {
  69. /* SWDMA perhaps? */
  70. name = "DMA";
  71. xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
  72. }
  73. ata_dev_info(dev, "configured for %s\n", name);
  74. dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
  75. dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
  76. dev->flags &= ~ATA_DFLAG_PIO;
  77. } else {
  78. ata_dev_info(dev, "configured for PIO\n");
  79. dev->xfer_mode = XFER_PIO_0;
  80. dev->xfer_shift = ATA_SHIFT_PIO;
  81. dev->flags |= ATA_DFLAG_PIO;
  82. }
  83. }
  84. return 0;
  85. }
  86. static struct scsi_host_template generic_sht = {
  87. ATA_BMDMA_SHT(DRV_NAME),
  88. };
  89. static struct ata_port_operations generic_port_ops = {
  90. .inherits = &ata_bmdma_port_ops,
  91. .cable_detect = ata_cable_unknown,
  92. .set_mode = generic_set_mode,
  93. };
  94. static int all_generic_ide; /* Set to claim all devices */
  95. /**
  96. * is_intel_ider - identify intel IDE-R devices
  97. * @dev: PCI device
  98. *
  99. * Distinguish Intel IDE-R controller devices from other Intel IDE
  100. * devices. IDE-R devices have no timing registers and are in
  101. * most respects virtual. They should be driven by the ata_generic
  102. * driver.
  103. *
  104. * IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
  105. * it non zero. All Intel ATA has 0x40 writable (timing), but it is
  106. * not writable on IDE-R devices (this is guaranteed).
  107. */
  108. static int is_intel_ider(struct pci_dev *dev)
  109. {
  110. /* For Intel IDE the value at 0xF8 is only zero on IDE-R
  111. interfaces */
  112. u32 r;
  113. u16 t;
  114. /* Check the manufacturing ID, it will be zero for IDE-R */
  115. pci_read_config_dword(dev, 0xF8, &r);
  116. /* Not IDE-R: punt so that ata_(old)piix gets it */
  117. if (r != 0)
  118. return 0;
  119. /* 0xF8 will also be zero on some early Intel IDE devices
  120. but they will have a sane timing register */
  121. pci_read_config_word(dev, 0x40, &t);
  122. if (t != 0)
  123. return 0;
  124. /* Finally check if the timing register is writable so that
  125. we eliminate any early devices hot-docked in a docking
  126. station */
  127. pci_write_config_word(dev, 0x40, 1);
  128. pci_read_config_word(dev, 0x40, &t);
  129. if (t) {
  130. pci_write_config_word(dev, 0x40, 0);
  131. return 0;
  132. }
  133. return 1;
  134. }
  135. /**
  136. * ata_generic_init - attach generic IDE
  137. * @dev: PCI device found
  138. * @id: match entry
  139. *
  140. * Called each time a matching IDE interface is found. We check if the
  141. * interface is one we wish to claim and if so we perform any chip
  142. * specific hacks then let the ATA layer do the heavy lifting.
  143. */
  144. static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  145. {
  146. u16 command;
  147. static const struct ata_port_info info = {
  148. .flags = ATA_FLAG_SLAVE_POSS,
  149. .pio_mask = ATA_PIO4,
  150. .mwdma_mask = ATA_MWDMA2,
  151. .udma_mask = ATA_UDMA5,
  152. .port_ops = &generic_port_ops
  153. };
  154. const struct ata_port_info *ppi[] = { &info, NULL };
  155. /* Don't use the generic entry unless instructed to do so */
  156. if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
  157. return -ENODEV;
  158. if ((id->driver_data & ATA_GEN_INTEL_IDER) && !all_generic_ide)
  159. if (!is_intel_ider(dev))
  160. return -ENODEV;
  161. /* Devices that need care */
  162. if (dev->vendor == PCI_VENDOR_ID_UMC &&
  163. dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
  164. (!(PCI_FUNC(dev->devfn) & 1)))
  165. return -ENODEV;
  166. if (dev->vendor == PCI_VENDOR_ID_OPTI &&
  167. dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
  168. (!(PCI_FUNC(dev->devfn) & 1)))
  169. return -ENODEV;
  170. /* Don't re-enable devices in generic mode or we will break some
  171. motherboards with disabled and unused IDE controllers */
  172. pci_read_config_word(dev, PCI_COMMAND, &command);
  173. if (!(command & PCI_COMMAND_IO))
  174. return -ENODEV;
  175. if (dev->vendor == PCI_VENDOR_ID_AL)
  176. ata_pci_bmdma_clear_simplex(dev);
  177. if (dev->vendor == PCI_VENDOR_ID_ATI) {
  178. int rc = pcim_enable_device(dev);
  179. if (rc < 0)
  180. return rc;
  181. pcim_pin_device(dev);
  182. }
  183. return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
  184. }
  185. static struct pci_device_id ata_generic[] = {
  186. { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
  187. { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
  188. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), },
  189. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), },
  190. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), },
  191. { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), },
  192. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), },
  193. { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), },
  194. { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
  195. .driver_data = ATA_GEN_FORCE_DMA },
  196. #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
  197. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
  198. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
  199. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
  200. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
  201. #endif
  202. /* Intel, IDE class device */
  203. { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  204. PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
  205. .driver_data = ATA_GEN_INTEL_IDER },
  206. /* Must come last. If you add entries adjust this table appropriately */
  207. { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
  208. .driver_data = ATA_GEN_CLASS_MATCH },
  209. { 0, },
  210. };
  211. static struct pci_driver ata_generic_pci_driver = {
  212. .name = DRV_NAME,
  213. .id_table = ata_generic,
  214. .probe = ata_generic_init_one,
  215. .remove = ata_pci_remove_one,
  216. #ifdef CONFIG_PM_SLEEP
  217. .suspend = ata_pci_device_suspend,
  218. .resume = ata_pci_device_resume,
  219. #endif
  220. };
  221. module_pci_driver(ata_generic_pci_driver);
  222. MODULE_AUTHOR("Alan Cox");
  223. MODULE_DESCRIPTION("low-level driver for generic ATA");
  224. MODULE_LICENSE("GPL");
  225. MODULE_DEVICE_TABLE(pci, ata_generic);
  226. MODULE_VERSION(DRV_VERSION);
  227. module_param(all_generic_ide, int, 0);