ahci_st.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 STMicroelectronics Limited
  4. *
  5. * Authors: Francesco Virlinzi <francesco.virlinzi@st.com>
  6. * Alexandre Torgue <alexandre.torgue@st.com>
  7. */
  8. #include <linux/init.h>
  9. #include <linux/module.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/clk.h>
  13. #include <linux/of.h>
  14. #include <linux/ahci_platform.h>
  15. #include <linux/libata.h>
  16. #include <linux/reset.h>
  17. #include <linux/io.h>
  18. #include <linux/dma-mapping.h>
  19. #include "ahci.h"
  20. #define DRV_NAME "st_ahci"
  21. #define ST_AHCI_OOBR 0xbc
  22. #define ST_AHCI_OOBR_WE BIT(31)
  23. #define ST_AHCI_OOBR_CWMIN_SHIFT 24
  24. #define ST_AHCI_OOBR_CWMAX_SHIFT 16
  25. #define ST_AHCI_OOBR_CIMIN_SHIFT 8
  26. #define ST_AHCI_OOBR_CIMAX_SHIFT 0
  27. struct st_ahci_drv_data {
  28. struct platform_device *ahci;
  29. struct reset_control *pwr;
  30. struct reset_control *sw_rst;
  31. struct reset_control *pwr_rst;
  32. };
  33. static void st_ahci_configure_oob(void __iomem *mmio)
  34. {
  35. unsigned long old_val, new_val;
  36. new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) |
  37. (0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) |
  38. (0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) |
  39. (0x0C << ST_AHCI_OOBR_CIMAX_SHIFT);
  40. old_val = readl(mmio + ST_AHCI_OOBR);
  41. writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
  42. writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
  43. writel(new_val, mmio + ST_AHCI_OOBR);
  44. }
  45. static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv,
  46. struct device *dev)
  47. {
  48. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  49. int err;
  50. if (drv_data->pwr) {
  51. err = reset_control_deassert(drv_data->pwr);
  52. if (err) {
  53. dev_err(dev, "unable to bring out of pwrdwn\n");
  54. return err;
  55. }
  56. }
  57. if (drv_data->sw_rst) {
  58. err = reset_control_deassert(drv_data->sw_rst);
  59. if (err) {
  60. dev_err(dev, "unable to bring out of sw-rst\n");
  61. return err;
  62. }
  63. }
  64. if (drv_data->pwr_rst) {
  65. err = reset_control_deassert(drv_data->pwr_rst);
  66. if (err) {
  67. dev_err(dev, "unable to bring out of pwr-rst\n");
  68. return err;
  69. }
  70. }
  71. return 0;
  72. }
  73. static void st_ahci_host_stop(struct ata_host *host)
  74. {
  75. struct ahci_host_priv *hpriv = host->private_data;
  76. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  77. struct device *dev = host->dev;
  78. int err;
  79. if (drv_data->pwr) {
  80. err = reset_control_assert(drv_data->pwr);
  81. if (err)
  82. dev_err(dev, "unable to pwrdwn\n");
  83. }
  84. ahci_platform_disable_resources(hpriv);
  85. }
  86. static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
  87. struct device *dev)
  88. {
  89. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  90. drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
  91. if (IS_ERR(drv_data->pwr)) {
  92. dev_info(dev, "power reset control not defined\n");
  93. drv_data->pwr = NULL;
  94. }
  95. drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
  96. if (IS_ERR(drv_data->sw_rst)) {
  97. dev_info(dev, "soft reset control not defined\n");
  98. drv_data->sw_rst = NULL;
  99. }
  100. drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
  101. if (IS_ERR(drv_data->pwr_rst)) {
  102. dev_dbg(dev, "power soft reset control not defined\n");
  103. drv_data->pwr_rst = NULL;
  104. }
  105. return st_ahci_deassert_resets(hpriv, dev);
  106. }
  107. static struct ata_port_operations st_ahci_port_ops = {
  108. .inherits = &ahci_platform_ops,
  109. .host_stop = st_ahci_host_stop,
  110. };
  111. static const struct ata_port_info st_ahci_port_info = {
  112. .flags = AHCI_FLAG_COMMON,
  113. .pio_mask = ATA_PIO4,
  114. .udma_mask = ATA_UDMA6,
  115. .port_ops = &st_ahci_port_ops,
  116. };
  117. static struct scsi_host_template ahci_platform_sht = {
  118. AHCI_SHT(DRV_NAME),
  119. };
  120. static int st_ahci_probe(struct platform_device *pdev)
  121. {
  122. struct device *dev = &pdev->dev;
  123. struct st_ahci_drv_data *drv_data;
  124. struct ahci_host_priv *hpriv;
  125. int err;
  126. drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
  127. if (!drv_data)
  128. return -ENOMEM;
  129. hpriv = ahci_platform_get_resources(pdev, 0);
  130. if (IS_ERR(hpriv))
  131. return PTR_ERR(hpriv);
  132. hpriv->plat_data = drv_data;
  133. err = st_ahci_probe_resets(hpriv, &pdev->dev);
  134. if (err)
  135. return err;
  136. err = ahci_platform_enable_resources(hpriv);
  137. if (err)
  138. return err;
  139. st_ahci_configure_oob(hpriv->mmio);
  140. of_property_read_u32(dev->of_node,
  141. "ports-implemented", &hpriv->force_port_map);
  142. err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
  143. &ahci_platform_sht);
  144. if (err) {
  145. ahci_platform_disable_resources(hpriv);
  146. return err;
  147. }
  148. return 0;
  149. }
  150. #ifdef CONFIG_PM_SLEEP
  151. static int st_ahci_suspend(struct device *dev)
  152. {
  153. struct ata_host *host = dev_get_drvdata(dev);
  154. struct ahci_host_priv *hpriv = host->private_data;
  155. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  156. int err;
  157. err = ahci_platform_suspend_host(dev);
  158. if (err)
  159. return err;
  160. if (drv_data->pwr) {
  161. err = reset_control_assert(drv_data->pwr);
  162. if (err) {
  163. dev_err(dev, "unable to pwrdwn");
  164. return err;
  165. }
  166. }
  167. ahci_platform_disable_resources(hpriv);
  168. return 0;
  169. }
  170. static int st_ahci_resume(struct device *dev)
  171. {
  172. struct ata_host *host = dev_get_drvdata(dev);
  173. struct ahci_host_priv *hpriv = host->private_data;
  174. int err;
  175. err = ahci_platform_enable_resources(hpriv);
  176. if (err)
  177. return err;
  178. err = st_ahci_deassert_resets(hpriv, dev);
  179. if (err) {
  180. ahci_platform_disable_resources(hpriv);
  181. return err;
  182. }
  183. st_ahci_configure_oob(hpriv->mmio);
  184. return ahci_platform_resume_host(dev);
  185. }
  186. #endif
  187. static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
  188. static const struct of_device_id st_ahci_match[] = {
  189. { .compatible = "st,ahci", },
  190. {},
  191. };
  192. MODULE_DEVICE_TABLE(of, st_ahci_match);
  193. static struct platform_driver st_ahci_driver = {
  194. .driver = {
  195. .name = DRV_NAME,
  196. .pm = &st_ahci_pm_ops,
  197. .of_match_table = of_match_ptr(st_ahci_match),
  198. },
  199. .probe = st_ahci_probe,
  200. .remove = ata_platform_remove_one,
  201. };
  202. module_platform_driver(st_ahci_driver);
  203. MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
  204. MODULE_AUTHOR("Francesco Virlinzi <francesco.virlinzi@st.com>");
  205. MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver");
  206. MODULE_LICENSE("GPL v2");