ahci_octeon.c 2.5 KB

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  1. /*
  2. * SATA glue for Cavium Octeon III SOCs.
  3. *
  4. *
  5. * This file is subject to the terms and conditions of the GNU General Public
  6. * License. See the file "COPYING" in the main directory of this archive
  7. * for more details.
  8. *
  9. * Copyright (C) 2010-2015 Cavium Networks
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/of_platform.h>
  16. #include <asm/octeon/octeon.h>
  17. #include <asm/bitfield.h>
  18. #define CVMX_SATA_UCTL_SHIM_CFG 0xE8
  19. #define SATA_UCTL_ENDIAN_MODE_BIG 1
  20. #define SATA_UCTL_ENDIAN_MODE_LITTLE 0
  21. #define SATA_UCTL_ENDIAN_MODE_MASK 3
  22. #define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT 8
  23. #define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT 0
  24. #define SATA_UCTL_DMA_READ_CMD_SHIFT 12
  25. static int ahci_octeon_probe(struct platform_device *pdev)
  26. {
  27. struct device *dev = &pdev->dev;
  28. struct device_node *node = dev->of_node;
  29. struct resource *res;
  30. void __iomem *base;
  31. u64 cfg;
  32. int ret;
  33. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  34. base = devm_ioremap_resource(&pdev->dev, res);
  35. if (IS_ERR(base))
  36. return PTR_ERR(base);
  37. cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG);
  38. cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT);
  39. cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT);
  40. #ifdef __BIG_ENDIAN
  41. cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  42. cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  43. #else
  44. cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
  45. cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
  46. #endif
  47. cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT;
  48. cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg);
  49. if (!node) {
  50. dev_err(dev, "no device node, failed to add octeon sata\n");
  51. return -ENODEV;
  52. }
  53. ret = of_platform_populate(node, NULL, NULL, dev);
  54. if (ret) {
  55. dev_err(dev, "failed to add ahci-platform core\n");
  56. return ret;
  57. }
  58. return 0;
  59. }
  60. static int ahci_octeon_remove(struct platform_device *pdev)
  61. {
  62. return 0;
  63. }
  64. static const struct of_device_id octeon_ahci_match[] = {
  65. { .compatible = "cavium,octeon-7130-sata-uctl", },
  66. {},
  67. };
  68. MODULE_DEVICE_TABLE(of, octeon_ahci_match);
  69. static struct platform_driver ahci_octeon_driver = {
  70. .probe = ahci_octeon_probe,
  71. .remove = ahci_octeon_remove,
  72. .driver = {
  73. .name = "octeon-ahci",
  74. .of_match_table = octeon_ahci_match,
  75. },
  76. };
  77. module_platform_driver(ahci_octeon_driver);
  78. MODULE_LICENSE("GPL");
  79. MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
  80. MODULE_DESCRIPTION("Cavium Inc. sata config.");