ahci_dm816.c 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * DaVinci DM816 AHCI SATA platform driver
  4. *
  5. * Copyright (C) 2017 BayLibre SAS
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/pm.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/libata.h>
  13. #include <linux/ahci_platform.h>
  14. #include "ahci.h"
  15. #define AHCI_DM816_DRV_NAME "ahci-dm816"
  16. #define AHCI_DM816_PHY_ENPLL(x) ((x) << 0)
  17. #define AHCI_DM816_PHY_MPY(x) ((x) << 1)
  18. #define AHCI_DM816_PHY_LOS(x) ((x) << 12)
  19. #define AHCI_DM816_PHY_RXCDR(x) ((x) << 13)
  20. #define AHCI_DM816_PHY_RXEQ(x) ((x) << 16)
  21. #define AHCI_DM816_PHY_TXSWING(x) ((x) << 23)
  22. #define AHCI_DM816_P0PHYCR_REG 0x178
  23. #define AHCI_DM816_P1PHYCR_REG 0x1f8
  24. #define AHCI_DM816_PLL_OUT 1500000000LU
  25. static const unsigned long pll_mpy_table[] = {
  26. 400, 500, 600, 800, 825, 1000, 1200,
  27. 1250, 1500, 1600, 1650, 2000, 2200, 2500
  28. };
  29. static int ahci_dm816_get_mpy_bits(unsigned long refclk_rate)
  30. {
  31. unsigned long pll_multiplier;
  32. int i;
  33. /*
  34. * We need to determine the value of the multiplier (MPY) bits.
  35. * In order to include the 8.25 multiplier we need to first divide
  36. * the refclk rate by 100.
  37. */
  38. pll_multiplier = AHCI_DM816_PLL_OUT / (refclk_rate / 100);
  39. for (i = 0; i < ARRAY_SIZE(pll_mpy_table); i++) {
  40. if (pll_mpy_table[i] == pll_multiplier)
  41. return i;
  42. }
  43. /*
  44. * We should have divided evenly - if not, return an invalid
  45. * value.
  46. */
  47. return -1;
  48. }
  49. static int ahci_dm816_phy_init(struct ahci_host_priv *hpriv, struct device *dev)
  50. {
  51. unsigned long refclk_rate;
  52. int mpy;
  53. u32 val;
  54. /*
  55. * We should have been supplied two clocks: the functional and
  56. * keep-alive clock and the external reference clock. We need the
  57. * rate of the latter to calculate the correct value of MPY bits.
  58. */
  59. if (!hpriv->clks[1]) {
  60. dev_err(dev, "reference clock not supplied\n");
  61. return -EINVAL;
  62. }
  63. refclk_rate = clk_get_rate(hpriv->clks[1]);
  64. if ((refclk_rate % 100) != 0) {
  65. dev_err(dev, "reference clock rate must be divisible by 100\n");
  66. return -EINVAL;
  67. }
  68. mpy = ahci_dm816_get_mpy_bits(refclk_rate);
  69. if (mpy < 0) {
  70. dev_err(dev, "can't calculate the MPY bits value\n");
  71. return -EINVAL;
  72. }
  73. /* Enable the PHY and configure the first HBA port. */
  74. val = AHCI_DM816_PHY_MPY(mpy) | AHCI_DM816_PHY_LOS(1) |
  75. AHCI_DM816_PHY_RXCDR(4) | AHCI_DM816_PHY_RXEQ(1) |
  76. AHCI_DM816_PHY_TXSWING(3) | AHCI_DM816_PHY_ENPLL(1);
  77. writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG);
  78. /* Configure the second HBA port. */
  79. val = AHCI_DM816_PHY_LOS(1) | AHCI_DM816_PHY_RXCDR(4) |
  80. AHCI_DM816_PHY_RXEQ(1) | AHCI_DM816_PHY_TXSWING(3);
  81. writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG);
  82. return 0;
  83. }
  84. static int ahci_dm816_softreset(struct ata_link *link,
  85. unsigned int *class, unsigned long deadline)
  86. {
  87. int pmp, ret;
  88. pmp = sata_srst_pmp(link);
  89. /*
  90. * There's an issue with the SATA controller on DM816 SoC: if we
  91. * enable Port Multiplier support, but the drive is connected directly
  92. * to the board, it can't be detected. As a workaround: if PMP is
  93. * enabled, we first call ahci_do_softreset() and pass it the result of
  94. * sata_srst_pmp(). If this call fails, we retry with pmp = 0.
  95. */
  96. ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
  97. if (pmp && ret == -EBUSY)
  98. return ahci_do_softreset(link, class, 0,
  99. deadline, ahci_check_ready);
  100. return ret;
  101. }
  102. static struct ata_port_operations ahci_dm816_port_ops = {
  103. .inherits = &ahci_platform_ops,
  104. .softreset = ahci_dm816_softreset,
  105. };
  106. static const struct ata_port_info ahci_dm816_port_info = {
  107. .flags = AHCI_FLAG_COMMON,
  108. .pio_mask = ATA_PIO4,
  109. .udma_mask = ATA_UDMA6,
  110. .port_ops = &ahci_dm816_port_ops,
  111. };
  112. static struct scsi_host_template ahci_dm816_platform_sht = {
  113. AHCI_SHT(AHCI_DM816_DRV_NAME),
  114. };
  115. static int ahci_dm816_probe(struct platform_device *pdev)
  116. {
  117. struct device *dev = &pdev->dev;
  118. struct ahci_host_priv *hpriv;
  119. int rc;
  120. hpriv = ahci_platform_get_resources(pdev, 0);
  121. if (IS_ERR(hpriv))
  122. return PTR_ERR(hpriv);
  123. rc = ahci_platform_enable_resources(hpriv);
  124. if (rc)
  125. return rc;
  126. rc = ahci_dm816_phy_init(hpriv, dev);
  127. if (rc)
  128. goto disable_resources;
  129. rc = ahci_platform_init_host(pdev, hpriv,
  130. &ahci_dm816_port_info,
  131. &ahci_dm816_platform_sht);
  132. if (rc)
  133. goto disable_resources;
  134. return 0;
  135. disable_resources:
  136. ahci_platform_disable_resources(hpriv);
  137. return rc;
  138. }
  139. static SIMPLE_DEV_PM_OPS(ahci_dm816_pm_ops,
  140. ahci_platform_suspend,
  141. ahci_platform_resume);
  142. static const struct of_device_id ahci_dm816_of_match[] = {
  143. { .compatible = "ti,dm816-ahci", },
  144. { },
  145. };
  146. MODULE_DEVICE_TABLE(of, ahci_dm816_of_match);
  147. static struct platform_driver ahci_dm816_driver = {
  148. .probe = ahci_dm816_probe,
  149. .remove = ata_platform_remove_one,
  150. .driver = {
  151. .name = AHCI_DM816_DRV_NAME,
  152. .of_match_table = ahci_dm816_of_match,
  153. .pm = &ahci_dm816_pm_ops,
  154. },
  155. };
  156. module_platform_driver(ahci_dm816_driver);
  157. MODULE_DESCRIPTION("DaVinci DM816 AHCI SATA platform driver");
  158. MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
  159. MODULE_LICENSE("GPL");