nfit.h 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * NVDIMM Firmware Interface Table - NFIT
  4. *
  5. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  6. */
  7. #ifndef __NFIT_H__
  8. #define __NFIT_H__
  9. #include <linux/workqueue.h>
  10. #include <linux/libnvdimm.h>
  11. #include <linux/ndctl.h>
  12. #include <linux/types.h>
  13. #include <linux/acpi.h>
  14. #include <acpi/acuuid.h>
  15. /* ACPI 6.1 */
  16. #define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
  17. /* https://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
  18. #define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
  19. #define UUID_INTEL_BUS "c7d8acd4-2df8-4b82-9f65-a325335af149"
  20. /* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
  21. #define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
  22. #define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
  23. /* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
  24. #define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
  25. /* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */
  26. #define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"
  27. #define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
  28. | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
  29. | ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)
  30. #define NVDIMM_CMD_MAX 31
  31. #define NVDIMM_STANDARD_CMDMASK \
  32. (1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
  33. | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
  34. | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
  35. | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)
  36. /*
  37. * Command numbers that the kernel needs to know about to handle
  38. * non-default DSM revision ids
  39. */
  40. enum nvdimm_family_cmds {
  41. NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
  42. NVDIMM_INTEL_GET_MODES = 11,
  43. NVDIMM_INTEL_GET_FWINFO = 12,
  44. NVDIMM_INTEL_START_FWUPDATE = 13,
  45. NVDIMM_INTEL_SEND_FWUPDATE = 14,
  46. NVDIMM_INTEL_FINISH_FWUPDATE = 15,
  47. NVDIMM_INTEL_QUERY_FWUPDATE = 16,
  48. NVDIMM_INTEL_SET_THRESHOLD = 17,
  49. NVDIMM_INTEL_INJECT_ERROR = 18,
  50. NVDIMM_INTEL_GET_SECURITY_STATE = 19,
  51. NVDIMM_INTEL_SET_PASSPHRASE = 20,
  52. NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
  53. NVDIMM_INTEL_UNLOCK_UNIT = 22,
  54. NVDIMM_INTEL_FREEZE_LOCK = 23,
  55. NVDIMM_INTEL_SECURE_ERASE = 24,
  56. NVDIMM_INTEL_OVERWRITE = 25,
  57. NVDIMM_INTEL_QUERY_OVERWRITE = 26,
  58. NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
  59. NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
  60. NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO = 29,
  61. NVDIMM_INTEL_FW_ACTIVATE_ARM = 30,
  62. };
  63. enum nvdimm_bus_family_cmds {
  64. NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO = 1,
  65. NVDIMM_BUS_INTEL_FW_ACTIVATE = 2,
  66. };
  67. #define NVDIMM_INTEL_SECURITY_CMDMASK \
  68. (1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
  69. | 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
  70. | 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
  71. | 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
  72. | 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
  73. | 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
  74. #define NVDIMM_INTEL_FW_ACTIVATE_CMDMASK \
  75. (1 << NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO | 1 << NVDIMM_INTEL_FW_ACTIVATE_ARM)
  76. #define NVDIMM_BUS_INTEL_FW_ACTIVATE_CMDMASK \
  77. (1 << NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO | 1 << NVDIMM_BUS_INTEL_FW_ACTIVATE)
  78. #define NVDIMM_INTEL_CMDMASK \
  79. (NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
  80. | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
  81. | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
  82. | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
  83. | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
  84. | NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
  85. #define NVDIMM_INTEL_DENY_CMDMASK \
  86. (NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
  87. enum nfit_uuids {
  88. /* for simplicity alias the uuid index with the family id */
  89. NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
  90. NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
  91. NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
  92. NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
  93. NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
  94. /*
  95. * to_nfit_bus_uuid() expects to translate bus uuid family ids
  96. * to a UUID index using NVDIMM_FAMILY_MAX as an offset
  97. */
  98. NFIT_BUS_INTEL = NVDIMM_FAMILY_MAX + NVDIMM_BUS_FAMILY_INTEL,
  99. NFIT_SPA_VOLATILE,
  100. NFIT_SPA_PM,
  101. NFIT_SPA_DCR,
  102. NFIT_SPA_BDW,
  103. NFIT_SPA_VDISK,
  104. NFIT_SPA_VCD,
  105. NFIT_SPA_PDISK,
  106. NFIT_SPA_PCD,
  107. NFIT_DEV_BUS,
  108. NFIT_UUID_MAX,
  109. };
  110. /*
  111. * Region format interface codes are stored with the interface as the
  112. * LSB and the function as the MSB.
  113. */
  114. #define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
  115. #define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
  116. #define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
  117. enum {
  118. NFIT_BLK_READ_FLUSH = 1,
  119. NFIT_BLK_DCR_LATCH = 2,
  120. NFIT_ARS_STATUS_DONE = 0,
  121. NFIT_ARS_STATUS_BUSY = 1 << 16,
  122. NFIT_ARS_STATUS_NONE = 2 << 16,
  123. NFIT_ARS_STATUS_INTR = 3 << 16,
  124. NFIT_ARS_START_BUSY = 6,
  125. NFIT_ARS_CAP_NONE = 1,
  126. NFIT_ARS_F_OVERFLOW = 1,
  127. NFIT_ARS_TIMEOUT = 90,
  128. };
  129. enum nfit_root_notifiers {
  130. NFIT_NOTIFY_UPDATE = 0x80,
  131. NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
  132. };
  133. enum nfit_dimm_notifiers {
  134. NFIT_NOTIFY_DIMM_HEALTH = 0x81,
  135. };
  136. enum nfit_ars_state {
  137. ARS_REQ_SHORT,
  138. ARS_REQ_LONG,
  139. ARS_FAILED,
  140. };
  141. struct nfit_spa {
  142. struct list_head list;
  143. struct nd_region *nd_region;
  144. unsigned long ars_state;
  145. u32 clear_err_unit;
  146. u32 max_ars;
  147. struct acpi_nfit_system_address spa[];
  148. };
  149. struct nfit_dcr {
  150. struct list_head list;
  151. struct acpi_nfit_control_region dcr[];
  152. };
  153. struct nfit_bdw {
  154. struct list_head list;
  155. struct acpi_nfit_data_region bdw[];
  156. };
  157. struct nfit_idt {
  158. struct list_head list;
  159. struct acpi_nfit_interleave idt[];
  160. };
  161. struct nfit_flush {
  162. struct list_head list;
  163. struct acpi_nfit_flush_address flush[];
  164. };
  165. struct nfit_memdev {
  166. struct list_head list;
  167. struct acpi_nfit_memory_map memdev[];
  168. };
  169. enum nfit_mem_flags {
  170. NFIT_MEM_LSR,
  171. NFIT_MEM_LSW,
  172. NFIT_MEM_DIRTY,
  173. NFIT_MEM_DIRTY_COUNT,
  174. };
  175. #define NFIT_DIMM_ID_LEN 22
  176. /* assembled tables for a given dimm/memory-device */
  177. struct nfit_mem {
  178. struct nvdimm *nvdimm;
  179. struct acpi_nfit_memory_map *memdev_dcr;
  180. struct acpi_nfit_memory_map *memdev_pmem;
  181. struct acpi_nfit_memory_map *memdev_bdw;
  182. struct acpi_nfit_control_region *dcr;
  183. struct acpi_nfit_data_region *bdw;
  184. struct acpi_nfit_system_address *spa_dcr;
  185. struct acpi_nfit_system_address *spa_bdw;
  186. struct acpi_nfit_interleave *idt_dcr;
  187. struct acpi_nfit_interleave *idt_bdw;
  188. struct kernfs_node *flags_attr;
  189. struct nfit_flush *nfit_flush;
  190. struct list_head list;
  191. struct acpi_device *adev;
  192. struct acpi_nfit_desc *acpi_desc;
  193. enum nvdimm_fwa_state fwa_state;
  194. enum nvdimm_fwa_result fwa_result;
  195. int fwa_count;
  196. char id[NFIT_DIMM_ID_LEN+1];
  197. struct resource *flush_wpq;
  198. unsigned long dsm_mask;
  199. unsigned long flags;
  200. u32 dirty_shutdown;
  201. int family;
  202. };
  203. enum scrub_flags {
  204. ARS_BUSY,
  205. ARS_CANCEL,
  206. ARS_VALID,
  207. ARS_POLL,
  208. };
  209. struct acpi_nfit_desc {
  210. struct nvdimm_bus_descriptor nd_desc;
  211. struct acpi_table_header acpi_header;
  212. struct mutex init_mutex;
  213. struct list_head memdevs;
  214. struct list_head flushes;
  215. struct list_head dimms;
  216. struct list_head spas;
  217. struct list_head dcrs;
  218. struct list_head bdws;
  219. struct list_head idts;
  220. struct nvdimm_bus *nvdimm_bus;
  221. struct device *dev;
  222. struct nd_cmd_ars_status *ars_status;
  223. struct nfit_spa *scrub_spa;
  224. struct delayed_work dwork;
  225. struct list_head list;
  226. struct kernfs_node *scrub_count_state;
  227. unsigned int max_ars;
  228. unsigned int scrub_count;
  229. unsigned int scrub_mode;
  230. unsigned long scrub_flags;
  231. unsigned long dimm_cmd_force_en;
  232. unsigned long bus_cmd_force_en;
  233. unsigned long bus_dsm_mask;
  234. unsigned long family_dsm_mask[NVDIMM_BUS_FAMILY_MAX + 1];
  235. unsigned int platform_cap;
  236. unsigned int scrub_tmo;
  237. int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
  238. void *iobuf, u64 len, int rw);
  239. enum nvdimm_fwa_state fwa_state;
  240. enum nvdimm_fwa_capability fwa_cap;
  241. int fwa_count;
  242. bool fwa_noidle;
  243. bool fwa_nosuspend;
  244. };
  245. enum scrub_mode {
  246. HW_ERROR_SCRUB_OFF,
  247. HW_ERROR_SCRUB_ON,
  248. };
  249. enum nd_blk_mmio_selector {
  250. BDW,
  251. DCR,
  252. };
  253. struct nd_blk_addr {
  254. union {
  255. void __iomem *base;
  256. void *aperture;
  257. };
  258. };
  259. struct nfit_blk {
  260. struct nfit_blk_mmio {
  261. struct nd_blk_addr addr;
  262. u64 size;
  263. u64 base_offset;
  264. u32 line_size;
  265. u32 num_lines;
  266. u32 table_size;
  267. struct acpi_nfit_interleave *idt;
  268. struct acpi_nfit_system_address *spa;
  269. } mmio[2];
  270. struct nd_region *nd_region;
  271. u64 bdw_offset; /* post interleave offset */
  272. u64 stat_offset;
  273. u64 cmd_offset;
  274. u32 dimm_flags;
  275. };
  276. extern struct list_head acpi_descs;
  277. extern struct mutex acpi_desc_lock;
  278. int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
  279. enum nfit_ars_state req_type);
  280. #ifdef CONFIG_X86_MCE
  281. void nfit_mce_register(void);
  282. void nfit_mce_unregister(void);
  283. #else
  284. static inline void nfit_mce_register(void)
  285. {
  286. }
  287. static inline void nfit_mce_unregister(void)
  288. {
  289. }
  290. #endif
  291. int nfit_spa_type(struct acpi_nfit_system_address *spa);
  292. static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
  293. struct nfit_mem *nfit_mem)
  294. {
  295. if (nfit_mem->memdev_dcr)
  296. return nfit_mem->memdev_dcr;
  297. return nfit_mem->memdev_pmem;
  298. }
  299. static inline struct acpi_nfit_desc *to_acpi_desc(
  300. struct nvdimm_bus_descriptor *nd_desc)
  301. {
  302. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  303. }
  304. #ifdef CONFIG_PROVE_LOCKING
  305. static inline void nfit_device_lock(struct device *dev)
  306. {
  307. device_lock(dev);
  308. mutex_lock(&dev->lockdep_mutex);
  309. }
  310. static inline void nfit_device_unlock(struct device *dev)
  311. {
  312. mutex_unlock(&dev->lockdep_mutex);
  313. device_unlock(dev);
  314. }
  315. #else
  316. static inline void nfit_device_lock(struct device *dev)
  317. {
  318. device_lock(dev);
  319. }
  320. static inline void nfit_device_unlock(struct device *dev)
  321. {
  322. device_unlock(dev);
  323. }
  324. #endif
  325. const guid_t *to_nfit_uuid(enum nfit_uuids id);
  326. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
  327. void acpi_nfit_shutdown(void *data);
  328. void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
  329. void __acpi_nvdimm_notify(struct device *dev, u32 event);
  330. int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
  331. unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
  332. void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
  333. bool intel_fwa_supported(struct nvdimm_bus *nvdimm_bus);
  334. extern struct device_attribute dev_attr_firmware_activate_noidle;
  335. #endif /* __NFIT_H__ */