vmlinux.lds.S 8.7 KB

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  1. /*
  2. * arch/xtensa/kernel/vmlinux.lds.S
  3. *
  4. * Xtensa linker script
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2008 Tensilica Inc.
  11. *
  12. * Chris Zankel <chris@zankel.net>
  13. * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
  14. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  15. */
  16. #define RO_EXCEPTION_TABLE_ALIGN 16
  17. #include <asm-generic/vmlinux.lds.h>
  18. #include <asm/page.h>
  19. #include <asm/thread_info.h>
  20. #include <asm/core.h>
  21. #include <asm/vectors.h>
  22. OUTPUT_ARCH(xtensa)
  23. ENTRY(_start)
  24. #ifdef __XTENSA_EB__
  25. jiffies = jiffies_64 + 4;
  26. #else
  27. jiffies = jiffies_64;
  28. #endif
  29. /* Note: In the following macros, it would be nice to specify only the
  30. vector name and section kind and construct "sym" and "section" using
  31. CPP concatenation, but that does not work reliably. Concatenating a
  32. string with "." produces an invalid token. CPP will not print a
  33. warning because it thinks this is an assembly file, but it leaves
  34. them as multiple tokens and there may or may not be whitespace
  35. between them. */
  36. /* Macro for a relocation entry */
  37. #define RELOCATE_ENTRY(sym, section) \
  38. LONG(sym ## _start); \
  39. LONG(sym ## _end); \
  40. LONG(LOADADDR(section))
  41. #if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE
  42. #define MERGED_VECTORS 1
  43. #else
  44. #define MERGED_VECTORS 0
  45. #endif
  46. /*
  47. * Macro to define a section for a vector. When MERGED_VECTORS is 0
  48. * code for every vector is located with other init data. At startup
  49. * time head.S copies code for every vector to its final position according
  50. * to description recorded in the corresponding RELOCATE_ENTRY.
  51. */
  52. #define SECTION_VECTOR4(sym, section, addr, prevsec) \
  53. section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
  54. { \
  55. . = ALIGN(4); \
  56. sym ## _start = ABSOLUTE(.); \
  57. *(section) \
  58. sym ## _end = ABSOLUTE(.); \
  59. }
  60. #define SECTION_VECTOR2(section, addr) \
  61. . = addr; \
  62. *(section)
  63. /*
  64. * Mapping of input sections to output sections when linking.
  65. */
  66. SECTIONS
  67. {
  68. . = KERNELOFFSET;
  69. /* .text section */
  70. _text = .;
  71. _stext = .;
  72. .text :
  73. {
  74. /* The HEAD_TEXT section must be the first section! */
  75. HEAD_TEXT
  76. #if MERGED_VECTORS
  77. . = ALIGN(PAGE_SIZE);
  78. _vecbase = .;
  79. SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR)
  80. #if XCHAL_EXCM_LEVEL >= 2
  81. SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
  82. #endif
  83. #if XCHAL_EXCM_LEVEL >= 3
  84. SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
  85. #endif
  86. #if XCHAL_EXCM_LEVEL >= 4
  87. SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
  88. #endif
  89. #if XCHAL_EXCM_LEVEL >= 5
  90. SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
  91. #endif
  92. #if XCHAL_EXCM_LEVEL >= 6
  93. SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
  94. #endif
  95. SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
  96. SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
  97. SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR)
  98. SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
  99. *(.exception.text)
  100. #endif
  101. IRQENTRY_TEXT
  102. SOFTIRQENTRY_TEXT
  103. ENTRY_TEXT
  104. TEXT_TEXT
  105. SCHED_TEXT
  106. CPUIDLE_TEXT
  107. LOCK_TEXT
  108. *(.fixup)
  109. }
  110. _etext = .;
  111. PROVIDE (etext = .);
  112. . = ALIGN(16);
  113. RO_DATA(4096)
  114. /* Data section */
  115. #ifdef CONFIG_XIP_KERNEL
  116. INIT_TEXT_SECTION(PAGE_SIZE)
  117. #else
  118. _sdata = .;
  119. RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  120. _edata = .;
  121. /* Initialization code and data: */
  122. . = ALIGN(PAGE_SIZE);
  123. __init_begin = .;
  124. INIT_TEXT_SECTION(PAGE_SIZE)
  125. .init.data :
  126. {
  127. INIT_DATA
  128. }
  129. #endif
  130. .init.rodata :
  131. {
  132. . = ALIGN(0x4);
  133. __tagtable_begin = .;
  134. *(.taglist)
  135. __tagtable_end = .;
  136. . = ALIGN(16);
  137. __boot_reloc_table_start = ABSOLUTE(.);
  138. #if !MERGED_VECTORS
  139. RELOCATE_ENTRY(_WindowVectors_text,
  140. .WindowVectors.text);
  141. #if XCHAL_EXCM_LEVEL >= 2
  142. RELOCATE_ENTRY(_Level2InterruptVector_text,
  143. .Level2InterruptVector.text);
  144. #endif
  145. #if XCHAL_EXCM_LEVEL >= 3
  146. RELOCATE_ENTRY(_Level3InterruptVector_text,
  147. .Level3InterruptVector.text);
  148. #endif
  149. #if XCHAL_EXCM_LEVEL >= 4
  150. RELOCATE_ENTRY(_Level4InterruptVector_text,
  151. .Level4InterruptVector.text);
  152. #endif
  153. #if XCHAL_EXCM_LEVEL >= 5
  154. RELOCATE_ENTRY(_Level5InterruptVector_text,
  155. .Level5InterruptVector.text);
  156. #endif
  157. #if XCHAL_EXCM_LEVEL >= 6
  158. RELOCATE_ENTRY(_Level6InterruptVector_text,
  159. .Level6InterruptVector.text);
  160. #endif
  161. RELOCATE_ENTRY(_KernelExceptionVector_text,
  162. .KernelExceptionVector.text);
  163. RELOCATE_ENTRY(_UserExceptionVector_text,
  164. .UserExceptionVector.text);
  165. RELOCATE_ENTRY(_DoubleExceptionVector_text,
  166. .DoubleExceptionVector.text);
  167. RELOCATE_ENTRY(_DebugInterruptVector_text,
  168. .DebugInterruptVector.text);
  169. RELOCATE_ENTRY(_exception_text,
  170. .exception.text);
  171. #endif
  172. #ifdef CONFIG_XIP_KERNEL
  173. RELOCATE_ENTRY(_xip_data, .data);
  174. RELOCATE_ENTRY(_xip_init_data, .init.data);
  175. #endif
  176. #if defined(CONFIG_SMP)
  177. RELOCATE_ENTRY(_SecondaryResetVector_text,
  178. .SecondaryResetVector.text);
  179. #endif
  180. __boot_reloc_table_end = ABSOLUTE(.) ;
  181. INIT_SETUP(XCHAL_ICACHE_LINESIZE)
  182. INIT_CALLS
  183. CON_INITCALL
  184. INIT_RAM_FS
  185. }
  186. PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
  187. /* We need this dummy segment here */
  188. . = ALIGN(4);
  189. .dummy : { LONG(0) }
  190. #undef LAST
  191. #define LAST .dummy
  192. #if !MERGED_VECTORS
  193. /* The vectors are relocated to the real position at startup time */
  194. SECTION_VECTOR4 (_WindowVectors_text,
  195. .WindowVectors.text,
  196. WINDOW_VECTORS_VADDR,
  197. .dummy)
  198. SECTION_VECTOR4 (_DebugInterruptVector_text,
  199. .DebugInterruptVector.text,
  200. DEBUG_VECTOR_VADDR,
  201. .WindowVectors.text)
  202. #undef LAST
  203. #define LAST .DebugInterruptVector.text
  204. #if XCHAL_EXCM_LEVEL >= 2
  205. SECTION_VECTOR4 (_Level2InterruptVector_text,
  206. .Level2InterruptVector.text,
  207. INTLEVEL2_VECTOR_VADDR,
  208. LAST)
  209. # undef LAST
  210. # define LAST .Level2InterruptVector.text
  211. #endif
  212. #if XCHAL_EXCM_LEVEL >= 3
  213. SECTION_VECTOR4 (_Level3InterruptVector_text,
  214. .Level3InterruptVector.text,
  215. INTLEVEL3_VECTOR_VADDR,
  216. LAST)
  217. # undef LAST
  218. # define LAST .Level3InterruptVector.text
  219. #endif
  220. #if XCHAL_EXCM_LEVEL >= 4
  221. SECTION_VECTOR4 (_Level4InterruptVector_text,
  222. .Level4InterruptVector.text,
  223. INTLEVEL4_VECTOR_VADDR,
  224. LAST)
  225. # undef LAST
  226. # define LAST .Level4InterruptVector.text
  227. #endif
  228. #if XCHAL_EXCM_LEVEL >= 5
  229. SECTION_VECTOR4 (_Level5InterruptVector_text,
  230. .Level5InterruptVector.text,
  231. INTLEVEL5_VECTOR_VADDR,
  232. LAST)
  233. # undef LAST
  234. # define LAST .Level5InterruptVector.text
  235. #endif
  236. #if XCHAL_EXCM_LEVEL >= 6
  237. SECTION_VECTOR4 (_Level6InterruptVector_text,
  238. .Level6InterruptVector.text,
  239. INTLEVEL6_VECTOR_VADDR,
  240. LAST)
  241. # undef LAST
  242. # define LAST .Level6InterruptVector.text
  243. #endif
  244. SECTION_VECTOR4 (_KernelExceptionVector_text,
  245. .KernelExceptionVector.text,
  246. KERNEL_VECTOR_VADDR,
  247. LAST)
  248. #undef LAST
  249. SECTION_VECTOR4 (_UserExceptionVector_text,
  250. .UserExceptionVector.text,
  251. USER_VECTOR_VADDR,
  252. .KernelExceptionVector.text)
  253. SECTION_VECTOR4 (_DoubleExceptionVector_text,
  254. .DoubleExceptionVector.text,
  255. DOUBLEEXC_VECTOR_VADDR,
  256. .UserExceptionVector.text)
  257. #define LAST .DoubleExceptionVector.text
  258. #endif
  259. #if defined(CONFIG_SMP)
  260. SECTION_VECTOR4 (_SecondaryResetVector_text,
  261. .SecondaryResetVector.text,
  262. RESET_VECTOR1_VADDR,
  263. LAST)
  264. #undef LAST
  265. #define LAST .SecondaryResetVector.text
  266. #endif
  267. #if !MERGED_VECTORS
  268. SECTION_VECTOR4 (_exception_text,
  269. .exception.text,
  270. ,
  271. LAST)
  272. #undef LAST
  273. #define LAST .exception.text
  274. #endif
  275. . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3;
  276. .dummy1 : AT(ADDR(.dummy1)) { LONG(0) }
  277. . = ALIGN(PAGE_SIZE);
  278. #ifndef CONFIG_XIP_KERNEL
  279. __init_end = .;
  280. BSS_SECTION(0, 8192, 0)
  281. #endif
  282. _end = .;
  283. #ifdef CONFIG_XIP_KERNEL
  284. . = CONFIG_XIP_DATA_ADDR;
  285. _xip_start = .;
  286. #undef LOAD_OFFSET
  287. #define LOAD_OFFSET \
  288. (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3)
  289. _xip_data_start = .;
  290. _sdata = .;
  291. RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  292. _edata = .;
  293. _xip_data_end = .;
  294. /* Initialization data: */
  295. STRUCT_ALIGN();
  296. _xip_init_data_start = .;
  297. __init_begin = .;
  298. .init.data :
  299. {
  300. INIT_DATA
  301. }
  302. _xip_init_data_end = .;
  303. __init_end = .;
  304. BSS_SECTION(0, 8192, 0)
  305. _xip_end = .;
  306. #undef LOAD_OFFSET
  307. #endif
  308. DWARF_DEBUG
  309. .xt.prop 0 : { KEEP(*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*)) }
  310. .xt.insn 0 : { KEEP(*(.xt.insn .xt.insn.* .gnu.linkonce.x*)) }
  311. .xt.lit 0 : { KEEP(*(.xt.lit .xt.lit.* .gnu.linkonce.p*)) }
  312. /* Sections to be discarded */
  313. DISCARDS
  314. }