module.c 4.9 KB

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  1. /*
  2. * arch/xtensa/kernel/module.c
  3. *
  4. * Module support.
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2006 Tensilica Inc.
  11. *
  12. * Chris Zankel <chris@zankel.net>
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/moduleloader.h>
  17. #include <linux/elf.h>
  18. #include <linux/vmalloc.h>
  19. #include <linux/fs.h>
  20. #include <linux/string.h>
  21. #include <linux/kernel.h>
  22. #include <linux/cache.h>
  23. static int
  24. decode_calln_opcode (unsigned char *location)
  25. {
  26. #ifdef __XTENSA_EB__
  27. return (location[0] & 0xf0) == 0x50;
  28. #endif
  29. #ifdef __XTENSA_EL__
  30. return (location[0] & 0xf) == 0x5;
  31. #endif
  32. }
  33. static int
  34. decode_l32r_opcode (unsigned char *location)
  35. {
  36. #ifdef __XTENSA_EB__
  37. return (location[0] & 0xf0) == 0x10;
  38. #endif
  39. #ifdef __XTENSA_EL__
  40. return (location[0] & 0xf) == 0x1;
  41. #endif
  42. }
  43. int apply_relocate_add(Elf32_Shdr *sechdrs,
  44. const char *strtab,
  45. unsigned int symindex,
  46. unsigned int relsec,
  47. struct module *mod)
  48. {
  49. unsigned int i;
  50. Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
  51. Elf32_Sym *sym;
  52. unsigned char *location;
  53. uint32_t value;
  54. pr_debug("Applying relocate section %u to %u\n", relsec,
  55. sechdrs[relsec].sh_info);
  56. for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
  57. location = (char *)sechdrs[sechdrs[relsec].sh_info].sh_addr
  58. + rela[i].r_offset;
  59. sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
  60. + ELF32_R_SYM(rela[i].r_info);
  61. value = sym->st_value + rela[i].r_addend;
  62. switch (ELF32_R_TYPE(rela[i].r_info)) {
  63. case R_XTENSA_NONE:
  64. case R_XTENSA_DIFF8:
  65. case R_XTENSA_DIFF16:
  66. case R_XTENSA_DIFF32:
  67. case R_XTENSA_ASM_EXPAND:
  68. break;
  69. case R_XTENSA_32:
  70. case R_XTENSA_PLT:
  71. *(uint32_t *)location += value;
  72. break;
  73. case R_XTENSA_SLOT0_OP:
  74. if (decode_calln_opcode(location)) {
  75. value -= ((unsigned long)location & -4) + 4;
  76. if ((value & 3) != 0 ||
  77. ((value + (1 << 19)) >> 20) != 0) {
  78. pr_err("%s: relocation out of range, "
  79. "section %d reloc %d "
  80. "sym '%s'\n",
  81. mod->name, relsec, i,
  82. strtab + sym->st_name);
  83. return -ENOEXEC;
  84. }
  85. value = (signed int)value >> 2;
  86. #ifdef __XTENSA_EB__
  87. location[0] = ((location[0] & ~0x3) |
  88. ((value >> 16) & 0x3));
  89. location[1] = (value >> 8) & 0xff;
  90. location[2] = value & 0xff;
  91. #endif
  92. #ifdef __XTENSA_EL__
  93. location[0] = ((location[0] & ~0xc0) |
  94. ((value << 6) & 0xc0));
  95. location[1] = (value >> 2) & 0xff;
  96. location[2] = (value >> 10) & 0xff;
  97. #endif
  98. } else if (decode_l32r_opcode(location)) {
  99. value -= (((unsigned long)location + 3) & -4);
  100. if ((value & 3) != 0 ||
  101. (signed int)value >> 18 != -1) {
  102. pr_err("%s: relocation out of range, "
  103. "section %d reloc %d "
  104. "sym '%s'\n",
  105. mod->name, relsec, i,
  106. strtab + sym->st_name);
  107. return -ENOEXEC;
  108. }
  109. value = (signed int)value >> 2;
  110. #ifdef __XTENSA_EB__
  111. location[1] = (value >> 8) & 0xff;
  112. location[2] = value & 0xff;
  113. #endif
  114. #ifdef __XTENSA_EL__
  115. location[1] = value & 0xff;
  116. location[2] = (value >> 8) & 0xff;
  117. #endif
  118. }
  119. /* FIXME: Ignore any other opcodes. The Xtensa
  120. assembler currently assumes that the linker will
  121. always do relaxation and so all PC-relative
  122. operands need relocations. (The assembler also
  123. writes out the tentative PC-relative values,
  124. assuming no link-time relaxation, so it is usually
  125. safe to ignore the relocations.) If the
  126. assembler's "--no-link-relax" flag can be made to
  127. work, and if all kernel modules can be assembled
  128. with that flag, then unexpected relocations could
  129. be detected here. */
  130. break;
  131. case R_XTENSA_SLOT1_OP:
  132. case R_XTENSA_SLOT2_OP:
  133. case R_XTENSA_SLOT3_OP:
  134. case R_XTENSA_SLOT4_OP:
  135. case R_XTENSA_SLOT5_OP:
  136. case R_XTENSA_SLOT6_OP:
  137. case R_XTENSA_SLOT7_OP:
  138. case R_XTENSA_SLOT8_OP:
  139. case R_XTENSA_SLOT9_OP:
  140. case R_XTENSA_SLOT10_OP:
  141. case R_XTENSA_SLOT11_OP:
  142. case R_XTENSA_SLOT12_OP:
  143. case R_XTENSA_SLOT13_OP:
  144. case R_XTENSA_SLOT14_OP:
  145. pr_err("%s: unexpected FLIX relocation: %u\n",
  146. mod->name,
  147. ELF32_R_TYPE(rela[i].r_info));
  148. return -ENOEXEC;
  149. case R_XTENSA_SLOT0_ALT:
  150. case R_XTENSA_SLOT1_ALT:
  151. case R_XTENSA_SLOT2_ALT:
  152. case R_XTENSA_SLOT3_ALT:
  153. case R_XTENSA_SLOT4_ALT:
  154. case R_XTENSA_SLOT5_ALT:
  155. case R_XTENSA_SLOT6_ALT:
  156. case R_XTENSA_SLOT7_ALT:
  157. case R_XTENSA_SLOT8_ALT:
  158. case R_XTENSA_SLOT9_ALT:
  159. case R_XTENSA_SLOT10_ALT:
  160. case R_XTENSA_SLOT11_ALT:
  161. case R_XTENSA_SLOT12_ALT:
  162. case R_XTENSA_SLOT13_ALT:
  163. case R_XTENSA_SLOT14_ALT:
  164. pr_err("%s: unexpected ALT relocation: %u\n",
  165. mod->name,
  166. ELF32_R_TYPE(rela[i].r_info));
  167. return -ENOEXEC;
  168. default:
  169. pr_err("%s: unexpected relocation: %u\n",
  170. mod->name,
  171. ELF32_R_TYPE(rela[i].r_info));
  172. return -ENOEXEC;
  173. }
  174. }
  175. return 0;
  176. }