Kconfig 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705
  1. # SPDX-License-Identifier: GPL-2.0
  2. config XTENSA
  3. def_bool y
  4. select ARCH_32BIT_OFF_T
  5. select ARCH_HAS_BINFMT_FLAT if !MMU
  6. select ARCH_HAS_DMA_PREP_COHERENT if MMU
  7. select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
  8. select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
  9. select ARCH_HAS_DMA_SET_UNCACHED if MMU
  10. select ARCH_USE_QUEUED_RWLOCKS
  11. select ARCH_USE_QUEUED_SPINLOCKS
  12. select ARCH_WANT_FRAME_POINTERS
  13. select ARCH_WANT_IPC_PARSE_VERSION
  14. select BUILDTIME_TABLE_SORT
  15. select CLONE_BACKWARDS
  16. select COMMON_CLK
  17. select DMA_REMAP if MMU
  18. select GENERIC_ATOMIC64
  19. select GENERIC_CLOCKEVENTS
  20. select GENERIC_IRQ_SHOW
  21. select GENERIC_PCI_IOMAP
  22. select GENERIC_SCHED_CLOCK
  23. select GENERIC_STRNCPY_FROM_USER if KASAN
  24. select HAVE_ARCH_AUDITSYSCALL
  25. select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  26. select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
  27. select HAVE_ARCH_SECCOMP_FILTER
  28. select HAVE_ARCH_TRACEHOOK
  29. select HAVE_DEBUG_KMEMLEAK
  30. select HAVE_DMA_CONTIGUOUS
  31. select HAVE_EXIT_THREAD
  32. select HAVE_FUNCTION_TRACER
  33. select HAVE_FUTEX_CMPXCHG if !MMU && FUTEX
  34. select HAVE_HW_BREAKPOINT if PERF_EVENTS
  35. select HAVE_IRQ_TIME_ACCOUNTING
  36. select HAVE_OPROFILE
  37. select HAVE_PCI
  38. select HAVE_PERF_EVENTS
  39. select HAVE_STACKPROTECTOR
  40. select HAVE_SYSCALL_TRACEPOINTS
  41. select IRQ_DOMAIN
  42. select MODULES_USE_ELF_RELA
  43. select PERF_USE_VMALLOC
  44. select SET_FS
  45. select VIRT_TO_BUS
  46. help
  47. Xtensa processors are 32-bit RISC machines designed by Tensilica
  48. primarily for embedded systems. These processors are both
  49. configurable and extensible. The Linux port to the Xtensa
  50. architecture supports all processor configurations and extensions,
  51. with reasonable minimum requirements. The Xtensa Linux project has
  52. a home page at <http://www.linux-xtensa.org/>.
  53. config GENERIC_HWEIGHT
  54. def_bool y
  55. config ARCH_HAS_ILOG2_U32
  56. def_bool n
  57. config ARCH_HAS_ILOG2_U64
  58. def_bool n
  59. config NO_IOPORT_MAP
  60. def_bool n
  61. config HZ
  62. int
  63. default 100
  64. config LOCKDEP_SUPPORT
  65. def_bool y
  66. config STACKTRACE_SUPPORT
  67. def_bool y
  68. config TRACE_IRQFLAGS_SUPPORT
  69. def_bool y
  70. config MMU
  71. def_bool n
  72. config HAVE_XTENSA_GPIO32
  73. def_bool n
  74. config KASAN_SHADOW_OFFSET
  75. hex
  76. default 0x6e400000
  77. menu "Processor type and features"
  78. choice
  79. prompt "Xtensa Processor Configuration"
  80. default XTENSA_VARIANT_FSF
  81. config XTENSA_VARIANT_FSF
  82. bool "fsf - default (not generic) configuration"
  83. select MMU
  84. config XTENSA_VARIANT_DC232B
  85. bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
  86. select MMU
  87. select HAVE_XTENSA_GPIO32
  88. help
  89. This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
  90. config XTENSA_VARIANT_DC233C
  91. bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
  92. select MMU
  93. select HAVE_XTENSA_GPIO32
  94. help
  95. This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
  96. config XTENSA_VARIANT_CUSTOM
  97. bool "Custom Xtensa processor configuration"
  98. select HAVE_XTENSA_GPIO32
  99. help
  100. Select this variant to use a custom Xtensa processor configuration.
  101. You will be prompted for a processor variant CORENAME.
  102. endchoice
  103. config XTENSA_VARIANT_CUSTOM_NAME
  104. string "Xtensa Processor Custom Core Variant Name"
  105. depends on XTENSA_VARIANT_CUSTOM
  106. help
  107. Provide the name of a custom Xtensa processor variant.
  108. This CORENAME selects arch/xtensa/variant/CORENAME.
  109. Don't forget you have to select MMU if you have one.
  110. config XTENSA_VARIANT_NAME
  111. string
  112. default "dc232b" if XTENSA_VARIANT_DC232B
  113. default "dc233c" if XTENSA_VARIANT_DC233C
  114. default "fsf" if XTENSA_VARIANT_FSF
  115. default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
  116. config XTENSA_VARIANT_MMU
  117. bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
  118. depends on XTENSA_VARIANT_CUSTOM
  119. default y
  120. select MMU
  121. help
  122. Build a Conventional Kernel with full MMU support,
  123. ie: it supports a TLB with auto-loading, page protection.
  124. config XTENSA_VARIANT_HAVE_PERF_EVENTS
  125. bool "Core variant has Performance Monitor Module"
  126. depends on XTENSA_VARIANT_CUSTOM
  127. default n
  128. help
  129. Enable if core variant has Performance Monitor Module with
  130. External Registers Interface.
  131. If unsure, say N.
  132. config XTENSA_FAKE_NMI
  133. bool "Treat PMM IRQ as NMI"
  134. depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
  135. default n
  136. help
  137. If PMM IRQ is the only IRQ at EXCM level it is safe to
  138. treat it as NMI, which improves accuracy of profiling.
  139. If there are other interrupts at or above PMM IRQ priority level
  140. but not above the EXCM level, PMM IRQ still may be treated as NMI,
  141. but only if these IRQs are not used. There will be a build warning
  142. saying that this is not safe, and a bugcheck if one of these IRQs
  143. actually fire.
  144. If unsure, say N.
  145. config XTENSA_UNALIGNED_USER
  146. bool "Unaligned memory access in user space"
  147. help
  148. The Xtensa architecture currently does not handle unaligned
  149. memory accesses in hardware but through an exception handler.
  150. Per default, unaligned memory accesses are disabled in user space.
  151. Say Y here to enable unaligned memory access in user space.
  152. config HAVE_SMP
  153. bool "System Supports SMP (MX)"
  154. depends on XTENSA_VARIANT_CUSTOM
  155. select XTENSA_MX
  156. help
  157. This option is used to indicate that the system-on-a-chip (SOC)
  158. supports Multiprocessing. Multiprocessor support implemented above
  159. the CPU core definition and currently needs to be selected manually.
  160. Multiprocessor support is implemented with external cache and
  161. interrupt controllers.
  162. The MX interrupt distributer adds Interprocessor Interrupts
  163. and causes the IRQ numbers to be increased by 4 for devices
  164. like the open cores ethernet driver and the serial interface.
  165. You still have to select "Enable SMP" to enable SMP on this SOC.
  166. config SMP
  167. bool "Enable Symmetric multi-processing support"
  168. depends on HAVE_SMP
  169. select GENERIC_SMP_IDLE_THREAD
  170. help
  171. Enabled SMP Software; allows more than one CPU/CORE
  172. to be activated during startup.
  173. config NR_CPUS
  174. depends on SMP
  175. int "Maximum number of CPUs (2-32)"
  176. range 2 32
  177. default "4"
  178. config HOTPLUG_CPU
  179. bool "Enable CPU hotplug support"
  180. depends on SMP
  181. help
  182. Say Y here to allow turning CPUs off and on. CPUs can be
  183. controlled through /sys/devices/system/cpu.
  184. Say N if you want to disable CPU hotplug.
  185. config FAST_SYSCALL_XTENSA
  186. bool "Enable fast atomic syscalls"
  187. default n
  188. help
  189. fast_syscall_xtensa is a syscall that can make atomic operations
  190. on UP kernel when processor has no s32c1i support.
  191. This syscall is deprecated. It may have issues when called with
  192. invalid arguments. It is provided only for backwards compatibility.
  193. Only enable it if your userspace software requires it.
  194. If unsure, say N.
  195. config FAST_SYSCALL_SPILL_REGISTERS
  196. bool "Enable spill registers syscall"
  197. default n
  198. help
  199. fast_syscall_spill_registers is a syscall that spills all active
  200. register windows of a calling userspace task onto its stack.
  201. This syscall is deprecated. It may have issues when called with
  202. invalid arguments. It is provided only for backwards compatibility.
  203. Only enable it if your userspace software requires it.
  204. If unsure, say N.
  205. config USER_ABI_CALL0
  206. bool
  207. choice
  208. prompt "Userspace ABI"
  209. default USER_ABI_DEFAULT
  210. help
  211. Select supported userspace ABI.
  212. If unsure, choose the default ABI.
  213. config USER_ABI_DEFAULT
  214. bool "Default ABI only"
  215. help
  216. Assume default userspace ABI. For XEA2 cores it is windowed ABI.
  217. call0 ABI binaries may be run on such kernel, but signal delivery
  218. will not work correctly for them.
  219. config USER_ABI_CALL0_ONLY
  220. bool "Call0 ABI only"
  221. select USER_ABI_CALL0
  222. help
  223. Select this option to support only call0 ABI in userspace.
  224. Windowed ABI binaries will crash with a segfault caused by
  225. an illegal instruction exception on the first 'entry' opcode.
  226. Choose this option if you're planning to run only user code
  227. built with call0 ABI.
  228. config USER_ABI_CALL0_PROBE
  229. bool "Support both windowed and call0 ABI by probing"
  230. select USER_ABI_CALL0
  231. help
  232. Select this option to support both windowed and call0 userspace
  233. ABIs. When enabled all processes are started with PS.WOE disabled
  234. and a fast user exception handler for an illegal instruction is
  235. used to turn on PS.WOE bit on the first 'entry' opcode executed by
  236. the userspace.
  237. This option should be enabled for the kernel that must support
  238. both call0 and windowed ABIs in userspace at the same time.
  239. Note that Xtensa ISA does not guarantee that entry opcode will
  240. raise an illegal instruction exception on cores with XEA2 when
  241. PS.WOE is disabled, check whether the target core supports it.
  242. endchoice
  243. endmenu
  244. config XTENSA_CALIBRATE_CCOUNT
  245. def_bool n
  246. help
  247. On some platforms (XT2000, for example), the CPU clock rate can
  248. vary. The frequency can be determined, however, by measuring
  249. against a well known, fixed frequency, such as an UART oscillator.
  250. config SERIAL_CONSOLE
  251. def_bool n
  252. config PLATFORM_HAVE_XIP
  253. def_bool n
  254. menu "Platform options"
  255. choice
  256. prompt "Xtensa System Type"
  257. default XTENSA_PLATFORM_ISS
  258. config XTENSA_PLATFORM_ISS
  259. bool "ISS"
  260. select XTENSA_CALIBRATE_CCOUNT
  261. select SERIAL_CONSOLE
  262. help
  263. ISS is an acronym for Tensilica's Instruction Set Simulator.
  264. config XTENSA_PLATFORM_XT2000
  265. bool "XT2000"
  266. select HAVE_IDE
  267. help
  268. XT2000 is the name of Tensilica's feature-rich emulation platform.
  269. This hardware is capable of running a full Linux distribution.
  270. config XTENSA_PLATFORM_XTFPGA
  271. bool "XTFPGA"
  272. select ETHOC if ETHERNET
  273. select PLATFORM_WANT_DEFAULT_MEM if !MMU
  274. select SERIAL_CONSOLE
  275. select XTENSA_CALIBRATE_CCOUNT
  276. select PLATFORM_HAVE_XIP
  277. help
  278. XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
  279. This hardware is capable of running a full Linux distribution.
  280. endchoice
  281. config PLATFORM_NR_IRQS
  282. int
  283. default 3 if XTENSA_PLATFORM_XT2000
  284. default 0
  285. config XTENSA_CPU_CLOCK
  286. int "CPU clock rate [MHz]"
  287. depends on !XTENSA_CALIBRATE_CCOUNT
  288. default 16
  289. config GENERIC_CALIBRATE_DELAY
  290. bool "Auto calibration of the BogoMIPS value"
  291. help
  292. The BogoMIPS value can easily be derived from the CPU frequency.
  293. config CMDLINE_BOOL
  294. bool "Default bootloader kernel arguments"
  295. config CMDLINE
  296. string "Initial kernel command string"
  297. depends on CMDLINE_BOOL
  298. default "console=ttyS0,38400 root=/dev/ram"
  299. help
  300. On some architectures (EBSA110 and CATS), there is currently no way
  301. for the boot loader to pass arguments to the kernel. For these
  302. architectures, you should supply some command-line options at build
  303. time by entering them here. As a minimum, you should specify the
  304. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  305. config USE_OF
  306. bool "Flattened Device Tree support"
  307. select OF
  308. select OF_EARLY_FLATTREE
  309. help
  310. Include support for flattened device tree machine descriptions.
  311. config BUILTIN_DTB_SOURCE
  312. string "DTB to build into the kernel image"
  313. depends on OF
  314. config PARSE_BOOTPARAM
  315. bool "Parse bootparam block"
  316. default y
  317. help
  318. Parse parameters passed to the kernel from the bootloader. It may
  319. be disabled if the kernel is known to run without the bootloader.
  320. If unsure, say Y.
  321. config BLK_DEV_SIMDISK
  322. tristate "Host file-based simulated block device support"
  323. default n
  324. depends on XTENSA_PLATFORM_ISS && BLOCK
  325. help
  326. Create block devices that map to files in the host file system.
  327. Device binding to host file may be changed at runtime via proc
  328. interface provided the device is not in use.
  329. config BLK_DEV_SIMDISK_COUNT
  330. int "Number of host file-based simulated block devices"
  331. range 1 10
  332. depends on BLK_DEV_SIMDISK
  333. default 2
  334. help
  335. This is the default minimal number of created block devices.
  336. Kernel/module parameter 'simdisk_count' may be used to change this
  337. value at runtime. More file names (but no more than 10) may be
  338. specified as parameters, simdisk_count grows accordingly.
  339. config SIMDISK0_FILENAME
  340. string "Host filename for the first simulated device"
  341. depends on BLK_DEV_SIMDISK = y
  342. default ""
  343. help
  344. Attach a first simdisk to a host file. Conventionally, this file
  345. contains a root file system.
  346. config SIMDISK1_FILENAME
  347. string "Host filename for the second simulated device"
  348. depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
  349. default ""
  350. help
  351. Another simulated disk in a host file for a buildroot-independent
  352. storage.
  353. config XTFPGA_LCD
  354. bool "Enable XTFPGA LCD driver"
  355. depends on XTENSA_PLATFORM_XTFPGA
  356. default n
  357. help
  358. There's a 2x16 LCD on most of XTFPGA boards, kernel may output
  359. progress messages there during bootup/shutdown. It may be useful
  360. during board bringup.
  361. If unsure, say N.
  362. config XTFPGA_LCD_BASE_ADDR
  363. hex "XTFPGA LCD base address"
  364. depends on XTFPGA_LCD
  365. default "0x0d0c0000"
  366. help
  367. Base address of the LCD controller inside KIO region.
  368. Different boards from XTFPGA family have LCD controller at different
  369. addresses. Please consult prototyping user guide for your board for
  370. the correct address. Wrong address here may lead to hardware lockup.
  371. config XTFPGA_LCD_8BIT_ACCESS
  372. bool "Use 8-bit access to XTFPGA LCD"
  373. depends on XTFPGA_LCD
  374. default n
  375. help
  376. LCD may be connected with 4- or 8-bit interface, 8-bit access may
  377. only be used with 8-bit interface. Please consult prototyping user
  378. guide for your board for the correct interface width.
  379. comment "Kernel memory layout"
  380. config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  381. bool "Initialize Xtensa MMU inside the Linux kernel code"
  382. depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
  383. default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
  384. help
  385. Earlier version initialized the MMU in the exception vector
  386. before jumping to _startup in head.S and had an advantage that
  387. it was possible to place a software breakpoint at 'reset' and
  388. then enter your normal kernel breakpoints once the MMU was mapped
  389. to the kernel mappings (0XC0000000).
  390. This unfortunately won't work for U-Boot and likely also wont
  391. work for using KEXEC to have a hot kernel ready for doing a
  392. KDUMP.
  393. So now the MMU is initialized in head.S but it's necessary to
  394. use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
  395. xt-gdb can't place a Software Breakpoint in the 0XD region prior
  396. to mapping the MMU and after mapping even if the area of low memory
  397. was mapped gdb wouldn't remove the breakpoint on hitting it as the
  398. PC wouldn't match. Since Hardware Breakpoints are recommended for
  399. Linux configurations it seems reasonable to just assume they exist
  400. and leave this older mechanism for unfortunate souls that choose
  401. not to follow Tensilica's recommendation.
  402. Selecting this will cause U-Boot to set the KERNEL Load and Entry
  403. address at 0x00003000 instead of the mapped std of 0xD0003000.
  404. If in doubt, say Y.
  405. config XIP_KERNEL
  406. bool "Kernel Execute-In-Place from ROM"
  407. depends on PLATFORM_HAVE_XIP
  408. help
  409. Execute-In-Place allows the kernel to run from non-volatile storage
  410. directly addressable by the CPU, such as NOR flash. This saves RAM
  411. space since the text section of the kernel is not loaded from flash
  412. to RAM. Read-write sections, such as the data section and stack,
  413. are still copied to RAM. The XIP kernel is not compressed since
  414. it has to run directly from flash, so it will take more space to
  415. store it. The flash address used to link the kernel object files,
  416. and for storing it, is configuration dependent. Therefore, if you
  417. say Y here, you must know the proper physical address where to
  418. store the kernel image depending on your own flash memory usage.
  419. Also note that the make target becomes "make xipImage" rather than
  420. "make Image" or "make uImage". The final kernel binary to put in
  421. ROM memory will be arch/xtensa/boot/xipImage.
  422. If unsure, say N.
  423. config MEMMAP_CACHEATTR
  424. hex "Cache attributes for the memory address space"
  425. depends on !MMU
  426. default 0x22222222
  427. help
  428. These cache attributes are set up for noMMU systems. Each hex digit
  429. specifies cache attributes for the corresponding 512MB memory
  430. region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
  431. bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
  432. Cache attribute values are specific for the MMU type.
  433. For region protection MMUs:
  434. 1: WT cached,
  435. 2: cache bypass,
  436. 4: WB cached,
  437. f: illegal.
  438. For full MMU:
  439. bit 0: executable,
  440. bit 1: writable,
  441. bits 2..3:
  442. 0: cache bypass,
  443. 1: WB cache,
  444. 2: WT cache,
  445. 3: special (c and e are illegal, f is reserved).
  446. For MPU:
  447. 0: illegal,
  448. 1: WB cache,
  449. 2: WB, no-write-allocate cache,
  450. 3: WT cache,
  451. 4: cache bypass.
  452. config KSEG_PADDR
  453. hex "Physical address of the KSEG mapping"
  454. depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
  455. default 0x00000000
  456. help
  457. This is the physical address where KSEG is mapped. Please refer to
  458. the chosen KSEG layout help for the required address alignment.
  459. Unpacked kernel image (including vectors) must be located completely
  460. within KSEG.
  461. Physical memory below this address is not available to linux.
  462. If unsure, leave the default value here.
  463. config KERNEL_VIRTUAL_ADDRESS
  464. hex "Kernel virtual address"
  465. depends on MMU && XIP_KERNEL
  466. default 0xd0003000
  467. help
  468. This is the virtual address where the XIP kernel is mapped.
  469. XIP kernel may be mapped into KSEG or KIO region, virtual address
  470. provided here must match kernel load address provided in
  471. KERNEL_LOAD_ADDRESS.
  472. config KERNEL_LOAD_ADDRESS
  473. hex "Kernel load address"
  474. default 0x60003000 if !MMU
  475. default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  476. default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  477. help
  478. This is the address where the kernel is loaded.
  479. It is virtual address for MMUv2 configurations and physical address
  480. for all other configurations.
  481. If unsure, leave the default value here.
  482. choice
  483. prompt "Relocatable vectors location"
  484. default XTENSA_VECTORS_IN_TEXT
  485. help
  486. Choose whether relocatable vectors are merged into the kernel .text
  487. or placed separately at runtime. This option does not affect
  488. configurations without VECBASE register where vectors are always
  489. placed at their hardware-defined locations.
  490. config XTENSA_VECTORS_IN_TEXT
  491. bool "Merge relocatable vectors into kernel text"
  492. depends on !MTD_XIP
  493. help
  494. This option puts relocatable vectors into the kernel .text section
  495. with proper alignment.
  496. This is a safe choice for most configurations.
  497. config XTENSA_VECTORS_SEPARATE
  498. bool "Put relocatable vectors at fixed address"
  499. help
  500. This option puts relocatable vectors at specific virtual address.
  501. Vectors are merged with the .init data in the kernel image and
  502. are copied into their designated location during kernel startup.
  503. Use it to put vectors into IRAM or out of FLASH on kernels with
  504. XIP-aware MTD support.
  505. endchoice
  506. config VECTORS_ADDR
  507. hex "Kernel vectors virtual address"
  508. default 0x00000000
  509. depends on XTENSA_VECTORS_SEPARATE
  510. help
  511. This is the virtual address of the (relocatable) vectors base.
  512. It must be within KSEG if MMU is used.
  513. config XIP_DATA_ADDR
  514. hex "XIP kernel data virtual address"
  515. depends on XIP_KERNEL
  516. default 0x00000000
  517. help
  518. This is the virtual address where XIP kernel data is copied.
  519. It must be within KSEG if MMU is used.
  520. config PLATFORM_WANT_DEFAULT_MEM
  521. def_bool n
  522. config DEFAULT_MEM_START
  523. hex
  524. prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
  525. default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
  526. default 0x00000000
  527. help
  528. This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
  529. in noMMU configurations.
  530. If unsure, leave the default value here.
  531. choice
  532. prompt "KSEG layout"
  533. depends on MMU
  534. default XTENSA_KSEG_MMU_V2
  535. config XTENSA_KSEG_MMU_V2
  536. bool "MMUv2: 128MB cached + 128MB uncached"
  537. help
  538. MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
  539. at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
  540. without cache.
  541. KSEG_PADDR must be aligned to 128MB.
  542. config XTENSA_KSEG_256M
  543. bool "256MB cached + 256MB uncached"
  544. depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  545. help
  546. TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
  547. with cache and to 0xc0000000 without cache.
  548. KSEG_PADDR must be aligned to 256MB.
  549. config XTENSA_KSEG_512M
  550. bool "512MB cached + 512MB uncached"
  551. depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  552. help
  553. TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
  554. with cache and to 0xc0000000 without cache.
  555. KSEG_PADDR must be aligned to 256MB.
  556. endchoice
  557. config HIGHMEM
  558. bool "High Memory Support"
  559. depends on MMU
  560. help
  561. Linux can use the full amount of RAM in the system by
  562. default. However, the default MMUv2 setup only maps the
  563. lowermost 128 MB of memory linearly to the areas starting
  564. at 0xd0000000 (cached) and 0xd8000000 (uncached).
  565. When there are more than 128 MB memory in the system not
  566. all of it can be "permanently mapped" by the kernel.
  567. The physical memory that's not permanently mapped is called
  568. "high memory".
  569. If you are compiling a kernel which will never run on a
  570. machine with more than 128 MB total physical RAM, answer
  571. N here.
  572. If unsure, say Y.
  573. config FORCE_MAX_ZONEORDER
  574. int "Maximum zone order"
  575. default "11"
  576. help
  577. The kernel memory allocator divides physically contiguous memory
  578. blocks into "zones", where each zone is a power of two number of
  579. pages. This option selects the largest power of two that the kernel
  580. keeps in the memory allocator. If you need to allocate very large
  581. blocks of physically contiguous memory, then you may need to
  582. increase this value.
  583. This config option is actually maximum order plus one. For example,
  584. a value of 11 means that the largest free memory block is 2^10 pages.
  585. endmenu
  586. menu "Power management options"
  587. source "kernel/power/Kconfig"
  588. endmenu