jailhouse.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Jailhouse paravirt_ops implementation
  4. *
  5. * Copyright (c) Siemens AG, 2015-2017
  6. *
  7. * Authors:
  8. * Jan Kiszka <jan.kiszka@siemens.com>
  9. */
  10. #include <linux/acpi_pmtmr.h>
  11. #include <linux/kernel.h>
  12. #include <linux/reboot.h>
  13. #include <linux/serial_8250.h>
  14. #include <asm/apic.h>
  15. #include <asm/io_apic.h>
  16. #include <asm/acpi.h>
  17. #include <asm/cpu.h>
  18. #include <asm/hypervisor.h>
  19. #include <asm/i8259.h>
  20. #include <asm/irqdomain.h>
  21. #include <asm/pci_x86.h>
  22. #include <asm/reboot.h>
  23. #include <asm/setup.h>
  24. #include <asm/jailhouse_para.h>
  25. static struct jailhouse_setup_data setup_data;
  26. #define SETUP_DATA_V1_LEN (sizeof(setup_data.hdr) + sizeof(setup_data.v1))
  27. #define SETUP_DATA_V2_LEN (SETUP_DATA_V1_LEN + sizeof(setup_data.v2))
  28. static unsigned int precalibrated_tsc_khz;
  29. static void jailhouse_setup_irq(unsigned int irq)
  30. {
  31. struct mpc_intsrc mp_irq = {
  32. .type = MP_INTSRC,
  33. .irqtype = mp_INT,
  34. .irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE,
  35. .srcbusirq = irq,
  36. .dstirq = irq,
  37. };
  38. mp_save_irq(&mp_irq);
  39. }
  40. static uint32_t jailhouse_cpuid_base(void)
  41. {
  42. if (boot_cpu_data.cpuid_level < 0 ||
  43. !boot_cpu_has(X86_FEATURE_HYPERVISOR))
  44. return 0;
  45. return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
  46. }
  47. static uint32_t __init jailhouse_detect(void)
  48. {
  49. return jailhouse_cpuid_base();
  50. }
  51. static void jailhouse_get_wallclock(struct timespec64 *now)
  52. {
  53. memset(now, 0, sizeof(*now));
  54. }
  55. static void __init jailhouse_timer_init(void)
  56. {
  57. lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ);
  58. }
  59. static unsigned long jailhouse_get_tsc(void)
  60. {
  61. return precalibrated_tsc_khz;
  62. }
  63. static void __init jailhouse_x2apic_init(void)
  64. {
  65. #ifdef CONFIG_X86_X2APIC
  66. if (!x2apic_enabled())
  67. return;
  68. /*
  69. * We do not have access to IR inside Jailhouse non-root cells. So
  70. * we have to run in physical mode.
  71. */
  72. x2apic_phys = 1;
  73. /*
  74. * This will trigger the switch to apic_x2apic_phys. Empty OEM IDs
  75. * ensure that only this APIC driver picks up the call.
  76. */
  77. default_acpi_madt_oem_check("", "");
  78. #endif
  79. }
  80. static void __init jailhouse_get_smp_config(unsigned int early)
  81. {
  82. struct ioapic_domain_cfg ioapic_cfg = {
  83. .type = IOAPIC_DOMAIN_STRICT,
  84. .ops = &mp_ioapic_irqdomain_ops,
  85. };
  86. unsigned int cpu;
  87. jailhouse_x2apic_init();
  88. register_lapic_address(0xfee00000);
  89. for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) {
  90. generic_processor_info(setup_data.v1.cpu_ids[cpu],
  91. boot_cpu_apic_version);
  92. }
  93. smp_found_config = 1;
  94. if (setup_data.v1.standard_ioapic) {
  95. mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);
  96. if (IS_ENABLED(CONFIG_SERIAL_8250) &&
  97. setup_data.hdr.version < 2) {
  98. /* Register 1:1 mapping for legacy UART IRQs 3 and 4 */
  99. jailhouse_setup_irq(3);
  100. jailhouse_setup_irq(4);
  101. }
  102. }
  103. }
  104. static void jailhouse_no_restart(void)
  105. {
  106. pr_notice("Jailhouse: Restart not supported, halting\n");
  107. machine_halt();
  108. }
  109. static int __init jailhouse_pci_arch_init(void)
  110. {
  111. pci_direct_init(1);
  112. /*
  113. * There are no bridges on the virtual PCI root bus under Jailhouse,
  114. * thus no other way to discover all devices than a full scan.
  115. * Respect any overrides via the command line, though.
  116. */
  117. if (pcibios_last_bus < 0)
  118. pcibios_last_bus = 0xff;
  119. #ifdef CONFIG_PCI_MMCONFIG
  120. if (setup_data.v1.pci_mmconfig_base) {
  121. pci_mmconfig_add(0, 0, pcibios_last_bus,
  122. setup_data.v1.pci_mmconfig_base);
  123. pci_mmcfg_arch_init();
  124. }
  125. #endif
  126. return 0;
  127. }
  128. #ifdef CONFIG_SERIAL_8250
  129. static inline bool jailhouse_uart_enabled(unsigned int uart_nr)
  130. {
  131. return setup_data.v2.flags & BIT(uart_nr);
  132. }
  133. static void jailhouse_serial_fixup(int port, struct uart_port *up,
  134. u32 *capabilities)
  135. {
  136. static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};
  137. unsigned int n;
  138. for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) {
  139. if (pcuart_base[n] != up->iobase)
  140. continue;
  141. if (jailhouse_uart_enabled(n)) {
  142. pr_info("Enabling UART%u (port 0x%lx)\n", n,
  143. up->iobase);
  144. jailhouse_setup_irq(up->irq);
  145. } else {
  146. /* Deactivate UART if access isn't allowed */
  147. up->iobase = 0;
  148. }
  149. break;
  150. }
  151. }
  152. static void __init jailhouse_serial_workaround(void)
  153. {
  154. /*
  155. * There are flags inside setup_data that indicate availability of
  156. * platform UARTs since setup data version 2.
  157. *
  158. * In case of version 1, we don't know which UARTs belong Linux. In
  159. * this case, unconditionally register 1:1 mapping for legacy UART IRQs
  160. * 3 and 4.
  161. */
  162. if (setup_data.hdr.version > 1)
  163. serial8250_set_isa_configurator(jailhouse_serial_fixup);
  164. }
  165. #else /* !CONFIG_SERIAL_8250 */
  166. static inline void jailhouse_serial_workaround(void)
  167. {
  168. }
  169. #endif /* CONFIG_SERIAL_8250 */
  170. static void __init jailhouse_init_platform(void)
  171. {
  172. u64 pa_data = boot_params.hdr.setup_data;
  173. unsigned long setup_data_len;
  174. struct setup_data header;
  175. void *mapping;
  176. x86_init.irqs.pre_vector_init = x86_init_noop;
  177. x86_init.timers.timer_init = jailhouse_timer_init;
  178. x86_init.mpparse.get_smp_config = jailhouse_get_smp_config;
  179. x86_init.pci.arch_init = jailhouse_pci_arch_init;
  180. x86_platform.calibrate_cpu = jailhouse_get_tsc;
  181. x86_platform.calibrate_tsc = jailhouse_get_tsc;
  182. x86_platform.get_wallclock = jailhouse_get_wallclock;
  183. x86_platform.legacy.rtc = 0;
  184. x86_platform.legacy.warm_reset = 0;
  185. x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
  186. legacy_pic = &null_legacy_pic;
  187. machine_ops.emergency_restart = jailhouse_no_restart;
  188. while (pa_data) {
  189. mapping = early_memremap(pa_data, sizeof(header));
  190. memcpy(&header, mapping, sizeof(header));
  191. early_memunmap(mapping, sizeof(header));
  192. if (header.type == SETUP_JAILHOUSE)
  193. break;
  194. pa_data = header.next;
  195. }
  196. if (!pa_data)
  197. panic("Jailhouse: No valid setup data found");
  198. /* setup data must at least contain the header */
  199. if (header.len < sizeof(setup_data.hdr))
  200. goto unsupported;
  201. pa_data += offsetof(struct setup_data, data);
  202. setup_data_len = min_t(unsigned long, sizeof(setup_data),
  203. (unsigned long)header.len);
  204. mapping = early_memremap(pa_data, setup_data_len);
  205. memcpy(&setup_data, mapping, setup_data_len);
  206. early_memunmap(mapping, setup_data_len);
  207. if (setup_data.hdr.version == 0 ||
  208. setup_data.hdr.compatible_version !=
  209. JAILHOUSE_SETUP_REQUIRED_VERSION ||
  210. (setup_data.hdr.version == 1 && header.len < SETUP_DATA_V1_LEN) ||
  211. (setup_data.hdr.version >= 2 && header.len < SETUP_DATA_V2_LEN))
  212. goto unsupported;
  213. pmtmr_ioport = setup_data.v1.pm_timer_address;
  214. pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport);
  215. precalibrated_tsc_khz = setup_data.v1.tsc_khz;
  216. setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
  217. pci_probe = 0;
  218. /*
  219. * Avoid that the kernel complains about missing ACPI tables - there
  220. * are none in a non-root cell.
  221. */
  222. disable_acpi();
  223. jailhouse_serial_workaround();
  224. return;
  225. unsupported:
  226. panic("Jailhouse: Unsupported setup data structure");
  227. }
  228. bool jailhouse_paravirt(void)
  229. {
  230. return jailhouse_cpuid_base() != 0;
  231. }
  232. static bool __init jailhouse_x2apic_available(void)
  233. {
  234. /*
  235. * The x2APIC is only available if the root cell enabled it. Jailhouse
  236. * does not support switching between xAPIC and x2APIC.
  237. */
  238. return x2apic_enabled();
  239. }
  240. const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
  241. .name = "Jailhouse",
  242. .detect = jailhouse_detect,
  243. .init.init_platform = jailhouse_init_platform,
  244. .init.x2apic_available = jailhouse_x2apic_available,
  245. .ignore_nopv = true,
  246. };