bpf_jit_comp_32.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764
  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/moduleloader.h>
  3. #include <linux/workqueue.h>
  4. #include <linux/netdevice.h>
  5. #include <linux/filter.h>
  6. #include <linux/cache.h>
  7. #include <linux/if_vlan.h>
  8. #include <asm/cacheflush.h>
  9. #include <asm/ptrace.h>
  10. #include "bpf_jit_32.h"
  11. static inline bool is_simm13(unsigned int value)
  12. {
  13. return value + 0x1000 < 0x2000;
  14. }
  15. #define SEEN_DATAREF 1 /* might call external helpers */
  16. #define SEEN_XREG 2 /* ebx is used */
  17. #define SEEN_MEM 4 /* use mem[] for temporary storage */
  18. #define S13(X) ((X) & 0x1fff)
  19. #define IMMED 0x00002000
  20. #define RD(X) ((X) << 25)
  21. #define RS1(X) ((X) << 14)
  22. #define RS2(X) ((X))
  23. #define OP(X) ((X) << 30)
  24. #define OP2(X) ((X) << 22)
  25. #define OP3(X) ((X) << 19)
  26. #define COND(X) ((X) << 25)
  27. #define F1(X) OP(X)
  28. #define F2(X, Y) (OP(X) | OP2(Y))
  29. #define F3(X, Y) (OP(X) | OP3(Y))
  30. #define CONDN COND(0x0)
  31. #define CONDE COND(0x1)
  32. #define CONDLE COND(0x2)
  33. #define CONDL COND(0x3)
  34. #define CONDLEU COND(0x4)
  35. #define CONDCS COND(0x5)
  36. #define CONDNEG COND(0x6)
  37. #define CONDVC COND(0x7)
  38. #define CONDA COND(0x8)
  39. #define CONDNE COND(0x9)
  40. #define CONDG COND(0xa)
  41. #define CONDGE COND(0xb)
  42. #define CONDGU COND(0xc)
  43. #define CONDCC COND(0xd)
  44. #define CONDPOS COND(0xe)
  45. #define CONDVS COND(0xf)
  46. #define CONDGEU CONDCC
  47. #define CONDLU CONDCS
  48. #define WDISP22(X) (((X) >> 2) & 0x3fffff)
  49. #define BA (F2(0, 2) | CONDA)
  50. #define BGU (F2(0, 2) | CONDGU)
  51. #define BLEU (F2(0, 2) | CONDLEU)
  52. #define BGEU (F2(0, 2) | CONDGEU)
  53. #define BLU (F2(0, 2) | CONDLU)
  54. #define BE (F2(0, 2) | CONDE)
  55. #define BNE (F2(0, 2) | CONDNE)
  56. #define BE_PTR BE
  57. #define SETHI(K, REG) \
  58. (F2(0, 0x4) | RD(REG) | (((K) >> 10) & 0x3fffff))
  59. #define OR_LO(K, REG) \
  60. (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
  61. #define ADD F3(2, 0x00)
  62. #define AND F3(2, 0x01)
  63. #define ANDCC F3(2, 0x11)
  64. #define OR F3(2, 0x02)
  65. #define XOR F3(2, 0x03)
  66. #define SUB F3(2, 0x04)
  67. #define SUBCC F3(2, 0x14)
  68. #define MUL F3(2, 0x0a) /* umul */
  69. #define DIV F3(2, 0x0e) /* udiv */
  70. #define SLL F3(2, 0x25)
  71. #define SRL F3(2, 0x26)
  72. #define JMPL F3(2, 0x38)
  73. #define CALL F1(1)
  74. #define BR F2(0, 0x01)
  75. #define RD_Y F3(2, 0x28)
  76. #define WR_Y F3(2, 0x30)
  77. #define LD32 F3(3, 0x00)
  78. #define LD8 F3(3, 0x01)
  79. #define LD16 F3(3, 0x02)
  80. #define LD64 F3(3, 0x0b)
  81. #define ST32 F3(3, 0x04)
  82. #define LDPTR LD32
  83. #define BASE_STACKFRAME 96
  84. #define LD32I (LD32 | IMMED)
  85. #define LD8I (LD8 | IMMED)
  86. #define LD16I (LD16 | IMMED)
  87. #define LD64I (LD64 | IMMED)
  88. #define LDPTRI (LDPTR | IMMED)
  89. #define ST32I (ST32 | IMMED)
  90. #define emit_nop() \
  91. do { \
  92. *prog++ = SETHI(0, G0); \
  93. } while (0)
  94. #define emit_neg() \
  95. do { /* sub %g0, r_A, r_A */ \
  96. *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
  97. } while (0)
  98. #define emit_reg_move(FROM, TO) \
  99. do { /* or %g0, FROM, TO */ \
  100. *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
  101. } while (0)
  102. #define emit_clear(REG) \
  103. do { /* or %g0, %g0, REG */ \
  104. *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
  105. } while (0)
  106. #define emit_set_const(K, REG) \
  107. do { /* sethi %hi(K), REG */ \
  108. *prog++ = SETHI(K, REG); \
  109. /* or REG, %lo(K), REG */ \
  110. *prog++ = OR_LO(K, REG); \
  111. } while (0)
  112. /* Emit
  113. *
  114. * OP r_A, r_X, r_A
  115. */
  116. #define emit_alu_X(OPCODE) \
  117. do { \
  118. seen |= SEEN_XREG; \
  119. *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
  120. } while (0)
  121. /* Emit either:
  122. *
  123. * OP r_A, K, r_A
  124. *
  125. * or
  126. *
  127. * sethi %hi(K), r_TMP
  128. * or r_TMP, %lo(K), r_TMP
  129. * OP r_A, r_TMP, r_A
  130. *
  131. * depending upon whether K fits in a signed 13-bit
  132. * immediate instruction field. Emit nothing if K
  133. * is zero.
  134. */
  135. #define emit_alu_K(OPCODE, K) \
  136. do { \
  137. if (K || OPCODE == AND || OPCODE == MUL) { \
  138. unsigned int _insn = OPCODE; \
  139. _insn |= RS1(r_A) | RD(r_A); \
  140. if (is_simm13(K)) { \
  141. *prog++ = _insn | IMMED | S13(K); \
  142. } else { \
  143. emit_set_const(K, r_TMP); \
  144. *prog++ = _insn | RS2(r_TMP); \
  145. } \
  146. } \
  147. } while (0)
  148. #define emit_loadimm(K, DEST) \
  149. do { \
  150. if (is_simm13(K)) { \
  151. /* or %g0, K, DEST */ \
  152. *prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST); \
  153. } else { \
  154. emit_set_const(K, DEST); \
  155. } \
  156. } while (0)
  157. #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \
  158. do { unsigned int _off = offsetof(STRUCT, FIELD); \
  159. BUILD_BUG_ON(sizeof_field(STRUCT, FIELD) != sizeof(void *)); \
  160. *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
  161. } while (0)
  162. #define emit_load32(BASE, STRUCT, FIELD, DEST) \
  163. do { unsigned int _off = offsetof(STRUCT, FIELD); \
  164. BUILD_BUG_ON(sizeof_field(STRUCT, FIELD) != sizeof(u32)); \
  165. *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
  166. } while (0)
  167. #define emit_load16(BASE, STRUCT, FIELD, DEST) \
  168. do { unsigned int _off = offsetof(STRUCT, FIELD); \
  169. BUILD_BUG_ON(sizeof_field(STRUCT, FIELD) != sizeof(u16)); \
  170. *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \
  171. } while (0)
  172. #define __emit_load8(BASE, STRUCT, FIELD, DEST) \
  173. do { unsigned int _off = offsetof(STRUCT, FIELD); \
  174. *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \
  175. } while (0)
  176. #define emit_load8(BASE, STRUCT, FIELD, DEST) \
  177. do { BUILD_BUG_ON(sizeof_field(STRUCT, FIELD) != sizeof(u8)); \
  178. __emit_load8(BASE, STRUCT, FIELD, DEST); \
  179. } while (0)
  180. #define BIAS (-4)
  181. #define emit_ldmem(OFF, DEST) \
  182. do { *prog++ = LD32I | RS1(SP) | S13(BIAS - (OFF)) | RD(DEST); \
  183. } while (0)
  184. #define emit_stmem(OFF, SRC) \
  185. do { *prog++ = ST32I | RS1(SP) | S13(BIAS - (OFF)) | RD(SRC); \
  186. } while (0)
  187. #ifdef CONFIG_SMP
  188. #define emit_load_cpu(REG) \
  189. emit_load32(G6, struct thread_info, cpu, REG)
  190. #else
  191. #define emit_load_cpu(REG) emit_clear(REG)
  192. #endif
  193. #define emit_skb_loadptr(FIELD, DEST) \
  194. emit_loadptr(r_SKB, struct sk_buff, FIELD, DEST)
  195. #define emit_skb_load32(FIELD, DEST) \
  196. emit_load32(r_SKB, struct sk_buff, FIELD, DEST)
  197. #define emit_skb_load16(FIELD, DEST) \
  198. emit_load16(r_SKB, struct sk_buff, FIELD, DEST)
  199. #define __emit_skb_load8(FIELD, DEST) \
  200. __emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
  201. #define emit_skb_load8(FIELD, DEST) \
  202. emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
  203. #define emit_jmpl(BASE, IMM_OFF, LREG) \
  204. *prog++ = (JMPL | IMMED | RS1(BASE) | S13(IMM_OFF) | RD(LREG))
  205. #define emit_call(FUNC) \
  206. do { void *_here = image + addrs[i] - 8; \
  207. unsigned int _off = (void *)(FUNC) - _here; \
  208. *prog++ = CALL | (((_off) >> 2) & 0x3fffffff); \
  209. emit_nop(); \
  210. } while (0)
  211. #define emit_branch(BR_OPC, DEST) \
  212. do { unsigned int _here = addrs[i] - 8; \
  213. *prog++ = BR_OPC | WDISP22((DEST) - _here); \
  214. } while (0)
  215. #define emit_branch_off(BR_OPC, OFF) \
  216. do { *prog++ = BR_OPC | WDISP22(OFF); \
  217. } while (0)
  218. #define emit_jump(DEST) emit_branch(BA, DEST)
  219. #define emit_read_y(REG) *prog++ = RD_Y | RD(REG)
  220. #define emit_write_y(REG) *prog++ = WR_Y | IMMED | RS1(REG) | S13(0)
  221. #define emit_cmp(R1, R2) \
  222. *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
  223. #define emit_cmpi(R1, IMM) \
  224. *prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
  225. #define emit_btst(R1, R2) \
  226. *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
  227. #define emit_btsti(R1, IMM) \
  228. *prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
  229. #define emit_sub(R1, R2, R3) \
  230. *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
  231. #define emit_subi(R1, IMM, R3) \
  232. *prog++ = (SUB | IMMED | RS1(R1) | S13(IMM) | RD(R3))
  233. #define emit_add(R1, R2, R3) \
  234. *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
  235. #define emit_addi(R1, IMM, R3) \
  236. *prog++ = (ADD | IMMED | RS1(R1) | S13(IMM) | RD(R3))
  237. #define emit_and(R1, R2, R3) \
  238. *prog++ = (AND | RS1(R1) | RS2(R2) | RD(R3))
  239. #define emit_andi(R1, IMM, R3) \
  240. *prog++ = (AND | IMMED | RS1(R1) | S13(IMM) | RD(R3))
  241. #define emit_alloc_stack(SZ) \
  242. *prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))
  243. #define emit_release_stack(SZ) \
  244. *prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))
  245. /* A note about branch offset calculations. The addrs[] array,
  246. * indexed by BPF instruction, records the address after all the
  247. * sparc instructions emitted for that BPF instruction.
  248. *
  249. * The most common case is to emit a branch at the end of such
  250. * a code sequence. So this would be two instructions, the
  251. * branch and it's delay slot.
  252. *
  253. * Therefore by default the branch emitters calculate the branch
  254. * offset field as:
  255. *
  256. * destination - (addrs[i] - 8)
  257. *
  258. * This "addrs[i] - 8" is the address of the branch itself or
  259. * what "." would be in assembler notation. The "8" part is
  260. * how we take into consideration the branch and it's delay
  261. * slot mentioned above.
  262. *
  263. * Sometimes we need to emit a branch earlier in the code
  264. * sequence. And in these situations we adjust "destination"
  265. * to accommodate this difference. For example, if we needed
  266. * to emit a branch (and it's delay slot) right before the
  267. * final instruction emitted for a BPF opcode, we'd use
  268. * "destination + 4" instead of just plain "destination" above.
  269. *
  270. * This is why you see all of these funny emit_branch() and
  271. * emit_jump() calls with adjusted offsets.
  272. */
  273. void bpf_jit_compile(struct bpf_prog *fp)
  274. {
  275. unsigned int cleanup_addr, proglen, oldproglen = 0;
  276. u32 temp[8], *prog, *func, seen = 0, pass;
  277. const struct sock_filter *filter = fp->insns;
  278. int i, flen = fp->len, pc_ret0 = -1;
  279. unsigned int *addrs;
  280. void *image;
  281. if (!bpf_jit_enable)
  282. return;
  283. addrs = kmalloc_array(flen, sizeof(*addrs), GFP_KERNEL);
  284. if (addrs == NULL)
  285. return;
  286. /* Before first pass, make a rough estimation of addrs[]
  287. * each bpf instruction is translated to less than 64 bytes
  288. */
  289. for (proglen = 0, i = 0; i < flen; i++) {
  290. proglen += 64;
  291. addrs[i] = proglen;
  292. }
  293. cleanup_addr = proglen; /* epilogue address */
  294. image = NULL;
  295. for (pass = 0; pass < 10; pass++) {
  296. u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;
  297. /* no prologue/epilogue for trivial filters (RET something) */
  298. proglen = 0;
  299. prog = temp;
  300. /* Prologue */
  301. if (seen_or_pass0) {
  302. if (seen_or_pass0 & SEEN_MEM) {
  303. unsigned int sz = BASE_STACKFRAME;
  304. sz += BPF_MEMWORDS * sizeof(u32);
  305. emit_alloc_stack(sz);
  306. }
  307. /* Make sure we dont leek kernel memory. */
  308. if (seen_or_pass0 & SEEN_XREG)
  309. emit_clear(r_X);
  310. /* If this filter needs to access skb data,
  311. * load %o4 and %o5 with:
  312. * %o4 = skb->len - skb->data_len
  313. * %o5 = skb->data
  314. * And also back up %o7 into r_saved_O7 so we can
  315. * invoke the stubs using 'call'.
  316. */
  317. if (seen_or_pass0 & SEEN_DATAREF) {
  318. emit_load32(r_SKB, struct sk_buff, len, r_HEADLEN);
  319. emit_load32(r_SKB, struct sk_buff, data_len, r_TMP);
  320. emit_sub(r_HEADLEN, r_TMP, r_HEADLEN);
  321. emit_loadptr(r_SKB, struct sk_buff, data, r_SKB_DATA);
  322. }
  323. }
  324. emit_reg_move(O7, r_saved_O7);
  325. /* Make sure we dont leak kernel information to the user. */
  326. if (bpf_needs_clear_a(&filter[0]))
  327. emit_clear(r_A); /* A = 0 */
  328. for (i = 0; i < flen; i++) {
  329. unsigned int K = filter[i].k;
  330. unsigned int t_offset;
  331. unsigned int f_offset;
  332. u32 t_op, f_op;
  333. u16 code = bpf_anc_helper(&filter[i]);
  334. int ilen;
  335. switch (code) {
  336. case BPF_ALU | BPF_ADD | BPF_X: /* A += X; */
  337. emit_alu_X(ADD);
  338. break;
  339. case BPF_ALU | BPF_ADD | BPF_K: /* A += K; */
  340. emit_alu_K(ADD, K);
  341. break;
  342. case BPF_ALU | BPF_SUB | BPF_X: /* A -= X; */
  343. emit_alu_X(SUB);
  344. break;
  345. case BPF_ALU | BPF_SUB | BPF_K: /* A -= K */
  346. emit_alu_K(SUB, K);
  347. break;
  348. case BPF_ALU | BPF_AND | BPF_X: /* A &= X */
  349. emit_alu_X(AND);
  350. break;
  351. case BPF_ALU | BPF_AND | BPF_K: /* A &= K */
  352. emit_alu_K(AND, K);
  353. break;
  354. case BPF_ALU | BPF_OR | BPF_X: /* A |= X */
  355. emit_alu_X(OR);
  356. break;
  357. case BPF_ALU | BPF_OR | BPF_K: /* A |= K */
  358. emit_alu_K(OR, K);
  359. break;
  360. case BPF_ANC | SKF_AD_ALU_XOR_X: /* A ^= X; */
  361. case BPF_ALU | BPF_XOR | BPF_X:
  362. emit_alu_X(XOR);
  363. break;
  364. case BPF_ALU | BPF_XOR | BPF_K: /* A ^= K */
  365. emit_alu_K(XOR, K);
  366. break;
  367. case BPF_ALU | BPF_LSH | BPF_X: /* A <<= X */
  368. emit_alu_X(SLL);
  369. break;
  370. case BPF_ALU | BPF_LSH | BPF_K: /* A <<= K */
  371. emit_alu_K(SLL, K);
  372. break;
  373. case BPF_ALU | BPF_RSH | BPF_X: /* A >>= X */
  374. emit_alu_X(SRL);
  375. break;
  376. case BPF_ALU | BPF_RSH | BPF_K: /* A >>= K */
  377. emit_alu_K(SRL, K);
  378. break;
  379. case BPF_ALU | BPF_MUL | BPF_X: /* A *= X; */
  380. emit_alu_X(MUL);
  381. break;
  382. case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */
  383. emit_alu_K(MUL, K);
  384. break;
  385. case BPF_ALU | BPF_DIV | BPF_K: /* A /= K with K != 0*/
  386. if (K == 1)
  387. break;
  388. emit_write_y(G0);
  389. /* The Sparc v8 architecture requires
  390. * three instructions between a %y
  391. * register write and the first use.
  392. */
  393. emit_nop();
  394. emit_nop();
  395. emit_nop();
  396. emit_alu_K(DIV, K);
  397. break;
  398. case BPF_ALU | BPF_DIV | BPF_X: /* A /= X; */
  399. emit_cmpi(r_X, 0);
  400. if (pc_ret0 > 0) {
  401. t_offset = addrs[pc_ret0 - 1];
  402. emit_branch(BE, t_offset + 20);
  403. emit_nop(); /* delay slot */
  404. } else {
  405. emit_branch_off(BNE, 16);
  406. emit_nop();
  407. emit_jump(cleanup_addr + 20);
  408. emit_clear(r_A);
  409. }
  410. emit_write_y(G0);
  411. /* The Sparc v8 architecture requires
  412. * three instructions between a %y
  413. * register write and the first use.
  414. */
  415. emit_nop();
  416. emit_nop();
  417. emit_nop();
  418. emit_alu_X(DIV);
  419. break;
  420. case BPF_ALU | BPF_NEG:
  421. emit_neg();
  422. break;
  423. case BPF_RET | BPF_K:
  424. if (!K) {
  425. if (pc_ret0 == -1)
  426. pc_ret0 = i;
  427. emit_clear(r_A);
  428. } else {
  429. emit_loadimm(K, r_A);
  430. }
  431. fallthrough;
  432. case BPF_RET | BPF_A:
  433. if (seen_or_pass0) {
  434. if (i != flen - 1) {
  435. emit_jump(cleanup_addr);
  436. emit_nop();
  437. break;
  438. }
  439. if (seen_or_pass0 & SEEN_MEM) {
  440. unsigned int sz = BASE_STACKFRAME;
  441. sz += BPF_MEMWORDS * sizeof(u32);
  442. emit_release_stack(sz);
  443. }
  444. }
  445. /* jmpl %r_saved_O7 + 8, %g0 */
  446. emit_jmpl(r_saved_O7, 8, G0);
  447. emit_reg_move(r_A, O0); /* delay slot */
  448. break;
  449. case BPF_MISC | BPF_TAX:
  450. seen |= SEEN_XREG;
  451. emit_reg_move(r_A, r_X);
  452. break;
  453. case BPF_MISC | BPF_TXA:
  454. seen |= SEEN_XREG;
  455. emit_reg_move(r_X, r_A);
  456. break;
  457. case BPF_ANC | SKF_AD_CPU:
  458. emit_load_cpu(r_A);
  459. break;
  460. case BPF_ANC | SKF_AD_PROTOCOL:
  461. emit_skb_load16(protocol, r_A);
  462. break;
  463. case BPF_ANC | SKF_AD_PKTTYPE:
  464. __emit_skb_load8(__pkt_type_offset, r_A);
  465. emit_andi(r_A, PKT_TYPE_MAX, r_A);
  466. emit_alu_K(SRL, 5);
  467. break;
  468. case BPF_ANC | SKF_AD_IFINDEX:
  469. emit_skb_loadptr(dev, r_A);
  470. emit_cmpi(r_A, 0);
  471. emit_branch(BE_PTR, cleanup_addr + 4);
  472. emit_nop();
  473. emit_load32(r_A, struct net_device, ifindex, r_A);
  474. break;
  475. case BPF_ANC | SKF_AD_MARK:
  476. emit_skb_load32(mark, r_A);
  477. break;
  478. case BPF_ANC | SKF_AD_QUEUE:
  479. emit_skb_load16(queue_mapping, r_A);
  480. break;
  481. case BPF_ANC | SKF_AD_HATYPE:
  482. emit_skb_loadptr(dev, r_A);
  483. emit_cmpi(r_A, 0);
  484. emit_branch(BE_PTR, cleanup_addr + 4);
  485. emit_nop();
  486. emit_load16(r_A, struct net_device, type, r_A);
  487. break;
  488. case BPF_ANC | SKF_AD_RXHASH:
  489. emit_skb_load32(hash, r_A);
  490. break;
  491. case BPF_ANC | SKF_AD_VLAN_TAG:
  492. emit_skb_load16(vlan_tci, r_A);
  493. break;
  494. case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
  495. __emit_skb_load8(__pkt_vlan_present_offset, r_A);
  496. if (PKT_VLAN_PRESENT_BIT)
  497. emit_alu_K(SRL, PKT_VLAN_PRESENT_BIT);
  498. if (PKT_VLAN_PRESENT_BIT < 7)
  499. emit_andi(r_A, 1, r_A);
  500. break;
  501. case BPF_LD | BPF_W | BPF_LEN:
  502. emit_skb_load32(len, r_A);
  503. break;
  504. case BPF_LDX | BPF_W | BPF_LEN:
  505. emit_skb_load32(len, r_X);
  506. break;
  507. case BPF_LD | BPF_IMM:
  508. emit_loadimm(K, r_A);
  509. break;
  510. case BPF_LDX | BPF_IMM:
  511. emit_loadimm(K, r_X);
  512. break;
  513. case BPF_LD | BPF_MEM:
  514. seen |= SEEN_MEM;
  515. emit_ldmem(K * 4, r_A);
  516. break;
  517. case BPF_LDX | BPF_MEM:
  518. seen |= SEEN_MEM | SEEN_XREG;
  519. emit_ldmem(K * 4, r_X);
  520. break;
  521. case BPF_ST:
  522. seen |= SEEN_MEM;
  523. emit_stmem(K * 4, r_A);
  524. break;
  525. case BPF_STX:
  526. seen |= SEEN_MEM | SEEN_XREG;
  527. emit_stmem(K * 4, r_X);
  528. break;
  529. #define CHOOSE_LOAD_FUNC(K, func) \
  530. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  531. case BPF_LD | BPF_W | BPF_ABS:
  532. func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_word);
  533. common_load: seen |= SEEN_DATAREF;
  534. emit_loadimm(K, r_OFF);
  535. emit_call(func);
  536. break;
  537. case BPF_LD | BPF_H | BPF_ABS:
  538. func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_half);
  539. goto common_load;
  540. case BPF_LD | BPF_B | BPF_ABS:
  541. func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte);
  542. goto common_load;
  543. case BPF_LDX | BPF_B | BPF_MSH:
  544. func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte_msh);
  545. goto common_load;
  546. case BPF_LD | BPF_W | BPF_IND:
  547. func = bpf_jit_load_word;
  548. common_load_ind: seen |= SEEN_DATAREF | SEEN_XREG;
  549. if (K) {
  550. if (is_simm13(K)) {
  551. emit_addi(r_X, K, r_OFF);
  552. } else {
  553. emit_loadimm(K, r_TMP);
  554. emit_add(r_X, r_TMP, r_OFF);
  555. }
  556. } else {
  557. emit_reg_move(r_X, r_OFF);
  558. }
  559. emit_call(func);
  560. break;
  561. case BPF_LD | BPF_H | BPF_IND:
  562. func = bpf_jit_load_half;
  563. goto common_load_ind;
  564. case BPF_LD | BPF_B | BPF_IND:
  565. func = bpf_jit_load_byte;
  566. goto common_load_ind;
  567. case BPF_JMP | BPF_JA:
  568. emit_jump(addrs[i + K]);
  569. emit_nop();
  570. break;
  571. #define COND_SEL(CODE, TOP, FOP) \
  572. case CODE: \
  573. t_op = TOP; \
  574. f_op = FOP; \
  575. goto cond_branch
  576. COND_SEL(BPF_JMP | BPF_JGT | BPF_K, BGU, BLEU);
  577. COND_SEL(BPF_JMP | BPF_JGE | BPF_K, BGEU, BLU);
  578. COND_SEL(BPF_JMP | BPF_JEQ | BPF_K, BE, BNE);
  579. COND_SEL(BPF_JMP | BPF_JSET | BPF_K, BNE, BE);
  580. COND_SEL(BPF_JMP | BPF_JGT | BPF_X, BGU, BLEU);
  581. COND_SEL(BPF_JMP | BPF_JGE | BPF_X, BGEU, BLU);
  582. COND_SEL(BPF_JMP | BPF_JEQ | BPF_X, BE, BNE);
  583. COND_SEL(BPF_JMP | BPF_JSET | BPF_X, BNE, BE);
  584. cond_branch: f_offset = addrs[i + filter[i].jf];
  585. t_offset = addrs[i + filter[i].jt];
  586. /* same targets, can avoid doing the test :) */
  587. if (filter[i].jt == filter[i].jf) {
  588. emit_jump(t_offset);
  589. emit_nop();
  590. break;
  591. }
  592. switch (code) {
  593. case BPF_JMP | BPF_JGT | BPF_X:
  594. case BPF_JMP | BPF_JGE | BPF_X:
  595. case BPF_JMP | BPF_JEQ | BPF_X:
  596. seen |= SEEN_XREG;
  597. emit_cmp(r_A, r_X);
  598. break;
  599. case BPF_JMP | BPF_JSET | BPF_X:
  600. seen |= SEEN_XREG;
  601. emit_btst(r_A, r_X);
  602. break;
  603. case BPF_JMP | BPF_JEQ | BPF_K:
  604. case BPF_JMP | BPF_JGT | BPF_K:
  605. case BPF_JMP | BPF_JGE | BPF_K:
  606. if (is_simm13(K)) {
  607. emit_cmpi(r_A, K);
  608. } else {
  609. emit_loadimm(K, r_TMP);
  610. emit_cmp(r_A, r_TMP);
  611. }
  612. break;
  613. case BPF_JMP | BPF_JSET | BPF_K:
  614. if (is_simm13(K)) {
  615. emit_btsti(r_A, K);
  616. } else {
  617. emit_loadimm(K, r_TMP);
  618. emit_btst(r_A, r_TMP);
  619. }
  620. break;
  621. }
  622. if (filter[i].jt != 0) {
  623. if (filter[i].jf)
  624. t_offset += 8;
  625. emit_branch(t_op, t_offset);
  626. emit_nop(); /* delay slot */
  627. if (filter[i].jf) {
  628. emit_jump(f_offset);
  629. emit_nop();
  630. }
  631. break;
  632. }
  633. emit_branch(f_op, f_offset);
  634. emit_nop(); /* delay slot */
  635. break;
  636. default:
  637. /* hmm, too complex filter, give up with jit compiler */
  638. goto out;
  639. }
  640. ilen = (void *) prog - (void *) temp;
  641. if (image) {
  642. if (unlikely(proglen + ilen > oldproglen)) {
  643. pr_err("bpb_jit_compile fatal error\n");
  644. kfree(addrs);
  645. module_memfree(image);
  646. return;
  647. }
  648. memcpy(image + proglen, temp, ilen);
  649. }
  650. proglen += ilen;
  651. addrs[i] = proglen;
  652. prog = temp;
  653. }
  654. /* last bpf instruction is always a RET :
  655. * use it to give the cleanup instruction(s) addr
  656. */
  657. cleanup_addr = proglen - 8; /* jmpl; mov r_A,%o0; */
  658. if (seen_or_pass0 & SEEN_MEM)
  659. cleanup_addr -= 4; /* add %sp, X, %sp; */
  660. if (image) {
  661. if (proglen != oldproglen)
  662. pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n",
  663. proglen, oldproglen);
  664. break;
  665. }
  666. if (proglen == oldproglen) {
  667. image = module_alloc(proglen);
  668. if (!image)
  669. goto out;
  670. }
  671. oldproglen = proglen;
  672. }
  673. if (bpf_jit_enable > 1)
  674. bpf_jit_dump(flen, proglen, pass + 1, image);
  675. if (image) {
  676. fp->bpf_func = (void *)image;
  677. fp->jited = 1;
  678. }
  679. out:
  680. kfree(addrs);
  681. return;
  682. }
  683. void bpf_jit_free(struct bpf_prog *fp)
  684. {
  685. if (fp->jited)
  686. module_memfree(fp->bpf_func);
  687. bpf_prog_unlock_free(fp);
  688. }