tsunami.S 3.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * tsunami.S: High speed MicroSparc-I mmu/cache operations.
  4. *
  5. * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
  6. */
  7. #include <asm/ptrace.h>
  8. #include <asm/asm-offsets.h>
  9. #include <asm/psr.h>
  10. #include <asm/asi.h>
  11. #include <asm/page.h>
  12. #include <asm/pgtsrmmu.h>
  13. .text
  14. .align 4
  15. .globl tsunami_flush_cache_all, tsunami_flush_cache_mm
  16. .globl tsunami_flush_cache_range, tsunami_flush_cache_page
  17. .globl tsunami_flush_page_to_ram, tsunami_flush_page_for_dma
  18. .globl tsunami_flush_sig_insns
  19. .globl tsunami_flush_tlb_all, tsunami_flush_tlb_mm
  20. .globl tsunami_flush_tlb_range, tsunami_flush_tlb_page
  21. /* Sliiick... */
  22. tsunami_flush_cache_page:
  23. tsunami_flush_cache_range:
  24. ld [%o0 + VMA_VM_MM], %o0
  25. tsunami_flush_cache_mm:
  26. ld [%o0 + AOFF_mm_context], %g2
  27. cmp %g2, -1
  28. be tsunami_flush_cache_out
  29. tsunami_flush_cache_all:
  30. WINDOW_FLUSH(%g4, %g5)
  31. tsunami_flush_page_for_dma:
  32. sta %g0, [%g0] ASI_M_IC_FLCLEAR
  33. sta %g0, [%g0] ASI_M_DC_FLCLEAR
  34. tsunami_flush_cache_out:
  35. tsunami_flush_page_to_ram:
  36. retl
  37. nop
  38. tsunami_flush_sig_insns:
  39. flush %o1
  40. retl
  41. flush %o1 + 4
  42. /* More slick stuff... */
  43. tsunami_flush_tlb_range:
  44. ld [%o0 + VMA_VM_MM], %o0
  45. tsunami_flush_tlb_mm:
  46. ld [%o0 + AOFF_mm_context], %g2
  47. cmp %g2, -1
  48. be tsunami_flush_tlb_out
  49. tsunami_flush_tlb_all:
  50. mov 0x400, %o1
  51. sta %g0, [%o1] ASI_M_FLUSH_PROBE
  52. nop
  53. nop
  54. nop
  55. nop
  56. nop
  57. tsunami_flush_tlb_out:
  58. retl
  59. nop
  60. /* This one can be done in a fine grained manner... */
  61. tsunami_flush_tlb_page:
  62. ld [%o0 + VMA_VM_MM], %o0
  63. mov SRMMU_CTX_REG, %g1
  64. ld [%o0 + AOFF_mm_context], %o3
  65. andn %o1, (PAGE_SIZE - 1), %o1
  66. cmp %o3, -1
  67. be tsunami_flush_tlb_page_out
  68. lda [%g1] ASI_M_MMUREGS, %g5
  69. sta %o3, [%g1] ASI_M_MMUREGS
  70. sta %g0, [%o1] ASI_M_FLUSH_PROBE
  71. nop
  72. nop
  73. nop
  74. nop
  75. nop
  76. tsunami_flush_tlb_page_out:
  77. retl
  78. sta %g5, [%g1] ASI_M_MMUREGS
  79. #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3) \
  80. ldd [src + offset + 0x18], t0; \
  81. std t0, [dst + offset + 0x18]; \
  82. ldd [src + offset + 0x10], t2; \
  83. std t2, [dst + offset + 0x10]; \
  84. ldd [src + offset + 0x08], t0; \
  85. std t0, [dst + offset + 0x08]; \
  86. ldd [src + offset + 0x00], t2; \
  87. std t2, [dst + offset + 0x00];
  88. tsunami_copy_1page:
  89. /* NOTE: This routine has to be shorter than 70insns --jj */
  90. or %g0, (PAGE_SIZE >> 8), %g1
  91. 1:
  92. MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5)
  93. MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5)
  94. MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5)
  95. MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5)
  96. MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5)
  97. MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5)
  98. MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5)
  99. MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5)
  100. subcc %g1, 1, %g1
  101. add %o0, 0x100, %o0
  102. bne 1b
  103. add %o1, 0x100, %o1
  104. .globl tsunami_setup_blockops
  105. tsunami_setup_blockops:
  106. sethi %hi(__copy_1page), %o0
  107. or %o0, %lo(__copy_1page), %o0
  108. sethi %hi(tsunami_copy_1page), %o1
  109. or %o1, %lo(tsunami_copy_1page), %o1
  110. sethi %hi(tsunami_setup_blockops), %o2
  111. or %o2, %lo(tsunami_setup_blockops), %o2
  112. ld [%o1], %o4
  113. 1: add %o1, 4, %o1
  114. st %o4, [%o0]
  115. add %o0, 4, %o0
  116. cmp %o1, %o2
  117. bne 1b
  118. ld [%o1], %o4
  119. sta %g0, [%g0] ASI_M_IC_FLCLEAR
  120. sta %g0, [%g0] ASI_M_DC_FLCLEAR
  121. retl
  122. nop