time_64.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* time.c: UltraSparc timer and TOD clock support.
  3. *
  4. * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
  5. * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
  6. *
  7. * Based largely on code which is:
  8. *
  9. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/export.h>
  13. #include <linux/sched.h>
  14. #include <linux/kernel.h>
  15. #include <linux/param.h>
  16. #include <linux/string.h>
  17. #include <linux/mm.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/time.h>
  20. #include <linux/timex.h>
  21. #include <linux/init.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mc146818rtc.h>
  24. #include <linux/delay.h>
  25. #include <linux/profile.h>
  26. #include <linux/bcd.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/cpufreq.h>
  29. #include <linux/percpu.h>
  30. #include <linux/rtc/m48t59.h>
  31. #include <linux/kernel_stat.h>
  32. #include <linux/clockchips.h>
  33. #include <linux/clocksource.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/ftrace.h>
  36. #include <asm/oplib.h>
  37. #include <asm/timer.h>
  38. #include <asm/irq.h>
  39. #include <asm/io.h>
  40. #include <asm/prom.h>
  41. #include <asm/starfire.h>
  42. #include <asm/smp.h>
  43. #include <asm/sections.h>
  44. #include <asm/cpudata.h>
  45. #include <linux/uaccess.h>
  46. #include <asm/irq_regs.h>
  47. #include <asm/cacheflush.h>
  48. #include "entry.h"
  49. #include "kernel.h"
  50. DEFINE_SPINLOCK(rtc_lock);
  51. #ifdef CONFIG_SMP
  52. unsigned long profile_pc(struct pt_regs *regs)
  53. {
  54. unsigned long pc = instruction_pointer(regs);
  55. if (in_lock_functions(pc))
  56. return regs->u_regs[UREG_RETPC];
  57. return pc;
  58. }
  59. EXPORT_SYMBOL(profile_pc);
  60. #endif
  61. static void tick_disable_protection(void)
  62. {
  63. /* Set things up so user can access tick register for profiling
  64. * purposes. Also workaround BB_ERRATA_1 by doing a dummy
  65. * read back of %tick after writing it.
  66. */
  67. __asm__ __volatile__(
  68. " ba,pt %%xcc, 1f\n"
  69. " nop\n"
  70. " .align 64\n"
  71. "1: rd %%tick, %%g2\n"
  72. " add %%g2, 6, %%g2\n"
  73. " andn %%g2, %0, %%g2\n"
  74. " wrpr %%g2, 0, %%tick\n"
  75. " rdpr %%tick, %%g0"
  76. : /* no outputs */
  77. : "r" (TICK_PRIV_BIT)
  78. : "g2");
  79. }
  80. static void tick_disable_irq(void)
  81. {
  82. __asm__ __volatile__(
  83. " ba,pt %%xcc, 1f\n"
  84. " nop\n"
  85. " .align 64\n"
  86. "1: wr %0, 0x0, %%tick_cmpr\n"
  87. " rd %%tick_cmpr, %%g0"
  88. : /* no outputs */
  89. : "r" (TICKCMP_IRQ_BIT));
  90. }
  91. static void tick_init_tick(void)
  92. {
  93. tick_disable_protection();
  94. tick_disable_irq();
  95. }
  96. static unsigned long long tick_get_tick(void)
  97. {
  98. unsigned long ret;
  99. __asm__ __volatile__("rd %%tick, %0\n\t"
  100. "mov %0, %0"
  101. : "=r" (ret));
  102. return ret & ~TICK_PRIV_BIT;
  103. }
  104. static int tick_add_compare(unsigned long adj)
  105. {
  106. unsigned long orig_tick, new_tick, new_compare;
  107. __asm__ __volatile__("rd %%tick, %0"
  108. : "=r" (orig_tick));
  109. orig_tick &= ~TICKCMP_IRQ_BIT;
  110. /* Workaround for Spitfire Errata (#54 I think??), I discovered
  111. * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
  112. * number 103640.
  113. *
  114. * On Blackbird writes to %tick_cmpr can fail, the
  115. * workaround seems to be to execute the wr instruction
  116. * at the start of an I-cache line, and perform a dummy
  117. * read back from %tick_cmpr right after writing to it. -DaveM
  118. */
  119. __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
  120. " add %1, %2, %0\n\t"
  121. ".align 64\n"
  122. "1:\n\t"
  123. "wr %0, 0, %%tick_cmpr\n\t"
  124. "rd %%tick_cmpr, %%g0\n\t"
  125. : "=r" (new_compare)
  126. : "r" (orig_tick), "r" (adj));
  127. __asm__ __volatile__("rd %%tick, %0"
  128. : "=r" (new_tick));
  129. new_tick &= ~TICKCMP_IRQ_BIT;
  130. return ((long)(new_tick - (orig_tick+adj))) > 0L;
  131. }
  132. static unsigned long tick_add_tick(unsigned long adj)
  133. {
  134. unsigned long new_tick;
  135. /* Also need to handle Blackbird bug here too. */
  136. __asm__ __volatile__("rd %%tick, %0\n\t"
  137. "add %0, %1, %0\n\t"
  138. "wrpr %0, 0, %%tick\n\t"
  139. : "=&r" (new_tick)
  140. : "r" (adj));
  141. return new_tick;
  142. }
  143. /* Searches for cpu clock frequency with given cpuid in OpenBoot tree */
  144. static unsigned long cpuid_to_freq(phandle node, int cpuid)
  145. {
  146. bool is_cpu_node = false;
  147. unsigned long freq = 0;
  148. char type[128];
  149. if (!node)
  150. return freq;
  151. if (prom_getproperty(node, "device_type", type, sizeof(type)) != -1)
  152. is_cpu_node = (strcmp(type, "cpu") == 0);
  153. /* try upa-portid then cpuid to get cpuid, see prom_64.c */
  154. if (is_cpu_node && (prom_getint(node, "upa-portid") == cpuid ||
  155. prom_getint(node, "cpuid") == cpuid))
  156. freq = prom_getintdefault(node, "clock-frequency", 0);
  157. if (!freq)
  158. freq = cpuid_to_freq(prom_getchild(node), cpuid);
  159. if (!freq)
  160. freq = cpuid_to_freq(prom_getsibling(node), cpuid);
  161. return freq;
  162. }
  163. static unsigned long tick_get_frequency(void)
  164. {
  165. return cpuid_to_freq(prom_root_node, hard_smp_processor_id());
  166. }
  167. static struct sparc64_tick_ops tick_operations __cacheline_aligned = {
  168. .name = "tick",
  169. .init_tick = tick_init_tick,
  170. .disable_irq = tick_disable_irq,
  171. .get_tick = tick_get_tick,
  172. .add_tick = tick_add_tick,
  173. .add_compare = tick_add_compare,
  174. .get_frequency = tick_get_frequency,
  175. .softint_mask = 1UL << 0,
  176. };
  177. struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
  178. EXPORT_SYMBOL(tick_ops);
  179. static void stick_disable_irq(void)
  180. {
  181. __asm__ __volatile__(
  182. "wr %0, 0x0, %%asr25"
  183. : /* no outputs */
  184. : "r" (TICKCMP_IRQ_BIT));
  185. }
  186. static void stick_init_tick(void)
  187. {
  188. /* Writes to the %tick and %stick register are not
  189. * allowed on sun4v. The Hypervisor controls that
  190. * bit, per-strand.
  191. */
  192. if (tlb_type != hypervisor) {
  193. tick_disable_protection();
  194. tick_disable_irq();
  195. /* Let the user get at STICK too. */
  196. __asm__ __volatile__(
  197. " rd %%asr24, %%g2\n"
  198. " andn %%g2, %0, %%g2\n"
  199. " wr %%g2, 0, %%asr24"
  200. : /* no outputs */
  201. : "r" (TICK_PRIV_BIT)
  202. : "g1", "g2");
  203. }
  204. stick_disable_irq();
  205. }
  206. static unsigned long long stick_get_tick(void)
  207. {
  208. unsigned long ret;
  209. __asm__ __volatile__("rd %%asr24, %0"
  210. : "=r" (ret));
  211. return ret & ~TICK_PRIV_BIT;
  212. }
  213. static unsigned long stick_add_tick(unsigned long adj)
  214. {
  215. unsigned long new_tick;
  216. __asm__ __volatile__("rd %%asr24, %0\n\t"
  217. "add %0, %1, %0\n\t"
  218. "wr %0, 0, %%asr24\n\t"
  219. : "=&r" (new_tick)
  220. : "r" (adj));
  221. return new_tick;
  222. }
  223. static int stick_add_compare(unsigned long adj)
  224. {
  225. unsigned long orig_tick, new_tick;
  226. __asm__ __volatile__("rd %%asr24, %0"
  227. : "=r" (orig_tick));
  228. orig_tick &= ~TICKCMP_IRQ_BIT;
  229. __asm__ __volatile__("wr %0, 0, %%asr25"
  230. : /* no outputs */
  231. : "r" (orig_tick + adj));
  232. __asm__ __volatile__("rd %%asr24, %0"
  233. : "=r" (new_tick));
  234. new_tick &= ~TICKCMP_IRQ_BIT;
  235. return ((long)(new_tick - (orig_tick+adj))) > 0L;
  236. }
  237. static unsigned long stick_get_frequency(void)
  238. {
  239. return prom_getintdefault(prom_root_node, "stick-frequency", 0);
  240. }
  241. static struct sparc64_tick_ops stick_operations __read_mostly = {
  242. .name = "stick",
  243. .init_tick = stick_init_tick,
  244. .disable_irq = stick_disable_irq,
  245. .get_tick = stick_get_tick,
  246. .add_tick = stick_add_tick,
  247. .add_compare = stick_add_compare,
  248. .get_frequency = stick_get_frequency,
  249. .softint_mask = 1UL << 16,
  250. };
  251. /* On Hummingbird the STICK/STICK_CMPR register is implemented
  252. * in I/O space. There are two 64-bit registers each, the
  253. * first holds the low 32-bits of the value and the second holds
  254. * the high 32-bits.
  255. *
  256. * Since STICK is constantly updating, we have to access it carefully.
  257. *
  258. * The sequence we use to read is:
  259. * 1) read high
  260. * 2) read low
  261. * 3) read high again, if it rolled re-read both low and high again.
  262. *
  263. * Writing STICK safely is also tricky:
  264. * 1) write low to zero
  265. * 2) write high
  266. * 3) write low
  267. */
  268. static unsigned long __hbird_read_stick(void)
  269. {
  270. unsigned long ret, tmp1, tmp2, tmp3;
  271. unsigned long addr = HBIRD_STICK_ADDR+8;
  272. __asm__ __volatile__("ldxa [%1] %5, %2\n"
  273. "1:\n\t"
  274. "sub %1, 0x8, %1\n\t"
  275. "ldxa [%1] %5, %3\n\t"
  276. "add %1, 0x8, %1\n\t"
  277. "ldxa [%1] %5, %4\n\t"
  278. "cmp %4, %2\n\t"
  279. "bne,a,pn %%xcc, 1b\n\t"
  280. " mov %4, %2\n\t"
  281. "sllx %4, 32, %4\n\t"
  282. "or %3, %4, %0\n\t"
  283. : "=&r" (ret), "=&r" (addr),
  284. "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
  285. : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
  286. return ret;
  287. }
  288. static void __hbird_write_stick(unsigned long val)
  289. {
  290. unsigned long low = (val & 0xffffffffUL);
  291. unsigned long high = (val >> 32UL);
  292. unsigned long addr = HBIRD_STICK_ADDR;
  293. __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
  294. "add %0, 0x8, %0\n\t"
  295. "stxa %3, [%0] %4\n\t"
  296. "sub %0, 0x8, %0\n\t"
  297. "stxa %2, [%0] %4"
  298. : "=&r" (addr)
  299. : "0" (addr), "r" (low), "r" (high),
  300. "i" (ASI_PHYS_BYPASS_EC_E));
  301. }
  302. static void __hbird_write_compare(unsigned long val)
  303. {
  304. unsigned long low = (val & 0xffffffffUL);
  305. unsigned long high = (val >> 32UL);
  306. unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
  307. __asm__ __volatile__("stxa %3, [%0] %4\n\t"
  308. "sub %0, 0x8, %0\n\t"
  309. "stxa %2, [%0] %4"
  310. : "=&r" (addr)
  311. : "0" (addr), "r" (low), "r" (high),
  312. "i" (ASI_PHYS_BYPASS_EC_E));
  313. }
  314. static void hbtick_disable_irq(void)
  315. {
  316. __hbird_write_compare(TICKCMP_IRQ_BIT);
  317. }
  318. static void hbtick_init_tick(void)
  319. {
  320. tick_disable_protection();
  321. /* XXX This seems to be necessary to 'jumpstart' Hummingbird
  322. * XXX into actually sending STICK interrupts. I think because
  323. * XXX of how we store %tick_cmpr in head.S this somehow resets the
  324. * XXX {TICK + STICK} interrupt mux. -DaveM
  325. */
  326. __hbird_write_stick(__hbird_read_stick());
  327. hbtick_disable_irq();
  328. }
  329. static unsigned long long hbtick_get_tick(void)
  330. {
  331. return __hbird_read_stick() & ~TICK_PRIV_BIT;
  332. }
  333. static unsigned long hbtick_add_tick(unsigned long adj)
  334. {
  335. unsigned long val;
  336. val = __hbird_read_stick() + adj;
  337. __hbird_write_stick(val);
  338. return val;
  339. }
  340. static int hbtick_add_compare(unsigned long adj)
  341. {
  342. unsigned long val = __hbird_read_stick();
  343. unsigned long val2;
  344. val &= ~TICKCMP_IRQ_BIT;
  345. val += adj;
  346. __hbird_write_compare(val);
  347. val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
  348. return ((long)(val2 - val)) > 0L;
  349. }
  350. static unsigned long hbtick_get_frequency(void)
  351. {
  352. return prom_getintdefault(prom_root_node, "stick-frequency", 0);
  353. }
  354. static struct sparc64_tick_ops hbtick_operations __read_mostly = {
  355. .name = "hbtick",
  356. .init_tick = hbtick_init_tick,
  357. .disable_irq = hbtick_disable_irq,
  358. .get_tick = hbtick_get_tick,
  359. .add_tick = hbtick_add_tick,
  360. .add_compare = hbtick_add_compare,
  361. .get_frequency = hbtick_get_frequency,
  362. .softint_mask = 1UL << 0,
  363. };
  364. unsigned long cmos_regs;
  365. EXPORT_SYMBOL(cmos_regs);
  366. static struct resource rtc_cmos_resource;
  367. static struct platform_device rtc_cmos_device = {
  368. .name = "rtc_cmos",
  369. .id = -1,
  370. .resource = &rtc_cmos_resource,
  371. .num_resources = 1,
  372. };
  373. static int rtc_probe(struct platform_device *op)
  374. {
  375. struct resource *r;
  376. printk(KERN_INFO "%pOF: RTC regs at 0x%llx\n",
  377. op->dev.of_node, op->resource[0].start);
  378. /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
  379. * up a fake resource so that the probe works for all cases.
  380. * When the RTC is behind an ISA bus it will have IORESOURCE_IO
  381. * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
  382. */
  383. r = &rtc_cmos_resource;
  384. r->flags = IORESOURCE_IO;
  385. r->name = op->resource[0].name;
  386. r->start = op->resource[0].start;
  387. r->end = op->resource[0].end;
  388. cmos_regs = op->resource[0].start;
  389. return platform_device_register(&rtc_cmos_device);
  390. }
  391. static const struct of_device_id rtc_match[] = {
  392. {
  393. .name = "rtc",
  394. .compatible = "m5819",
  395. },
  396. {
  397. .name = "rtc",
  398. .compatible = "isa-m5819p",
  399. },
  400. {
  401. .name = "rtc",
  402. .compatible = "isa-m5823p",
  403. },
  404. {
  405. .name = "rtc",
  406. .compatible = "ds1287",
  407. },
  408. {},
  409. };
  410. static struct platform_driver rtc_driver = {
  411. .probe = rtc_probe,
  412. .driver = {
  413. .name = "rtc",
  414. .of_match_table = rtc_match,
  415. },
  416. };
  417. static struct platform_device rtc_bq4802_device = {
  418. .name = "rtc-bq4802",
  419. .id = -1,
  420. .num_resources = 1,
  421. };
  422. static int bq4802_probe(struct platform_device *op)
  423. {
  424. printk(KERN_INFO "%pOF: BQ4802 regs at 0x%llx\n",
  425. op->dev.of_node, op->resource[0].start);
  426. rtc_bq4802_device.resource = &op->resource[0];
  427. return platform_device_register(&rtc_bq4802_device);
  428. }
  429. static const struct of_device_id bq4802_match[] = {
  430. {
  431. .name = "rtc",
  432. .compatible = "bq4802",
  433. },
  434. {},
  435. };
  436. static struct platform_driver bq4802_driver = {
  437. .probe = bq4802_probe,
  438. .driver = {
  439. .name = "bq4802",
  440. .of_match_table = bq4802_match,
  441. },
  442. };
  443. static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
  444. {
  445. struct platform_device *pdev = to_platform_device(dev);
  446. void __iomem *regs = (void __iomem *) pdev->resource[0].start;
  447. return readb(regs + ofs);
  448. }
  449. static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
  450. {
  451. struct platform_device *pdev = to_platform_device(dev);
  452. void __iomem *regs = (void __iomem *) pdev->resource[0].start;
  453. writeb(val, regs + ofs);
  454. }
  455. static struct m48t59_plat_data m48t59_data = {
  456. .read_byte = mostek_read_byte,
  457. .write_byte = mostek_write_byte,
  458. };
  459. static struct platform_device m48t59_rtc = {
  460. .name = "rtc-m48t59",
  461. .id = 0,
  462. .num_resources = 1,
  463. .dev = {
  464. .platform_data = &m48t59_data,
  465. },
  466. };
  467. static int mostek_probe(struct platform_device *op)
  468. {
  469. struct device_node *dp = op->dev.of_node;
  470. /* On an Enterprise system there can be multiple mostek clocks.
  471. * We should only match the one that is on the central FHC bus.
  472. */
  473. if (of_node_name_eq(dp->parent, "fhc") &&
  474. !of_node_name_eq(dp->parent->parent, "central"))
  475. return -ENODEV;
  476. printk(KERN_INFO "%pOF: Mostek regs at 0x%llx\n",
  477. dp, op->resource[0].start);
  478. m48t59_rtc.resource = &op->resource[0];
  479. return platform_device_register(&m48t59_rtc);
  480. }
  481. static const struct of_device_id mostek_match[] = {
  482. {
  483. .name = "eeprom",
  484. },
  485. {},
  486. };
  487. static struct platform_driver mostek_driver = {
  488. .probe = mostek_probe,
  489. .driver = {
  490. .name = "mostek",
  491. .of_match_table = mostek_match,
  492. },
  493. };
  494. static struct platform_device rtc_sun4v_device = {
  495. .name = "rtc-sun4v",
  496. .id = -1,
  497. };
  498. static struct platform_device rtc_starfire_device = {
  499. .name = "rtc-starfire",
  500. .id = -1,
  501. };
  502. static int __init clock_init(void)
  503. {
  504. if (this_is_starfire)
  505. return platform_device_register(&rtc_starfire_device);
  506. if (tlb_type == hypervisor)
  507. return platform_device_register(&rtc_sun4v_device);
  508. (void) platform_driver_register(&rtc_driver);
  509. (void) platform_driver_register(&mostek_driver);
  510. (void) platform_driver_register(&bq4802_driver);
  511. return 0;
  512. }
  513. /* Must be after subsys_initcall() so that busses are probed. Must
  514. * be before device_initcall() because things like the RTC driver
  515. * need to see the clock registers.
  516. */
  517. fs_initcall(clock_init);
  518. /* Return true if this is Hummingbird, aka Ultra-IIe */
  519. static bool is_hummingbird(void)
  520. {
  521. unsigned long ver, manuf, impl;
  522. __asm__ __volatile__ ("rdpr %%ver, %0"
  523. : "=&r" (ver));
  524. manuf = ((ver >> 48) & 0xffff);
  525. impl = ((ver >> 32) & 0xffff);
  526. return (manuf == 0x17 && impl == 0x13);
  527. }
  528. struct freq_table {
  529. unsigned long clock_tick_ref;
  530. unsigned int ref_freq;
  531. };
  532. static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
  533. unsigned long sparc64_get_clock_tick(unsigned int cpu)
  534. {
  535. struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
  536. if (ft->clock_tick_ref)
  537. return ft->clock_tick_ref;
  538. return cpu_data(cpu).clock_tick;
  539. }
  540. EXPORT_SYMBOL(sparc64_get_clock_tick);
  541. #ifdef CONFIG_CPU_FREQ
  542. static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
  543. void *data)
  544. {
  545. struct cpufreq_freqs *freq = data;
  546. unsigned int cpu;
  547. struct freq_table *ft;
  548. for_each_cpu(cpu, freq->policy->cpus) {
  549. ft = &per_cpu(sparc64_freq_table, cpu);
  550. if (!ft->ref_freq) {
  551. ft->ref_freq = freq->old;
  552. ft->clock_tick_ref = cpu_data(cpu).clock_tick;
  553. }
  554. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  555. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  556. cpu_data(cpu).clock_tick =
  557. cpufreq_scale(ft->clock_tick_ref, ft->ref_freq,
  558. freq->new);
  559. }
  560. }
  561. return 0;
  562. }
  563. static struct notifier_block sparc64_cpufreq_notifier_block = {
  564. .notifier_call = sparc64_cpufreq_notifier
  565. };
  566. static int __init register_sparc64_cpufreq_notifier(void)
  567. {
  568. cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
  569. CPUFREQ_TRANSITION_NOTIFIER);
  570. return 0;
  571. }
  572. core_initcall(register_sparc64_cpufreq_notifier);
  573. #endif /* CONFIG_CPU_FREQ */
  574. static int sparc64_next_event(unsigned long delta,
  575. struct clock_event_device *evt)
  576. {
  577. return tick_operations.add_compare(delta) ? -ETIME : 0;
  578. }
  579. static int sparc64_timer_shutdown(struct clock_event_device *evt)
  580. {
  581. tick_operations.disable_irq();
  582. return 0;
  583. }
  584. static struct clock_event_device sparc64_clockevent = {
  585. .features = CLOCK_EVT_FEAT_ONESHOT,
  586. .set_state_shutdown = sparc64_timer_shutdown,
  587. .set_next_event = sparc64_next_event,
  588. .rating = 100,
  589. .shift = 30,
  590. .irq = -1,
  591. };
  592. static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
  593. void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
  594. {
  595. struct pt_regs *old_regs = set_irq_regs(regs);
  596. unsigned long tick_mask = tick_operations.softint_mask;
  597. int cpu = smp_processor_id();
  598. struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
  599. clear_softint(tick_mask);
  600. irq_enter();
  601. local_cpu_data().irq0_irqs++;
  602. kstat_incr_irq_this_cpu(0);
  603. if (unlikely(!evt->event_handler)) {
  604. printk(KERN_WARNING
  605. "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
  606. } else
  607. evt->event_handler(evt);
  608. irq_exit();
  609. set_irq_regs(old_regs);
  610. }
  611. void setup_sparc64_timer(void)
  612. {
  613. struct clock_event_device *sevt;
  614. unsigned long pstate;
  615. /* Guarantee that the following sequences execute
  616. * uninterrupted.
  617. */
  618. __asm__ __volatile__("rdpr %%pstate, %0\n\t"
  619. "wrpr %0, %1, %%pstate"
  620. : "=r" (pstate)
  621. : "i" (PSTATE_IE));
  622. tick_operations.init_tick();
  623. /* Restore PSTATE_IE. */
  624. __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
  625. : /* no outputs */
  626. : "r" (pstate));
  627. sevt = this_cpu_ptr(&sparc64_events);
  628. memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
  629. sevt->cpumask = cpumask_of(smp_processor_id());
  630. clockevents_register_device(sevt);
  631. }
  632. #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
  633. static struct clocksource clocksource_tick = {
  634. .rating = 100,
  635. .mask = CLOCKSOURCE_MASK(64),
  636. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  637. };
  638. static unsigned long tb_ticks_per_usec __read_mostly;
  639. void __delay(unsigned long loops)
  640. {
  641. unsigned long bclock = get_tick();
  642. while ((get_tick() - bclock) < loops)
  643. ;
  644. }
  645. EXPORT_SYMBOL(__delay);
  646. void udelay(unsigned long usecs)
  647. {
  648. __delay(tb_ticks_per_usec * usecs);
  649. }
  650. EXPORT_SYMBOL(udelay);
  651. static u64 clocksource_tick_read(struct clocksource *cs)
  652. {
  653. return get_tick();
  654. }
  655. static void __init get_tick_patch(void)
  656. {
  657. unsigned int *addr, *instr, i;
  658. struct get_tick_patch *p;
  659. if (tlb_type == spitfire && is_hummingbird())
  660. return;
  661. for (p = &__get_tick_patch; p < &__get_tick_patch_end; p++) {
  662. instr = (tlb_type == spitfire) ? p->tick : p->stick;
  663. addr = (unsigned int *)(unsigned long)p->addr;
  664. for (i = 0; i < GET_TICK_NINSTR; i++) {
  665. addr[i] = instr[i];
  666. /* ensure that address is modified before flush */
  667. wmb();
  668. flushi(&addr[i]);
  669. }
  670. }
  671. }
  672. static void __init init_tick_ops(struct sparc64_tick_ops *ops)
  673. {
  674. unsigned long freq, quotient, tick;
  675. freq = ops->get_frequency();
  676. quotient = clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
  677. tick = ops->get_tick();
  678. ops->offset = (tick * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT;
  679. ops->ticks_per_nsec_quotient = quotient;
  680. ops->frequency = freq;
  681. tick_operations = *ops;
  682. get_tick_patch();
  683. }
  684. void __init time_init_early(void)
  685. {
  686. if (tlb_type == spitfire) {
  687. if (is_hummingbird()) {
  688. init_tick_ops(&hbtick_operations);
  689. clocksource_tick.archdata.vclock_mode = VCLOCK_NONE;
  690. } else {
  691. init_tick_ops(&tick_operations);
  692. clocksource_tick.archdata.vclock_mode = VCLOCK_TICK;
  693. }
  694. } else {
  695. init_tick_ops(&stick_operations);
  696. clocksource_tick.archdata.vclock_mode = VCLOCK_STICK;
  697. }
  698. }
  699. void __init time_init(void)
  700. {
  701. unsigned long freq;
  702. freq = tick_operations.frequency;
  703. tb_ticks_per_usec = freq / USEC_PER_SEC;
  704. clocksource_tick.name = tick_operations.name;
  705. clocksource_tick.read = clocksource_tick_read;
  706. clocksource_register_hz(&clocksource_tick, freq);
  707. printk("clocksource: mult[%x] shift[%d]\n",
  708. clocksource_tick.mult, clocksource_tick.shift);
  709. sparc64_clockevent.name = tick_operations.name;
  710. clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
  711. sparc64_clockevent.max_delta_ns =
  712. clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
  713. sparc64_clockevent.max_delta_ticks = 0x7fffffffffffffffUL;
  714. sparc64_clockevent.min_delta_ns =
  715. clockevent_delta2ns(0xF, &sparc64_clockevent);
  716. sparc64_clockevent.min_delta_ticks = 0xF;
  717. printk("clockevent: mult[%x] shift[%d]\n",
  718. sparc64_clockevent.mult, sparc64_clockevent.shift);
  719. setup_sparc64_timer();
  720. }
  721. unsigned long long sched_clock(void)
  722. {
  723. unsigned long quotient = tick_operations.ticks_per_nsec_quotient;
  724. unsigned long offset = tick_operations.offset;
  725. /* Use barrier so the compiler emits the loads first and overlaps load
  726. * latency with reading tick, because reading %tick/%stick is a
  727. * post-sync instruction that will flush and restart subsequent
  728. * instructions after it commits.
  729. */
  730. barrier();
  731. return ((get_tick() * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT) - offset;
  732. }
  733. int read_current_timer(unsigned long *timer_val)
  734. {
  735. *timer_val = get_tick();
  736. return 0;
  737. }