sysfs.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* sysfs.c: Topology sysfs support code for sparc64.
  3. *
  4. * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/device.h>
  8. #include <linux/cpu.h>
  9. #include <linux/smp.h>
  10. #include <linux/percpu.h>
  11. #include <linux/init.h>
  12. #include <asm/cpudata.h>
  13. #include <asm/hypervisor.h>
  14. #include <asm/spitfire.h>
  15. static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));
  16. #define SHOW_MMUSTAT_ULONG(NAME) \
  17. static ssize_t show_##NAME(struct device *dev, \
  18. struct device_attribute *attr, char *buf) \
  19. { \
  20. struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
  21. return sprintf(buf, "%lu\n", p->NAME); \
  22. } \
  23. static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)
  24. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
  25. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
  26. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_64k_tte);
  27. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_64k_tte);
  28. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_4mb_tte);
  29. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_4mb_tte);
  30. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_256mb_tte);
  31. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_256mb_tte);
  32. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_8k_tte);
  33. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_8k_tte);
  34. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_64k_tte);
  35. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_64k_tte);
  36. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_4mb_tte);
  37. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_4mb_tte);
  38. SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_256mb_tte);
  39. SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_256mb_tte);
  40. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_8k_tte);
  41. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_8k_tte);
  42. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_64k_tte);
  43. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_64k_tte);
  44. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_4mb_tte);
  45. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_4mb_tte);
  46. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_256mb_tte);
  47. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_256mb_tte);
  48. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_8k_tte);
  49. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_8k_tte);
  50. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_64k_tte);
  51. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_64k_tte);
  52. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_4mb_tte);
  53. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_4mb_tte);
  54. SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
  55. SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);
  56. static struct attribute *mmu_stat_attrs[] = {
  57. &dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
  58. &dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
  59. &dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
  60. &dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
  61. &dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
  62. &dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
  63. &dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
  64. &dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
  65. &dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
  66. &dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
  67. &dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
  68. &dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
  69. &dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
  70. &dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
  71. &dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
  72. &dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
  73. &dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
  74. &dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
  75. &dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
  76. &dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
  77. &dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
  78. &dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
  79. &dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
  80. &dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
  81. &dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
  82. &dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
  83. &dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
  84. &dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
  85. &dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
  86. &dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
  87. &dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
  88. &dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
  89. NULL,
  90. };
  91. static struct attribute_group mmu_stat_group = {
  92. .attrs = mmu_stat_attrs,
  93. .name = "mmu_stats",
  94. };
  95. static long read_mmustat_enable(void *data __maybe_unused)
  96. {
  97. unsigned long ra = 0;
  98. sun4v_mmustat_info(&ra);
  99. return ra != 0;
  100. }
  101. static long write_mmustat_enable(void *data)
  102. {
  103. unsigned long ra, orig_ra, *val = data;
  104. if (*val)
  105. ra = __pa(&per_cpu(mmu_stats, smp_processor_id()));
  106. else
  107. ra = 0UL;
  108. return sun4v_mmustat_conf(ra, &orig_ra);
  109. }
  110. static ssize_t show_mmustat_enable(struct device *s,
  111. struct device_attribute *attr, char *buf)
  112. {
  113. long val = work_on_cpu(s->id, read_mmustat_enable, NULL);
  114. return sprintf(buf, "%lx\n", val);
  115. }
  116. static ssize_t store_mmustat_enable(struct device *s,
  117. struct device_attribute *attr, const char *buf,
  118. size_t count)
  119. {
  120. unsigned long val;
  121. long err;
  122. int ret;
  123. ret = sscanf(buf, "%lu", &val);
  124. if (ret != 1)
  125. return -EINVAL;
  126. err = work_on_cpu(s->id, write_mmustat_enable, &val);
  127. if (err)
  128. return -EIO;
  129. return count;
  130. }
  131. static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
  132. static int mmu_stats_supported;
  133. static int register_mmu_stats(struct device *s)
  134. {
  135. if (!mmu_stats_supported)
  136. return 0;
  137. device_create_file(s, &dev_attr_mmustat_enable);
  138. return sysfs_create_group(&s->kobj, &mmu_stat_group);
  139. }
  140. #ifdef CONFIG_HOTPLUG_CPU
  141. static void unregister_mmu_stats(struct device *s)
  142. {
  143. if (!mmu_stats_supported)
  144. return;
  145. sysfs_remove_group(&s->kobj, &mmu_stat_group);
  146. device_remove_file(s, &dev_attr_mmustat_enable);
  147. }
  148. #endif
  149. #define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
  150. static ssize_t show_##NAME(struct device *dev, \
  151. struct device_attribute *attr, char *buf) \
  152. { \
  153. cpuinfo_sparc *c = &cpu_data(dev->id); \
  154. return sprintf(buf, "%lu\n", c->MEMBER); \
  155. }
  156. #define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
  157. static ssize_t show_##NAME(struct device *dev, \
  158. struct device_attribute *attr, char *buf) \
  159. { \
  160. cpuinfo_sparc *c = &cpu_data(dev->id); \
  161. return sprintf(buf, "%u\n", c->MEMBER); \
  162. }
  163. SHOW_CPUDATA_ULONG_NAME(clock_tick, clock_tick);
  164. SHOW_CPUDATA_UINT_NAME(l1_dcache_size, dcache_size);
  165. SHOW_CPUDATA_UINT_NAME(l1_dcache_line_size, dcache_line_size);
  166. SHOW_CPUDATA_UINT_NAME(l1_icache_size, icache_size);
  167. SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
  168. SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
  169. SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);
  170. static struct device_attribute cpu_core_attrs[] = {
  171. __ATTR(clock_tick, 0444, show_clock_tick, NULL),
  172. __ATTR(l1_dcache_size, 0444, show_l1_dcache_size, NULL),
  173. __ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
  174. __ATTR(l1_icache_size, 0444, show_l1_icache_size, NULL),
  175. __ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
  176. __ATTR(l2_cache_size, 0444, show_l2_cache_size, NULL),
  177. __ATTR(l2_cache_line_size, 0444, show_l2_cache_line_size, NULL),
  178. };
  179. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  180. static int register_cpu_online(unsigned int cpu)
  181. {
  182. struct cpu *c = &per_cpu(cpu_devices, cpu);
  183. struct device *s = &c->dev;
  184. int i;
  185. for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
  186. device_create_file(s, &cpu_core_attrs[i]);
  187. register_mmu_stats(s);
  188. return 0;
  189. }
  190. static int unregister_cpu_online(unsigned int cpu)
  191. {
  192. #ifdef CONFIG_HOTPLUG_CPU
  193. struct cpu *c = &per_cpu(cpu_devices, cpu);
  194. struct device *s = &c->dev;
  195. int i;
  196. unregister_mmu_stats(s);
  197. for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
  198. device_remove_file(s, &cpu_core_attrs[i]);
  199. #endif
  200. return 0;
  201. }
  202. static void __init check_mmu_stats(void)
  203. {
  204. unsigned long dummy1, err;
  205. if (tlb_type != hypervisor)
  206. return;
  207. err = sun4v_mmustat_info(&dummy1);
  208. if (!err)
  209. mmu_stats_supported = 1;
  210. }
  211. static void register_nodes(void)
  212. {
  213. #ifdef CONFIG_NUMA
  214. int i;
  215. for (i = 0; i < MAX_NUMNODES; i++)
  216. register_one_node(i);
  217. #endif
  218. }
  219. static int __init topology_init(void)
  220. {
  221. int cpu, ret;
  222. register_nodes();
  223. check_mmu_stats();
  224. for_each_possible_cpu(cpu) {
  225. struct cpu *c = &per_cpu(cpu_devices, cpu);
  226. register_cpu(c, cpu);
  227. }
  228. ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "sparc/topology:online",
  229. register_cpu_online, unregister_cpu_online);
  230. WARN_ON(ret < 0);
  231. return 0;
  232. }
  233. subsys_initcall(topology_init);