entry.S 28 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
  3. *
  4. * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
  5. * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
  6. * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
  7. * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  8. * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
  9. */
  10. #include <linux/linkage.h>
  11. #include <linux/errno.h>
  12. #include <linux/pgtable.h>
  13. #include <asm/head.h>
  14. #include <asm/asi.h>
  15. #include <asm/smp.h>
  16. #include <asm/contregs.h>
  17. #include <asm/ptrace.h>
  18. #include <asm/asm-offsets.h>
  19. #include <asm/psr.h>
  20. #include <asm/vaddrs.h>
  21. #include <asm/page.h>
  22. #include <asm/winmacro.h>
  23. #include <asm/signal.h>
  24. #include <asm/obio.h>
  25. #include <asm/mxcc.h>
  26. #include <asm/thread_info.h>
  27. #include <asm/param.h>
  28. #include <asm/unistd.h>
  29. #include <asm/asmmacro.h>
  30. #include <asm/export.h>
  31. #define curptr g6
  32. /* These are just handy. */
  33. #define _SV save %sp, -STACKFRAME_SZ, %sp
  34. #define _RS restore
  35. #define FLUSH_ALL_KERNEL_WINDOWS \
  36. _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
  37. _RS; _RS; _RS; _RS; _RS; _RS; _RS;
  38. .text
  39. #ifdef CONFIG_KGDB
  40. .align 4
  41. .globl arch_kgdb_breakpoint
  42. .type arch_kgdb_breakpoint,#function
  43. arch_kgdb_breakpoint:
  44. ta 0x7d
  45. retl
  46. nop
  47. .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
  48. #endif
  49. #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
  50. .align 4
  51. .globl floppy_hardint
  52. floppy_hardint:
  53. /*
  54. * This code cannot touch registers %l0 %l1 and %l2
  55. * because SAVE_ALL depends on their values. It depends
  56. * on %l3 also, but we regenerate it before a call.
  57. * Other registers are:
  58. * %l3 -- base address of fdc registers
  59. * %l4 -- pdma_vaddr
  60. * %l5 -- scratch for ld/st address
  61. * %l6 -- pdma_size
  62. * %l7 -- scratch [floppy byte, ld/st address, aux. data]
  63. */
  64. /* Do we have work to do? */
  65. sethi %hi(doing_pdma), %l7
  66. ld [%l7 + %lo(doing_pdma)], %l7
  67. cmp %l7, 0
  68. be floppy_dosoftint
  69. nop
  70. /* Load fdc register base */
  71. sethi %hi(fdc_status), %l3
  72. ld [%l3 + %lo(fdc_status)], %l3
  73. /* Setup register addresses */
  74. sethi %hi(pdma_vaddr), %l5 ! transfer buffer
  75. ld [%l5 + %lo(pdma_vaddr)], %l4
  76. sethi %hi(pdma_size), %l5 ! bytes to go
  77. ld [%l5 + %lo(pdma_size)], %l6
  78. next_byte:
  79. ldub [%l3], %l7
  80. andcc %l7, 0x80, %g0 ! Does fifo still have data
  81. bz floppy_fifo_emptied ! fifo has been emptied...
  82. andcc %l7, 0x20, %g0 ! in non-dma mode still?
  83. bz floppy_overrun ! nope, overrun
  84. andcc %l7, 0x40, %g0 ! 0=write 1=read
  85. bz floppy_write
  86. sub %l6, 0x1, %l6
  87. /* Ok, actually read this byte */
  88. ldub [%l3 + 1], %l7
  89. orcc %g0, %l6, %g0
  90. stb %l7, [%l4]
  91. bne next_byte
  92. add %l4, 0x1, %l4
  93. b floppy_tdone
  94. nop
  95. floppy_write:
  96. /* Ok, actually write this byte */
  97. ldub [%l4], %l7
  98. orcc %g0, %l6, %g0
  99. stb %l7, [%l3 + 1]
  100. bne next_byte
  101. add %l4, 0x1, %l4
  102. /* fall through... */
  103. floppy_tdone:
  104. sethi %hi(pdma_vaddr), %l5
  105. st %l4, [%l5 + %lo(pdma_vaddr)]
  106. sethi %hi(pdma_size), %l5
  107. st %l6, [%l5 + %lo(pdma_size)]
  108. /* Flip terminal count pin */
  109. set auxio_register, %l7
  110. ld [%l7], %l7
  111. ldub [%l7], %l5
  112. or %l5, 0xc2, %l5
  113. stb %l5, [%l7]
  114. andn %l5, 0x02, %l5
  115. 2:
  116. /* Kill some time so the bits set */
  117. WRITE_PAUSE
  118. WRITE_PAUSE
  119. stb %l5, [%l7]
  120. /* Prevent recursion */
  121. sethi %hi(doing_pdma), %l7
  122. b floppy_dosoftint
  123. st %g0, [%l7 + %lo(doing_pdma)]
  124. /* We emptied the FIFO, but we haven't read everything
  125. * as of yet. Store the current transfer address and
  126. * bytes left to read so we can continue when the next
  127. * fast IRQ comes in.
  128. */
  129. floppy_fifo_emptied:
  130. sethi %hi(pdma_vaddr), %l5
  131. st %l4, [%l5 + %lo(pdma_vaddr)]
  132. sethi %hi(pdma_size), %l7
  133. st %l6, [%l7 + %lo(pdma_size)]
  134. /* Restore condition codes */
  135. wr %l0, 0x0, %psr
  136. WRITE_PAUSE
  137. jmp %l1
  138. rett %l2
  139. floppy_overrun:
  140. sethi %hi(pdma_vaddr), %l5
  141. st %l4, [%l5 + %lo(pdma_vaddr)]
  142. sethi %hi(pdma_size), %l5
  143. st %l6, [%l5 + %lo(pdma_size)]
  144. /* Prevent recursion */
  145. sethi %hi(doing_pdma), %l7
  146. st %g0, [%l7 + %lo(doing_pdma)]
  147. /* fall through... */
  148. floppy_dosoftint:
  149. rd %wim, %l3
  150. SAVE_ALL
  151. /* Set all IRQs off. */
  152. or %l0, PSR_PIL, %l4
  153. wr %l4, 0x0, %psr
  154. WRITE_PAUSE
  155. wr %l4, PSR_ET, %psr
  156. WRITE_PAUSE
  157. mov 11, %o0 ! floppy irq level (unused anyway)
  158. mov %g0, %o1 ! devid is not used in fast interrupts
  159. call sparc_floppy_irq
  160. add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
  161. RESTORE_ALL
  162. #endif /* (CONFIG_BLK_DEV_FD) */
  163. /* Bad trap handler */
  164. .globl bad_trap_handler
  165. bad_trap_handler:
  166. SAVE_ALL
  167. wr %l0, PSR_ET, %psr
  168. WRITE_PAUSE
  169. add %sp, STACKFRAME_SZ, %o0 ! pt_regs
  170. call do_hw_interrupt
  171. mov %l7, %o1 ! trap number
  172. RESTORE_ALL
  173. /* For now all IRQ's not registered get sent here. handler_irq() will
  174. * see if a routine is registered to handle this interrupt and if not
  175. * it will say so on the console.
  176. */
  177. .align 4
  178. .globl real_irq_entry, patch_handler_irq
  179. real_irq_entry:
  180. SAVE_ALL
  181. #ifdef CONFIG_SMP
  182. .globl patchme_maybe_smp_msg
  183. cmp %l7, 11
  184. patchme_maybe_smp_msg:
  185. bgu maybe_smp4m_msg
  186. nop
  187. #endif
  188. real_irq_continue:
  189. or %l0, PSR_PIL, %g2
  190. wr %g2, 0x0, %psr
  191. WRITE_PAUSE
  192. wr %g2, PSR_ET, %psr
  193. WRITE_PAUSE
  194. mov %l7, %o0 ! irq level
  195. patch_handler_irq:
  196. call handler_irq
  197. add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
  198. or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
  199. wr %g2, PSR_ET, %psr ! keep ET up
  200. WRITE_PAUSE
  201. RESTORE_ALL
  202. #ifdef CONFIG_SMP
  203. /* SMP per-cpu ticker interrupts are handled specially. */
  204. smp4m_ticker:
  205. bne real_irq_continue+4
  206. or %l0, PSR_PIL, %g2
  207. wr %g2, 0x0, %psr
  208. WRITE_PAUSE
  209. wr %g2, PSR_ET, %psr
  210. WRITE_PAUSE
  211. call smp4m_percpu_timer_interrupt
  212. add %sp, STACKFRAME_SZ, %o0
  213. wr %l0, PSR_ET, %psr
  214. WRITE_PAUSE
  215. RESTORE_ALL
  216. #define GET_PROCESSOR4M_ID(reg) \
  217. rd %tbr, %reg; \
  218. srl %reg, 12, %reg; \
  219. and %reg, 3, %reg;
  220. /* Here is where we check for possible SMP IPI passed to us
  221. * on some level other than 15 which is the NMI and only used
  222. * for cross calls. That has a separate entry point below.
  223. *
  224. * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
  225. */
  226. maybe_smp4m_msg:
  227. GET_PROCESSOR4M_ID(o3)
  228. sethi %hi(sun4m_irq_percpu), %l5
  229. sll %o3, 2, %o3
  230. or %l5, %lo(sun4m_irq_percpu), %o5
  231. sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
  232. ld [%o5 + %o3], %o1
  233. ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
  234. andcc %o3, %o2, %g0
  235. be,a smp4m_ticker
  236. cmp %l7, 14
  237. /* Soft-IRQ IPI */
  238. st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
  239. WRITE_PAUSE
  240. ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
  241. WRITE_PAUSE
  242. or %l0, PSR_PIL, %l4
  243. wr %l4, 0x0, %psr
  244. WRITE_PAUSE
  245. wr %l4, PSR_ET, %psr
  246. WRITE_PAUSE
  247. srl %o3, 28, %o2 ! shift for simpler checks below
  248. maybe_smp4m_msg_check_single:
  249. andcc %o2, 0x1, %g0
  250. beq,a maybe_smp4m_msg_check_mask
  251. andcc %o2, 0x2, %g0
  252. call smp_call_function_single_interrupt
  253. nop
  254. andcc %o2, 0x2, %g0
  255. maybe_smp4m_msg_check_mask:
  256. beq,a maybe_smp4m_msg_check_resched
  257. andcc %o2, 0x4, %g0
  258. call smp_call_function_interrupt
  259. nop
  260. andcc %o2, 0x4, %g0
  261. maybe_smp4m_msg_check_resched:
  262. /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
  263. beq,a maybe_smp4m_msg_out
  264. nop
  265. call smp_resched_interrupt
  266. nop
  267. maybe_smp4m_msg_out:
  268. RESTORE_ALL
  269. .align 4
  270. .globl linux_trap_ipi15_sun4m
  271. linux_trap_ipi15_sun4m:
  272. SAVE_ALL
  273. sethi %hi(0x80000000), %o2
  274. GET_PROCESSOR4M_ID(o0)
  275. sethi %hi(sun4m_irq_percpu), %l5
  276. or %l5, %lo(sun4m_irq_percpu), %o5
  277. sll %o0, 2, %o0
  278. ld [%o5 + %o0], %o5
  279. ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
  280. andcc %o3, %o2, %g0
  281. be sun4m_nmi_error ! Must be an NMI async memory error
  282. st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
  283. WRITE_PAUSE
  284. ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
  285. WRITE_PAUSE
  286. or %l0, PSR_PIL, %l4
  287. wr %l4, 0x0, %psr
  288. WRITE_PAUSE
  289. wr %l4, PSR_ET, %psr
  290. WRITE_PAUSE
  291. call smp4m_cross_call_irq
  292. nop
  293. b ret_trap_lockless_ipi
  294. clr %l6
  295. .globl smp4d_ticker
  296. /* SMP per-cpu ticker interrupts are handled specially. */
  297. smp4d_ticker:
  298. SAVE_ALL
  299. or %l0, PSR_PIL, %g2
  300. sethi %hi(CC_ICLR), %o0
  301. sethi %hi(1 << 14), %o1
  302. or %o0, %lo(CC_ICLR), %o0
  303. stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
  304. wr %g2, 0x0, %psr
  305. WRITE_PAUSE
  306. wr %g2, PSR_ET, %psr
  307. WRITE_PAUSE
  308. call smp4d_percpu_timer_interrupt
  309. add %sp, STACKFRAME_SZ, %o0
  310. wr %l0, PSR_ET, %psr
  311. WRITE_PAUSE
  312. RESTORE_ALL
  313. .align 4
  314. .globl linux_trap_ipi15_sun4d
  315. linux_trap_ipi15_sun4d:
  316. SAVE_ALL
  317. sethi %hi(CC_BASE), %o4
  318. sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
  319. or %o4, (CC_EREG - CC_BASE), %o0
  320. ldda [%o0] ASI_M_MXCC, %o0
  321. andcc %o0, %o2, %g0
  322. bne 1f
  323. sethi %hi(BB_STAT2), %o2
  324. lduba [%o2] ASI_M_CTL, %o2
  325. andcc %o2, BB_STAT2_MASK, %g0
  326. bne 2f
  327. or %o4, (CC_ICLR - CC_BASE), %o0
  328. sethi %hi(1 << 15), %o1
  329. stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
  330. or %l0, PSR_PIL, %l4
  331. wr %l4, 0x0, %psr
  332. WRITE_PAUSE
  333. wr %l4, PSR_ET, %psr
  334. WRITE_PAUSE
  335. call smp4d_cross_call_irq
  336. nop
  337. b ret_trap_lockless_ipi
  338. clr %l6
  339. 1: /* MXCC error */
  340. 2: /* BB error */
  341. /* Disable PIL 15 */
  342. set CC_IMSK, %l4
  343. lduha [%l4] ASI_M_MXCC, %l5
  344. sethi %hi(1 << 15), %l7
  345. or %l5, %l7, %l5
  346. stha %l5, [%l4] ASI_M_MXCC
  347. /* FIXME */
  348. 1: b,a 1b
  349. .globl smpleon_ipi
  350. .extern leon_ipi_interrupt
  351. /* SMP per-cpu IPI interrupts are handled specially. */
  352. smpleon_ipi:
  353. SAVE_ALL
  354. or %l0, PSR_PIL, %g2
  355. wr %g2, 0x0, %psr
  356. WRITE_PAUSE
  357. wr %g2, PSR_ET, %psr
  358. WRITE_PAUSE
  359. call leonsmp_ipi_interrupt
  360. add %sp, STACKFRAME_SZ, %o1 ! pt_regs
  361. wr %l0, PSR_ET, %psr
  362. WRITE_PAUSE
  363. RESTORE_ALL
  364. .align 4
  365. .globl linux_trap_ipi15_leon
  366. linux_trap_ipi15_leon:
  367. SAVE_ALL
  368. or %l0, PSR_PIL, %l4
  369. wr %l4, 0x0, %psr
  370. WRITE_PAUSE
  371. wr %l4, PSR_ET, %psr
  372. WRITE_PAUSE
  373. call leon_cross_call_irq
  374. nop
  375. b ret_trap_lockless_ipi
  376. clr %l6
  377. #endif /* CONFIG_SMP */
  378. /* This routine handles illegal instructions and privileged
  379. * instruction attempts from user code.
  380. */
  381. .align 4
  382. .globl bad_instruction
  383. bad_instruction:
  384. sethi %hi(0xc1f80000), %l4
  385. ld [%l1], %l5
  386. sethi %hi(0x81d80000), %l7
  387. and %l5, %l4, %l5
  388. cmp %l5, %l7
  389. be 1f
  390. SAVE_ALL
  391. wr %l0, PSR_ET, %psr ! re-enable traps
  392. WRITE_PAUSE
  393. add %sp, STACKFRAME_SZ, %o0
  394. mov %l1, %o1
  395. mov %l2, %o2
  396. call do_illegal_instruction
  397. mov %l0, %o3
  398. RESTORE_ALL
  399. 1: /* unimplemented flush - just skip */
  400. jmpl %l2, %g0
  401. rett %l2 + 4
  402. .align 4
  403. .globl priv_instruction
  404. priv_instruction:
  405. SAVE_ALL
  406. wr %l0, PSR_ET, %psr
  407. WRITE_PAUSE
  408. add %sp, STACKFRAME_SZ, %o0
  409. mov %l1, %o1
  410. mov %l2, %o2
  411. call do_priv_instruction
  412. mov %l0, %o3
  413. RESTORE_ALL
  414. /* This routine handles unaligned data accesses. */
  415. .align 4
  416. .globl mna_handler
  417. mna_handler:
  418. andcc %l0, PSR_PS, %g0
  419. be mna_fromuser
  420. nop
  421. SAVE_ALL
  422. wr %l0, PSR_ET, %psr
  423. WRITE_PAUSE
  424. ld [%l1], %o1
  425. call kernel_unaligned_trap
  426. add %sp, STACKFRAME_SZ, %o0
  427. RESTORE_ALL
  428. mna_fromuser:
  429. SAVE_ALL
  430. wr %l0, PSR_ET, %psr ! re-enable traps
  431. WRITE_PAUSE
  432. ld [%l1], %o1
  433. call user_unaligned_trap
  434. add %sp, STACKFRAME_SZ, %o0
  435. RESTORE_ALL
  436. /* This routine handles floating point disabled traps. */
  437. .align 4
  438. .globl fpd_trap_handler
  439. fpd_trap_handler:
  440. SAVE_ALL
  441. wr %l0, PSR_ET, %psr ! re-enable traps
  442. WRITE_PAUSE
  443. add %sp, STACKFRAME_SZ, %o0
  444. mov %l1, %o1
  445. mov %l2, %o2
  446. call do_fpd_trap
  447. mov %l0, %o3
  448. RESTORE_ALL
  449. /* This routine handles Floating Point Exceptions. */
  450. .align 4
  451. .globl fpe_trap_handler
  452. fpe_trap_handler:
  453. set fpsave_magic, %l5
  454. cmp %l1, %l5
  455. be 1f
  456. sethi %hi(fpsave), %l5
  457. or %l5, %lo(fpsave), %l5
  458. cmp %l1, %l5
  459. bne 2f
  460. sethi %hi(fpsave_catch2), %l5
  461. or %l5, %lo(fpsave_catch2), %l5
  462. wr %l0, 0x0, %psr
  463. WRITE_PAUSE
  464. jmp %l5
  465. rett %l5 + 4
  466. 1:
  467. sethi %hi(fpsave_catch), %l5
  468. or %l5, %lo(fpsave_catch), %l5
  469. wr %l0, 0x0, %psr
  470. WRITE_PAUSE
  471. jmp %l5
  472. rett %l5 + 4
  473. 2:
  474. SAVE_ALL
  475. wr %l0, PSR_ET, %psr ! re-enable traps
  476. WRITE_PAUSE
  477. add %sp, STACKFRAME_SZ, %o0
  478. mov %l1, %o1
  479. mov %l2, %o2
  480. call do_fpe_trap
  481. mov %l0, %o3
  482. RESTORE_ALL
  483. /* This routine handles Tag Overflow Exceptions. */
  484. .align 4
  485. .globl do_tag_overflow
  486. do_tag_overflow:
  487. SAVE_ALL
  488. wr %l0, PSR_ET, %psr ! re-enable traps
  489. WRITE_PAUSE
  490. add %sp, STACKFRAME_SZ, %o0
  491. mov %l1, %o1
  492. mov %l2, %o2
  493. call handle_tag_overflow
  494. mov %l0, %o3
  495. RESTORE_ALL
  496. /* This routine handles Watchpoint Exceptions. */
  497. .align 4
  498. .globl do_watchpoint
  499. do_watchpoint:
  500. SAVE_ALL
  501. wr %l0, PSR_ET, %psr ! re-enable traps
  502. WRITE_PAUSE
  503. add %sp, STACKFRAME_SZ, %o0
  504. mov %l1, %o1
  505. mov %l2, %o2
  506. call handle_watchpoint
  507. mov %l0, %o3
  508. RESTORE_ALL
  509. /* This routine handles Register Access Exceptions. */
  510. .align 4
  511. .globl do_reg_access
  512. do_reg_access:
  513. SAVE_ALL
  514. wr %l0, PSR_ET, %psr ! re-enable traps
  515. WRITE_PAUSE
  516. add %sp, STACKFRAME_SZ, %o0
  517. mov %l1, %o1
  518. mov %l2, %o2
  519. call handle_reg_access
  520. mov %l0, %o3
  521. RESTORE_ALL
  522. /* This routine handles Co-Processor Disabled Exceptions. */
  523. .align 4
  524. .globl do_cp_disabled
  525. do_cp_disabled:
  526. SAVE_ALL
  527. wr %l0, PSR_ET, %psr ! re-enable traps
  528. WRITE_PAUSE
  529. add %sp, STACKFRAME_SZ, %o0
  530. mov %l1, %o1
  531. mov %l2, %o2
  532. call handle_cp_disabled
  533. mov %l0, %o3
  534. RESTORE_ALL
  535. /* This routine handles Co-Processor Exceptions. */
  536. .align 4
  537. .globl do_cp_exception
  538. do_cp_exception:
  539. SAVE_ALL
  540. wr %l0, PSR_ET, %psr ! re-enable traps
  541. WRITE_PAUSE
  542. add %sp, STACKFRAME_SZ, %o0
  543. mov %l1, %o1
  544. mov %l2, %o2
  545. call handle_cp_exception
  546. mov %l0, %o3
  547. RESTORE_ALL
  548. /* This routine handles Hardware Divide By Zero Exceptions. */
  549. .align 4
  550. .globl do_hw_divzero
  551. do_hw_divzero:
  552. SAVE_ALL
  553. wr %l0, PSR_ET, %psr ! re-enable traps
  554. WRITE_PAUSE
  555. add %sp, STACKFRAME_SZ, %o0
  556. mov %l1, %o1
  557. mov %l2, %o2
  558. call handle_hw_divzero
  559. mov %l0, %o3
  560. RESTORE_ALL
  561. .align 4
  562. .globl do_flush_windows
  563. do_flush_windows:
  564. SAVE_ALL
  565. wr %l0, PSR_ET, %psr
  566. WRITE_PAUSE
  567. andcc %l0, PSR_PS, %g0
  568. bne dfw_kernel
  569. nop
  570. call flush_user_windows
  571. nop
  572. /* Advance over the trap instruction. */
  573. ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
  574. add %l1, 0x4, %l2
  575. st %l1, [%sp + STACKFRAME_SZ + PT_PC]
  576. st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
  577. RESTORE_ALL
  578. .globl flush_patch_one
  579. /* We get these for debugging routines using __builtin_return_address() */
  580. dfw_kernel:
  581. flush_patch_one:
  582. FLUSH_ALL_KERNEL_WINDOWS
  583. /* Advance over the trap instruction. */
  584. ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
  585. add %l1, 0x4, %l2
  586. st %l1, [%sp + STACKFRAME_SZ + PT_PC]
  587. st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
  588. RESTORE_ALL
  589. /* The getcc software trap. The user wants the condition codes from
  590. * the %psr in register %g1.
  591. */
  592. .align 4
  593. .globl getcc_trap_handler
  594. getcc_trap_handler:
  595. srl %l0, 20, %g1 ! give user
  596. and %g1, 0xf, %g1 ! only ICC bits in %psr
  597. jmp %l2 ! advance over trap instruction
  598. rett %l2 + 0x4 ! like this...
  599. /* The setcc software trap. The user has condition codes in %g1
  600. * that it would like placed in the %psr. Be careful not to flip
  601. * any unintentional bits!
  602. */
  603. .align 4
  604. .globl setcc_trap_handler
  605. setcc_trap_handler:
  606. sll %g1, 0x14, %l4
  607. set PSR_ICC, %l5
  608. andn %l0, %l5, %l0 ! clear ICC bits in %psr
  609. and %l4, %l5, %l4 ! clear non-ICC bits in user value
  610. or %l4, %l0, %l4 ! or them in... mix mix mix
  611. wr %l4, 0x0, %psr ! set new %psr
  612. WRITE_PAUSE ! TI scumbags...
  613. jmp %l2 ! advance over trap instruction
  614. rett %l2 + 0x4 ! like this...
  615. sun4m_nmi_error:
  616. /* NMI async memory error handling. */
  617. sethi %hi(0x80000000), %l4
  618. sethi %hi(sun4m_irq_global), %o5
  619. ld [%o5 + %lo(sun4m_irq_global)], %l5
  620. st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
  621. WRITE_PAUSE
  622. ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
  623. WRITE_PAUSE
  624. or %l0, PSR_PIL, %l4
  625. wr %l4, 0x0, %psr
  626. WRITE_PAUSE
  627. wr %l4, PSR_ET, %psr
  628. WRITE_PAUSE
  629. call sun4m_nmi
  630. nop
  631. st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
  632. WRITE_PAUSE
  633. ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
  634. WRITE_PAUSE
  635. RESTORE_ALL
  636. #ifndef CONFIG_SMP
  637. .align 4
  638. .globl linux_trap_ipi15_sun4m
  639. linux_trap_ipi15_sun4m:
  640. SAVE_ALL
  641. ba sun4m_nmi_error
  642. nop
  643. #endif /* CONFIG_SMP */
  644. .align 4
  645. .globl srmmu_fault
  646. srmmu_fault:
  647. mov 0x400, %l5
  648. mov 0x300, %l4
  649. LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
  650. SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
  651. LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
  652. SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
  653. andn %l6, 0xfff, %l6
  654. srl %l5, 6, %l5 ! and encode all info into l7
  655. and %l5, 2, %l5
  656. or %l5, %l6, %l6
  657. or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
  658. SAVE_ALL
  659. mov %l7, %o1
  660. mov %l7, %o2
  661. and %o1, 1, %o1 ! arg2 = text_faultp
  662. mov %l7, %o3
  663. and %o2, 2, %o2 ! arg3 = writep
  664. andn %o3, 0xfff, %o3 ! arg4 = faulting address
  665. wr %l0, PSR_ET, %psr
  666. WRITE_PAUSE
  667. call do_sparc_fault
  668. add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
  669. RESTORE_ALL
  670. .align 4
  671. sunos_execv:
  672. .globl sunos_execv
  673. b sys_execve
  674. clr %i2
  675. .align 4
  676. .globl sys_sigstack
  677. sys_sigstack:
  678. mov %o7, %l5
  679. mov %fp, %o2
  680. call do_sys_sigstack
  681. mov %l5, %o7
  682. .align 4
  683. .globl sys_sigreturn
  684. sys_sigreturn:
  685. call do_sigreturn
  686. add %sp, STACKFRAME_SZ, %o0
  687. ld [%curptr + TI_FLAGS], %l5
  688. andcc %l5, _TIF_SYSCALL_TRACE, %g0
  689. be 1f
  690. nop
  691. call syscall_trace
  692. mov 1, %o1
  693. 1:
  694. /* We don't want to muck with user registers like a
  695. * normal syscall, just return.
  696. */
  697. RESTORE_ALL
  698. .align 4
  699. .globl sys_rt_sigreturn
  700. sys_rt_sigreturn:
  701. call do_rt_sigreturn
  702. add %sp, STACKFRAME_SZ, %o0
  703. ld [%curptr + TI_FLAGS], %l5
  704. andcc %l5, _TIF_SYSCALL_TRACE, %g0
  705. be 1f
  706. nop
  707. add %sp, STACKFRAME_SZ, %o0
  708. call syscall_trace
  709. mov 1, %o1
  710. 1:
  711. /* We are returning to a signal handler. */
  712. RESTORE_ALL
  713. /* Now that we have a real sys_clone, sys_fork() is
  714. * implemented in terms of it. Our _real_ implementation
  715. * of SunOS vfork() will use sys_vfork().
  716. *
  717. * XXX These three should be consolidated into mostly shared
  718. * XXX code just like on sparc64... -DaveM
  719. */
  720. .align 4
  721. .globl sys_fork, flush_patch_two
  722. sys_fork:
  723. mov %o7, %l5
  724. flush_patch_two:
  725. FLUSH_ALL_KERNEL_WINDOWS;
  726. ld [%curptr + TI_TASK], %o4
  727. rd %psr, %g4
  728. WRITE_PAUSE
  729. rd %wim, %g5
  730. WRITE_PAUSE
  731. std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
  732. add %sp, STACKFRAME_SZ, %o0
  733. call sparc_fork
  734. mov %l5, %o7
  735. /* Whee, kernel threads! */
  736. .globl sys_clone, flush_patch_three
  737. sys_clone:
  738. mov %o7, %l5
  739. flush_patch_three:
  740. FLUSH_ALL_KERNEL_WINDOWS;
  741. ld [%curptr + TI_TASK], %o4
  742. rd %psr, %g4
  743. WRITE_PAUSE
  744. rd %wim, %g5
  745. WRITE_PAUSE
  746. std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
  747. add %sp, STACKFRAME_SZ, %o0
  748. call sparc_clone
  749. mov %l5, %o7
  750. /* Whee, real vfork! */
  751. .globl sys_vfork, flush_patch_four
  752. sys_vfork:
  753. flush_patch_four:
  754. FLUSH_ALL_KERNEL_WINDOWS;
  755. ld [%curptr + TI_TASK], %o4
  756. rd %psr, %g4
  757. WRITE_PAUSE
  758. rd %wim, %g5
  759. WRITE_PAUSE
  760. std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
  761. sethi %hi(sparc_vfork), %l1
  762. jmpl %l1 + %lo(sparc_vfork), %g0
  763. add %sp, STACKFRAME_SZ, %o0
  764. .align 4
  765. linux_sparc_ni_syscall:
  766. sethi %hi(sys_ni_syscall), %l7
  767. b do_syscall
  768. or %l7, %lo(sys_ni_syscall), %l7
  769. linux_syscall_trace:
  770. add %sp, STACKFRAME_SZ, %o0
  771. call syscall_trace
  772. mov 0, %o1
  773. cmp %o0, 0
  774. bne 3f
  775. mov -ENOSYS, %o0
  776. /* Syscall tracing can modify the registers. */
  777. ld [%sp + STACKFRAME_SZ + PT_G1], %g1
  778. sethi %hi(sys_call_table), %l7
  779. ld [%sp + STACKFRAME_SZ + PT_I0], %i0
  780. or %l7, %lo(sys_call_table), %l7
  781. ld [%sp + STACKFRAME_SZ + PT_I1], %i1
  782. ld [%sp + STACKFRAME_SZ + PT_I2], %i2
  783. ld [%sp + STACKFRAME_SZ + PT_I3], %i3
  784. ld [%sp + STACKFRAME_SZ + PT_I4], %i4
  785. ld [%sp + STACKFRAME_SZ + PT_I5], %i5
  786. cmp %g1, NR_syscalls
  787. bgeu 3f
  788. mov -ENOSYS, %o0
  789. sll %g1, 2, %l4
  790. mov %i0, %o0
  791. ld [%l7 + %l4], %l7
  792. mov %i1, %o1
  793. mov %i2, %o2
  794. mov %i3, %o3
  795. b 2f
  796. mov %i4, %o4
  797. .globl ret_from_fork
  798. ret_from_fork:
  799. call schedule_tail
  800. ld [%g3 + TI_TASK], %o0
  801. b ret_sys_call
  802. ld [%sp + STACKFRAME_SZ + PT_I0], %o0
  803. .globl ret_from_kernel_thread
  804. ret_from_kernel_thread:
  805. call schedule_tail
  806. ld [%g3 + TI_TASK], %o0
  807. ld [%sp + STACKFRAME_SZ + PT_G1], %l0
  808. call %l0
  809. ld [%sp + STACKFRAME_SZ + PT_G2], %o0
  810. rd %psr, %l1
  811. ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
  812. andn %l0, PSR_CWP, %l0
  813. nop
  814. and %l1, PSR_CWP, %l1
  815. or %l0, %l1, %l0
  816. st %l0, [%sp + STACKFRAME_SZ + PT_PSR]
  817. b ret_sys_call
  818. mov 0, %o0
  819. /* Linux native system calls enter here... */
  820. .align 4
  821. .globl linux_sparc_syscall
  822. linux_sparc_syscall:
  823. sethi %hi(PSR_SYSCALL), %l4
  824. or %l0, %l4, %l0
  825. /* Direct access to user regs, must faster. */
  826. cmp %g1, NR_syscalls
  827. bgeu linux_sparc_ni_syscall
  828. sll %g1, 2, %l4
  829. ld [%l7 + %l4], %l7
  830. do_syscall:
  831. SAVE_ALL_HEAD
  832. rd %wim, %l3
  833. wr %l0, PSR_ET, %psr
  834. mov %i0, %o0
  835. mov %i1, %o1
  836. mov %i2, %o2
  837. ld [%curptr + TI_FLAGS], %l5
  838. mov %i3, %o3
  839. andcc %l5, _TIF_SYSCALL_TRACE, %g0
  840. mov %i4, %o4
  841. bne linux_syscall_trace
  842. mov %i0, %l5
  843. 2:
  844. call %l7
  845. mov %i5, %o5
  846. 3:
  847. st %o0, [%sp + STACKFRAME_SZ + PT_I0]
  848. ret_sys_call:
  849. ld [%curptr + TI_FLAGS], %l6
  850. cmp %o0, -ERESTART_RESTARTBLOCK
  851. ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
  852. set PSR_C, %g2
  853. bgeu 1f
  854. andcc %l6, _TIF_SYSCALL_TRACE, %g0
  855. /* System call success, clear Carry condition code. */
  856. andn %g3, %g2, %g3
  857. clr %l6
  858. st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
  859. bne linux_syscall_trace2
  860. ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
  861. add %l1, 0x4, %l2 /* npc = npc+4 */
  862. st %l1, [%sp + STACKFRAME_SZ + PT_PC]
  863. b ret_trap_entry
  864. st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
  865. 1:
  866. /* System call failure, set Carry condition code.
  867. * Also, get abs(errno) to return to the process.
  868. */
  869. sub %g0, %o0, %o0
  870. or %g3, %g2, %g3
  871. st %o0, [%sp + STACKFRAME_SZ + PT_I0]
  872. mov 1, %l6
  873. st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
  874. bne linux_syscall_trace2
  875. ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
  876. add %l1, 0x4, %l2 /* npc = npc+4 */
  877. st %l1, [%sp + STACKFRAME_SZ + PT_PC]
  878. b ret_trap_entry
  879. st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
  880. linux_syscall_trace2:
  881. add %sp, STACKFRAME_SZ, %o0
  882. mov 1, %o1
  883. call syscall_trace
  884. add %l1, 0x4, %l2 /* npc = npc+4 */
  885. st %l1, [%sp + STACKFRAME_SZ + PT_PC]
  886. b ret_trap_entry
  887. st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
  888. /* Saving and restoring the FPU state is best done from lowlevel code.
  889. *
  890. * void fpsave(unsigned long *fpregs, unsigned long *fsr,
  891. * void *fpqueue, unsigned long *fpqdepth)
  892. */
  893. .globl fpsave
  894. fpsave:
  895. st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
  896. ld [%o1], %g1
  897. set 0x2000, %g4
  898. andcc %g1, %g4, %g0
  899. be 2f
  900. mov 0, %g2
  901. /* We have an fpqueue to save. */
  902. 1:
  903. std %fq, [%o2]
  904. fpsave_magic:
  905. st %fsr, [%o1]
  906. ld [%o1], %g3
  907. andcc %g3, %g4, %g0
  908. add %g2, 1, %g2
  909. bne 1b
  910. add %o2, 8, %o2
  911. 2:
  912. st %g2, [%o3]
  913. std %f0, [%o0 + 0x00]
  914. std %f2, [%o0 + 0x08]
  915. std %f4, [%o0 + 0x10]
  916. std %f6, [%o0 + 0x18]
  917. std %f8, [%o0 + 0x20]
  918. std %f10, [%o0 + 0x28]
  919. std %f12, [%o0 + 0x30]
  920. std %f14, [%o0 + 0x38]
  921. std %f16, [%o0 + 0x40]
  922. std %f18, [%o0 + 0x48]
  923. std %f20, [%o0 + 0x50]
  924. std %f22, [%o0 + 0x58]
  925. std %f24, [%o0 + 0x60]
  926. std %f26, [%o0 + 0x68]
  927. std %f28, [%o0 + 0x70]
  928. retl
  929. std %f30, [%o0 + 0x78]
  930. /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
  931. * code for pointing out this possible deadlock, while we save state
  932. * above we could trap on the fsr store so our low level fpu trap
  933. * code has to know how to deal with this.
  934. */
  935. fpsave_catch:
  936. b fpsave_magic + 4
  937. st %fsr, [%o1]
  938. fpsave_catch2:
  939. b fpsave + 4
  940. st %fsr, [%o1]
  941. /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
  942. .globl fpload
  943. fpload:
  944. ldd [%o0 + 0x00], %f0
  945. ldd [%o0 + 0x08], %f2
  946. ldd [%o0 + 0x10], %f4
  947. ldd [%o0 + 0x18], %f6
  948. ldd [%o0 + 0x20], %f8
  949. ldd [%o0 + 0x28], %f10
  950. ldd [%o0 + 0x30], %f12
  951. ldd [%o0 + 0x38], %f14
  952. ldd [%o0 + 0x40], %f16
  953. ldd [%o0 + 0x48], %f18
  954. ldd [%o0 + 0x50], %f20
  955. ldd [%o0 + 0x58], %f22
  956. ldd [%o0 + 0x60], %f24
  957. ldd [%o0 + 0x68], %f26
  958. ldd [%o0 + 0x70], %f28
  959. ldd [%o0 + 0x78], %f30
  960. ld [%o1], %fsr
  961. retl
  962. nop
  963. /* __ndelay and __udelay take two arguments:
  964. * 0 - nsecs or usecs to delay
  965. * 1 - per_cpu udelay_val (loops per jiffy)
  966. *
  967. * Note that ndelay gives HZ times higher resolution but has a 10ms
  968. * limit. udelay can handle up to 1s.
  969. */
  970. .globl __ndelay
  971. __ndelay:
  972. save %sp, -STACKFRAME_SZ, %sp
  973. mov %i0, %o0 ! round multiplier up so large ns ok
  974. mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
  975. umul %o0, %o1, %o0
  976. rd %y, %o1
  977. mov %i1, %o1 ! udelay_val
  978. umul %o0, %o1, %o0
  979. rd %y, %o1
  980. ba delay_continue
  981. mov %o1, %o0 ! >>32 later for better resolution
  982. .globl __udelay
  983. __udelay:
  984. save %sp, -STACKFRAME_SZ, %sp
  985. mov %i0, %o0
  986. sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
  987. or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
  988. umul %o0, %o1, %o0
  989. rd %y, %o1
  990. mov %i1, %o1 ! udelay_val
  991. umul %o0, %o1, %o0
  992. rd %y, %o1
  993. sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
  994. or %g0, %lo(0x028f4b62), %l0
  995. addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
  996. bcs,a 3f
  997. add %o1, 0x01, %o1
  998. 3:
  999. mov HZ, %o0 ! >>32 earlier for wider range
  1000. umul %o0, %o1, %o0
  1001. rd %y, %o1
  1002. delay_continue:
  1003. cmp %o0, 0x0
  1004. 1:
  1005. bne 1b
  1006. subcc %o0, 1, %o0
  1007. ret
  1008. restore
  1009. EXPORT_SYMBOL(__udelay)
  1010. EXPORT_SYMBOL(__ndelay)
  1011. /* Handle a software breakpoint */
  1012. /* We have to inform parent that child has stopped */
  1013. .align 4
  1014. .globl breakpoint_trap
  1015. breakpoint_trap:
  1016. rd %wim,%l3
  1017. SAVE_ALL
  1018. wr %l0, PSR_ET, %psr
  1019. WRITE_PAUSE
  1020. st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
  1021. call sparc_breakpoint
  1022. add %sp, STACKFRAME_SZ, %o0
  1023. RESTORE_ALL
  1024. #ifdef CONFIG_KGDB
  1025. ENTRY(kgdb_trap_low)
  1026. rd %wim,%l3
  1027. SAVE_ALL
  1028. wr %l0, PSR_ET, %psr
  1029. WRITE_PAUSE
  1030. mov %l7, %o0 ! trap_level
  1031. call kgdb_trap
  1032. add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
  1033. RESTORE_ALL
  1034. ENDPROC(kgdb_trap_low)
  1035. #endif
  1036. .align 4
  1037. .globl flush_patch_exception
  1038. flush_patch_exception:
  1039. FLUSH_ALL_KERNEL_WINDOWS;
  1040. ldd [%o0], %o6
  1041. jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
  1042. mov 1, %g1 ! signal EFAULT condition
  1043. .align 4
  1044. .globl kill_user_windows, kuw_patch1_7win
  1045. .globl kuw_patch1
  1046. kuw_patch1_7win: sll %o3, 6, %o3
  1047. /* No matter how much overhead this routine has in the worst
  1048. * case scenario, it is several times better than taking the
  1049. * traps with the old method of just doing flush_user_windows().
  1050. */
  1051. kill_user_windows:
  1052. ld [%g6 + TI_UWINMASK], %o0 ! get current umask
  1053. orcc %g0, %o0, %g0 ! if no bits set, we are done
  1054. be 3f ! nothing to do
  1055. rd %psr, %o5 ! must clear interrupts
  1056. or %o5, PSR_PIL, %o4 ! or else that could change
  1057. wr %o4, 0x0, %psr ! the uwinmask state
  1058. WRITE_PAUSE ! burn them cycles
  1059. 1:
  1060. ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
  1061. orcc %g0, %o0, %g0 ! did an interrupt come in?
  1062. be 4f ! yep, we are done
  1063. rd %wim, %o3 ! get current wim
  1064. srl %o3, 1, %o4 ! simulate a save
  1065. kuw_patch1:
  1066. sll %o3, 7, %o3 ! compute next wim
  1067. or %o4, %o3, %o3 ! result
  1068. andncc %o0, %o3, %o0 ! clean this bit in umask
  1069. bne kuw_patch1 ! not done yet
  1070. srl %o3, 1, %o4 ! begin another save simulation
  1071. wr %o3, 0x0, %wim ! set the new wim
  1072. st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
  1073. 4:
  1074. wr %o5, 0x0, %psr ! re-enable interrupts
  1075. WRITE_PAUSE ! burn baby burn
  1076. 3:
  1077. retl ! return
  1078. st %g0, [%g6 + TI_W_SAVED] ! no windows saved
  1079. .align 4
  1080. .globl restore_current
  1081. restore_current:
  1082. LOAD_CURRENT(g6, o0)
  1083. retl
  1084. nop
  1085. #ifdef CONFIG_PCIC_PCI
  1086. #include <asm/pcic.h>
  1087. .align 4
  1088. .globl linux_trap_ipi15_pcic
  1089. linux_trap_ipi15_pcic:
  1090. rd %wim, %l3
  1091. SAVE_ALL
  1092. /*
  1093. * First deactivate NMI
  1094. * or we cannot drop ET, cannot get window spill traps.
  1095. * The busy loop is necessary because the PIO error
  1096. * sometimes does not go away quickly and we trap again.
  1097. */
  1098. sethi %hi(pcic_regs), %o1
  1099. ld [%o1 + %lo(pcic_regs)], %o2
  1100. ! Get pending status for printouts later.
  1101. ld [%o2 + PCI_SYS_INT_PENDING], %o0
  1102. mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
  1103. stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
  1104. 1:
  1105. ld [%o2 + PCI_SYS_INT_PENDING], %o1
  1106. andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
  1107. bne 1b
  1108. nop
  1109. or %l0, PSR_PIL, %l4
  1110. wr %l4, 0x0, %psr
  1111. WRITE_PAUSE
  1112. wr %l4, PSR_ET, %psr
  1113. WRITE_PAUSE
  1114. call pcic_nmi
  1115. add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
  1116. RESTORE_ALL
  1117. .globl pcic_nmi_trap_patch
  1118. pcic_nmi_trap_patch:
  1119. sethi %hi(linux_trap_ipi15_pcic), %l3
  1120. jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
  1121. rd %psr, %l0
  1122. .word 0
  1123. #endif /* CONFIG_PCIC_PCI */
  1124. .globl flushw_all
  1125. flushw_all:
  1126. save %sp, -0x40, %sp
  1127. save %sp, -0x40, %sp
  1128. save %sp, -0x40, %sp
  1129. save %sp, -0x40, %sp
  1130. save %sp, -0x40, %sp
  1131. save %sp, -0x40, %sp
  1132. save %sp, -0x40, %sp
  1133. restore
  1134. restore
  1135. restore
  1136. restore
  1137. restore
  1138. restore
  1139. ret
  1140. restore
  1141. #ifdef CONFIG_SMP
  1142. ENTRY(hard_smp_processor_id)
  1143. 661: rd %tbr, %g1
  1144. srl %g1, 12, %o0
  1145. and %o0, 3, %o0
  1146. .section .cpuid_patch, "ax"
  1147. /* Instruction location. */
  1148. .word 661b
  1149. /* SUN4D implementation. */
  1150. lda [%g0] ASI_M_VIKING_TMP1, %o0
  1151. nop
  1152. nop
  1153. /* LEON implementation. */
  1154. rd %asr17, %o0
  1155. srl %o0, 0x1c, %o0
  1156. nop
  1157. .previous
  1158. retl
  1159. nop
  1160. ENDPROC(hard_smp_processor_id)
  1161. #endif
  1162. /* End of entry.S */